論文誌

[1] Fuma Sawa, Yoshinori Kamizono, Wataru Kobayashi, Ittetsu Taniguchi, Hiroki Nishikawa, and Takao Onoye, "An In-Vehicle Auditory Signal Evaluation Platform Based on a Driving Simulator," IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, volume E106-A, number 11, - (to be published), November 2023. [desc]

[2] Daichi Watari, Ittetsu Taniguchi, Francky Catthoor, Charalampos Marantos, Kostas Siozios, Elham Shirazi, Dimitrios Soudris, and Takao Onoye, "Thermal-Comfort Aware Online Co-Scheduling Framework for HVAC, Battery Systems, and Appliances in Smart Buildings,," IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, volume E106-A, number 5, pages 698-706, May 2023. [advpub_2022MAI0001.pdf]

[3] Kenshiro Kato, Daichi Watari, Ittetsu Taniguchi, and Takao Onoye, "Ev Aggregation Framework for Spatiotemporal Energy Shifting to Reduce Solar Energy Waste," IEICE Trans. Fundamentals of Electronics Communications and Computer Sciences, volume E106-A, number 1, pages 54-63, January 2023. [application/pdf]

[4] Koki Iwabuchi, Kenshiro Kato, Daichi Watari, Ittetsu Taniguchi, Francky Catthoor, Elham Shirazi, and Takao Onoye, "Flexible Electricity Price Forecasting by Switching Mother Wavelets Based on Wavelet Transform and Long Short-Term Memory," Energy and AI, volume 10, page 100192, November 2022. [1-s2.0-S2666546822000404-main.pdf]

[5] Dafang Zhao, Daichi Watari, Yuki Ozawa, Ittetsu Taniguchi, Toshihiro Suzuki, Yoshiyuki Shimoda, and Takao Onoye, "A Thermal Comfort and Peak Power Demand Aware Vrf Heating/Cooling Management Framework: Simulation and On-Site Experiment," Journal of Information Processing, volume 30, pages 476-485, 2022.

[6] Daichi Watari, Ittetsu Taniguchi, Hans Goverde, Patrizio Manganiello, Elham Shirazi, Francky Catthoor, and Takao Onoye, "Multi-Time Scale Energy Management Framework for Smart PV Systems Mixing Fast and Slow Dynamics," Applied Energy, volume 289, number 116671, May 2021. [1-s2.0-S0306261921002002-main.pdf]

[7] Qiaochu Zhao, Ittetsu Taniguchi, and Takao Onoye, "A Case Study on Fpga Implementation of Parts Counting Orientation Recognition Method for Industrial Vision System," IPSJ Transactions on System LSI Design Methodology, volume 14, pages 21-23, 2021.

[8] ZHAO Qiaochu, Ittetsu TANIGUCHI, and Takao ONOYE, "A Template-Free Object Motion Estimation Method for Industrial Vision System in Aligning Machine," 2020 25th IEEE International Conference on Emerging Technologies and Factory Automation (ETFA), volume 1, pages 1227-1230, September 2020.

[9] Qiaochu Zhao, Ittetsu Taniguchi, Makoto Nakamura, and Takao Onoye, "Magic Line: an Integrated Method for Fast Parts Counting and Orientation Recognition Using Industrial Vision Systems," IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, volume 103, number 7, pages 928-936, July 2020.

[10] Daichi Watari, Ittetsu Taniguchi, and Takao Onoye, "SOH Aware System-Level Battery Management Methodology for Decentralized Energy Network," IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, volume E103-A, number 3, pages 596-604, March 2020. [manuscript.pdf]

[11] Prasara Jakkaew and Takao Onoye, "Non-Contact Respiration Monitoring and Body Movements Detection for Sleep Using Thermal Imaging," Sensors, volume 20, number 21, page 6307, January 2020.

[12] 岩瀬大輝, 伊藤雄一, 秦秀彦, 尾上孝雄, " SenseSurface：アクティブ音響センシングによる物体識別と位置推定," 情報処理学会論文誌, volume 60, number 10, pages 1869-1880, 2019年10月.

[13] 中村淳之, 伊藤雄一, 尾上孝雄, "磁気センサシートを用いた軸型オブジェクトに対するインタラクション取得手法," 日本バーチャルリアリティ学会論文誌, volume 24, number 3, pages 271-281, 2019年9月. [2.pdf]

[14] 井上佑貴, 伊藤雄一, 尾上孝雄, "TuVe：チューブを用いたフレキシブルなディスプレイ," 日本バーチャルリアリティ学会論文誌, volume 24, number 3, pages 293-301, 2019年9月. [2.pdf]

[15] 増山昌樹, 伊藤雄一, 福島浩介, 尾上孝雄, "椅子用キャスター型デバイスを用いた着座姿勢識別," ヒューマンインタフェース学会論文誌, volume 21, number 1, pages 47-60, 2019年2月. [2.pdf]

[16] T. Minamikawa, D. Nagai, T. Kaneko, I. Taniguchi, M. Ando, R. Akama, and K. Takenaka, "Analytical Imaging of Colour Pigments Used in Japanese Woodblock Prints Using Raman Microspectroscopy," Journal of Raman Spectroscopy, volume 48, number 12, pages 1887-1895, December 2017.

[17] 續毅海, 伊藤雄一, 安藤正宏, 細井俊輝, 高嶋和毅, 尾上孝雄, 北村喜文, "StackBlock: 積み重ね形状を認識するブロック型UI," 情報処理学会論文誌, volume 57, number 12, pages 2565-2576, 2016年12月.

[18] 辻本祐輝, 伊藤雄一, 尾上孝雄, "Ketsuro-Graffiti: 結露を用いたインタラクティブディスプレイ," 日本バーチャルリアリティ学会論文誌, volume 21, number 3, pages 513-520, 2016年9月.

[19] C. Siriteanu, A. Takemura, C. Koutschan, S. Kuriki, D. Richards, and H. Shin, "Exact Zf Analysis and Computer-Algebra-Aided Evaluation in Rank-1 Los Rician Fading," IEEE Transactions on Wireless Communications, accepted, April 2016. [2.pdf]

[20] Constantin Siriteanu, Satoshi Kuriki, Donald Richards, and Akimichi Takemura, "Chi-Square Mixture Representations for the Distribution of the Scalar Schur Complement in a Noncentral Wishart Matrix," Statistics and Probability Letters, accepted, February 2016. [2.pdf]

[21] S. Iizuka, Y. Higuchi, M. Hashimoto, and T. Onoye, "Device-Parameter Estimation with Sensitivity-Configurable Ring Oscillator," IEICE Trans. Fundamentals of Electronics Communications and Computer Sciences, volume E98-A, number 12, pages 2607--2613, December 2015.

[22] Kosuke TOMITA, Masahide HATANAKA, and Takao ONOYE, "Implementation of Viterbi Decoder Toward GPU-based SDR Receiver," IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, volume E98-A, number 11, pages 2246-2253, November 2015.

[23] T.T. Oo, T. Onoye, and K. Shin, "Partial Encryption Method That Enhances MP3 Security," IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, volume E98-A, number 8, pages 1760-1768, August 2015. [2.pdf]

[24] D. Fukuda, K. Watanabe, Y. Kanazawa, and M. Hashimoto, "Modeling the Effect of Global Layout Pattern on Wire Width Variation for On-The-Fly Etching Process Modification," IEICE Trans. Fundamentals of Electronics Communications and Computer Sciences, volume E98-A, number 7, pages 1467--1474, July 2015.

[25] T. Shinada, M. Hashimoto, and T. Onoye, "Proximity Distance Estimation Based on Electric Field Communication between 1mm³ Sensor Nodes," Analog Integrated Circuits and Signal Processing, May 2015.

[26] C.Siriteanu, A.Takemura, S.Kuriki, D.Richards, and H.Shin, "Schur Complement Based Analysis of Mimo Zero-Forcing for Rician Fading," IEEE Transactions on Wireless Communications, volume 14, number 4, pages 1757-1771, April 2015.

[27] C.Siriteanu, A.Takemura, S.Kuriki, and H.Shin, "Mimo Zero-Forcing Performance Evaluation Using the Holonomic Gradient Method," IEEE Transactions on Wireless Communications, volume 14, number 4, 2322 - 2335, April 2015.

[28] S. Hirokawa, R. Harada, M. Hashimoto, and T. Onoye, "Characterizing Alpha- and Neutron-Induced Seu and Mcu on Sotb and Bulk 0.4-V Srams," IEEE Transactions on Nuclear Science, April 2015.

[29] T. Uemura, T. Kato, R. Tanabe, H. Iwata, J. Ariyoshi, H. Matsuyama, and M. Hashimoto, "Exploring Well-Configurations for Minimizing Single Event Latchup," IEEE Transactions on Nuclear Science, volume 61, number 6, pages 3282--3289, December 2014.

[30] D. Fukuda, K. Watanabe, N. Idani, Y. Kanazawa, and M. Hashimoto, "Edge-Over-Erosion Error Prediction Method Based on Multi-Level Machine Learning Algorithm," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E97-A, number 12, pages 2373--2382, December 2014.

[31] H. Konoura, D. Alnajjar, Y. Mitsuyama, H. Shimada, K. Kobayashi, H. Kanbara, H. Ochi, T. Imagawa, K. Wakabayashi, M. Hashimoto, T. Onoye, and H. Onodera, "Reliability-Configurable Mixed-Grained Reconfigurable Array Supporting C-Based Design and Its Irradiation Testing," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E97-A, number 12, pages 2518--2529, December 2014.

[32] T. Amaki, M. Hashimoto, and T. Onoye, "A Process and Temperature Tolerant Oscillator-Based True Random Number Generator," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E97-A, number 12, pages 2393--2399, December 2014.

[33] H. Konoura, T. Imagawa, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Comparative Evaluation of Lifetime Enhancement with Fault Avoidance on Dynamically Reconfigurable Devices," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E97-A, number 7, pages 1468--1482, July 2014.

[34] H. Konoura, T. Kameda, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Nbti Mitigation Method by Inputting Random Scan-In Vectors in Standby Time," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E97-A, number 7, pages 1483--1491, July 2014.

[35] R. Harada, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Set Pulse-Width Measurement Suppressing Pulse-Width Modulation and Within-Die Process Variation Effects," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E97-A, number 7, pages 1461--1467, July 2014.

[36] 遠藤隆介, 伊藤雄一, 中島康祐, 岸野文郎, "マルチタッチディスプレイを用いた複数人によるプランニングができるデジタルサイネージシステムの提案," 情報処理学会論文誌, volume 55, number 4, 2014年4月. [2.pdf]

[37] C.Siriteanu, S.D. Blostein, A.Takemura, H.Shin, S.Yousefi, and S.Kuriki, "Exact Mimo Zero-Forcing Detection Analysis for Transmit-Correlated Rician Fading," IEEE Transactions on Wireless Communications, volume 13, number 3, pages 1514-1527, March 2014.

[38] H. Fuketa, R. Harada, M. Hashimoto, and T. Onoye, "Measurement and Analysis of Alpha-Particle-Induced Soft Errors and Multiple Cell Upsets in 10t Subthreshold Sram," IEEE Transactions on Device and Materials Reliability, volume 14, number 1, 463 -- 470, March 2014.

[39] Sho Tsugawa, Hiroyuki Ohsaki, Yuichi Itoh, Naonori Ono, Keiichiro Kagawa, and Kazuki Takashima, "Dynamic Social Network Analysis with Heterogeneous Sensors in Ambient Environment," Social Networking, volume 3, number 1, pages 9-18, January 2014.

[40] T. Uemura, T. Kato, H. Matsuyama, and M. Hashimoto, "Mitigating Multi-Bit-Upset with Well-Slits in 28 Nm Multi-Bit-Latch," IEEE Transactions on Nuclear Science, volume 60, number 6, pages 4362--4367, December 2013.

[41] T. Uemura, T. Kato, H. Matsuyama, and M. Hashimoto, "Soft-Error in Sram at Ultra-Low Voltage and Impact of Secondary Proton in Terrestrial Environment," IEEE Transactions on Nuclear Science, volume 60, number 6, pages 4232--4237, December 2013.

[42] D. Alnajjar, H. Konoura, Y. Ko, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Implementing Flexible Reliability in a Coarse Grained Reconfigurable Architecture," IEEE Transactions on VLSI Systems, volume 21, number 12, 2165 -- 2178, December 2013.

[43] M. Okada, M. Hatanaka, K. Kagawa, and S. Miyamoto, "Realization of Secure Ambient Wireless Network System Based on Spatially Distributed Ciphering Function," IEICE Trans. on Fundamentals of Electronics, volume E96-A, number 11, November 2013.

[44] K. Shinkai, M. Hashimoto, and T. Onoye, "A Gate-Delay Model Focusing on Current Fluctuation Over Wide Range of Process-Voltage-Temperature Variations," Integration, the VLSI Journal, volume 46, number 4, pages 345--358, September 2013.

[45] 中島康祐, 伊藤雄一, 林勇介, 池田和章, 藤田和之, 尾上孝雄, "Emoballoon: ソーシャルタッチインタラクションのための柔らかな風船型インタフェース," 日本バーチャ ルリアリティ学会論文誌, volume 18, number 3, pages 255-265, 2013年9月. [2.pdf]

[46] T. Amaki, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "A Worst-Case-Aware Design Methodology for Noise-Tolerant Oscillator-Based True Random Number Generator with Stochastic Behavior Modeling," IEEE Transactions on Information Forensics and Security, volume 8, number 8, pages 1331--1342, August 2013.

[47] T.Kameda, H. Konoura, D. Alnajjar, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Field Slack Assessment for Predictive Fault Avoidance on Coarse-Grained Reconfigurable Devices," IEICE Trans. on Information and Systems , volume E96-D, number 8, pages 1624--1631, August 2013.

[48] R. Harada, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Impact of NBTI-Induced Pulse-Width Modulation on SET Pulse-Width Measurement," IEEE Transactions on Nuclear Science, volume 60, number 4, pages 2630--2634, August 2013.

[49] D. Alnajjar, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Pvt-Induced Timing Error Detection Through Replica Circuits and Time Redundancy in Reconfigurable Devices," IEICE Electronics Express (ELEX), volume 10, number 5, April 2013.

[50] Y. Ogasahara, M. Hashimoto, T. Kanamoto, and T. Onoye, "Supply Noise Suppression by Triple-Well Structure," IEEE Transactions on VLSI Systems, volume 21, number 4, pages 781--785, April 2013.

[51] I. Homjakovs, T. Hirose, Y. Osaki, M. Hashimoto, and T. Onoye, "A 0.8-V 110-Na Cmos Current Reference Circuit Using Subthreshold Operation," IEICE Electronics Express (ELEX), volume 10, number 4, March 2013.

[52] T. Amaki, M. Hashimoto, and T. Onoye, "Jitter Amplifier for Oscillator-Based True Random Number Generator," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E96-A, number 3, pages 684--696, March 2013.

[53] I. Homjakovs, M. Hashimoto, T. Hirose, and T. Onoye, "Signal-Dependent Analog-To-Digital Conversion Based on Minimax Sampling," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E96-A, number 2, pages 459--468, February 2013.

[54] Yusuke Hayashi, Yuichi Itoh, Kazuki Takashima, Kazuyuki Fujita, Kosuke Nakajima, and Takao Onoye, "Cup-Le: Cup-Shaped Tool for Subtly Collecting Information During Conversational Experiment," The International Journal of Advanced Computer Science, volume 3, number 1, pages 44-50, January 2013. [2.pdf]

[55] 中西正洋, 畠中理英, 尾上孝雄, "家電機器向けユーザインタフェース管理システム," 画像電子学会誌, volume 42, number 1, pages 81-88, 2013年1月.

[56] 劉載勲, 宮本龍介, 尾上孝雄, "CoHOG特徴を用いた歩行者検出の確率的サンプリングに基づく高速化," 画像電子学会誌, volume 42, number 1, pages 30-40, 2013年1月.

[57] 藤田和之, 高嶋和毅, 伊藤雄一, 大崎博之, 小野直亮, 香川景一郎, 津川翔, 中島康祐, 林勇介, 岸野文郎, "Ambient Suiteを用いたパーティ場面における部屋型会話支援システムの実装と評価," 電子情報通信学会論文誌, volume J96-D, number 1, pages 120-132, 2013年1月. [2.pdf]

[58] M. Hatanaka, T. Homemoto, and T. Onoye, "Architecture and Implementation of Fading Compensation for Dynamic Spectrum Access Wireless Communication Systems," VLSI Design, volume vol. 2013, Article ID 967370, 9 pages, 2013.

[59] R. Harada, S. Abe, H. Fuketa, T. Uemura, M. Hashimoto, and Y. Watanabe, "Angular Dependency of Neutron Induced Multiple Cell Upsets in 65-Nm 10t Subthreshold Sram," IEEE Transactions on Nuclear Science, volume 59, number 6, pages 2791--2795, December 2012.

[60] S. Kimura, M. Hashimoto, and T. Onoye, "A Body Bias Clustering Method for Low Test-Cost Post-Silicon Tuning," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E95-A, number 12, pages 2292--2300, December 2012.

[61] T. Enami, T. Sato, and M. Hashimoto, "Power Distribution Network Optimization for Timing Improvement with Statistical Noise Model and Timing Analysis," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E95-A, number 12, pages 2261--2271, December 2012.

[62] Y. Takai, M. Hashimoto, and T. Onoye, "Power Gating Implementation for Supply Noise Mitigation with Body-Tied Triple-Well Structure," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E95-A, number 12, pages 2220--2225, December 2012.

[63] 遠藤隆介, 伊藤雄一, 中島康祐, 藤田和之, 岸野文郎, "Digital Signage Supporting Collaborative Route Planning in Real Commercial Establishment," ICIC Express Letters, volume 6, number 12, pages 2967-2972, 2012年12月. [2.pdf]

[64] M. Okada, T. Onoye, and W. Kobayashi, "A Ray Tracing Simulation of Sound Diffraction Based on the Analytic Secondary Source Model," IEEE Trans. Audio, Speech and Language Processing , volume 20, number 9, 2448-2460 , November 2012.

[65] 中島康祐, 伊藤雄一, 築谷喬之, 藤田和之, 高嶋和毅, 岸野文郎, "FuSA2 Touch Display: 大画面毛状マルチタッチディスプレイ," 情報処理学会論文誌, volume 53, number 3, pages 1069-1081, 2012年3月. [2.pdf]

[66] H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "Adaptive Performance Compensation with In-Situ Timing Error Predictive Sensors for Subthreshold Circuits," IEEE Transactions on VLSI Systems, volume 20, number 2, pages 333--343, February 2012.

[67] H. Konoura, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Stress Probability Computation for Estimating NBTI-Induced Delay Degradation," IEICE Trans. Fundamentals, volume E94-A, number 12, pages 2545-2553, December 2011.

[68] K. Shinkai, M. Hashimoto, and T. Onoye, "Extracting Device-Parameter Variations with Ro-Based Sensors," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E94-A, number 12, pages 2537--2544, December 2011.

[69] T. Okumura and M. Hashimoto, "Setup Time, Hold Time and Clock-To-Q Delay Computation under Dynamic Supply Noise," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E94-A, number 10, pages 1948--1953, October 2011.

[70] H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "Neutron-Induced Soft Errors and Multiple Cell Upsets in 65-Nm 10t Subthreshold Sram," IEEE Transactions on Nuclear Science, volume 58, number 4, pages 2097--2102, August 2011.

[71] H. Fuketa, D. Kuroda, M. Hashimoto, and T. Onoye, "An Average-Performance-Oriented Subthreshold Processor Self-Timed by Memory Read Completion," IEEE Transactions on Circuits and Systems II, volume 58, number 5, pages 299--303, May 2011.

[72] R. Harada, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Measurement Circuits for Acquiring SET Pulse Width Distribution with Sub-FO1-inverter-delay Resolution," IEICE Transaction on Fundamentals of Electronics, Communications and Computer Sciences, volume E93-A, number 12, pages 2417-2423, December 2010. [2.pdf]

[73] S. Ninomiya and M. Hashimoto, "Accuracy Enhancement of Grid-Based Ssta by Coefficient Interpolation," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E93-A, number 12, pages 2441--2446, December 2010.

[74] T. Enami, S. Ninomiya, K. Shinkai, S. Abe, and M. Hashimoto, "Statistical Timing Analysis Considering Clock Jitter and Skew Due to Power Supply Noise and Process Variation," IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, volume 93-A, number 12, pages 2399-2408, December 2010.

[75] T. Okumura, F. Minami, K. Shimazaki, K. Kuwada, and M. Hashimoto, "Gate Delay Estimation in Sta under Dynamic Power Supply Noise," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E93-A, number 12, pages 2447--2455, December 2010.

[76] M. Okada, N. Iwanaga, T. Matsumura, T. Onoye, and W. Kobayashi, "3D Sound Rendering for Multiple Sound Sources Based on Fuzzy Clustering," IEICE Trans. Fundamentals, volume E93-A, number 11, pages 2163-2172, November 2010.

[77] H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "Transistor Variability Modeling and Its Validation with Ring-Oscillation Frequencies for Body-Biased Subthreshold Circuits," IEEE Transactions on VLSI Systems, volume 18, number 7, pages 1118--1129, July 2010.

[78] 密山幸男, 高橋一真, 今井林太郎, 橋本昌宜, 尾上孝雄, 白川功, "メディア処理向け再構成可能アーキテクチャでの動画像復号処理の実現," 電子情報通信学会論文誌, volume J93-A, number 6, pages 397-413, 2010年6月.

[79] 渡邊賢治, 達可敏充, 畠中理英, 尾上孝雄, "屋内位置推定システムのための間取り推定手法," Journal of Signal Processing, volume 14, number 3, pages 231-242, 2010年5月.

[80] K. Shinkai, M. Hashimoto, and T. Onoye, "Prediction of Self-Heating in Short Intra-Block Wires," IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, volume E93-A, number 3, pages 583-594, March 2010. [2.pdf]

[81] T. Kanamoto, T. Okumura, K. Furukawa, H. Takafuji, A. Kurokawa, K. Hachiya, T. Sakata, M. Tanaka, H. Nakashima, H. Masuda, T. Sato, and M. Hashimoto, "Impact of Self-Heating in Wire Interconnection on Timing," IEICE Trans. on Electronics, volume E93-C, number 3, pages 388--392, March 2010.

[82] Z. Huang, A. Kurokawa, M. Hashimoto, T. Sato, M. Jiang, and Y. Inoue, "Modeling the Overshooting Effect for Cmos Inverter Delay Analysis in Nanometer Technologies," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems , volume 29, number 2, pages 250--260, February 2010.

[83] H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "Trade-Off Analysis between Timing Error Rate and Power Dissipation for Adaptive Speed Control with Timing Error Prediction," IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, volume E92-A, number 12, pages 3094-3102, December 2009.

[84] T. Sakata, T. Okumura, A. Kurokawa, H. Nakashima, H. Masuda, T. Sato, M. Hashimoto, K. Hachiya, K. Furukawa, M. Tanaka, H. Takafuji, and T. Kanamoto, "An Approach for Reducing Leakage Current Variation Due to Manufacturing Variability," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E92-A, number 12, pages 3016--3023, December 2009.

[85] 廣本正之, 筒井弘, 越智裕之, 小佐野智之, 石川憲洋, 中村行宏, "メディアストリーミングにおける高速移動通信網に適した動的符号化レート制御手法," 情報処理学会論文誌, volume 50, number 10, pages 2532-2542, 2009年10月.

[86] A. Kurokawa, T. Sato, T. Kanamoto, and M. Hashimoto, "Interconnect Modeling: a Physical Design Perspective (Invited)," IEEE Transactions on Electron Devices, volume 56, number 9, pages 1840--1851, September 2009.

[87] Hiroki Sugano, Takahiko Masuzaki, Hiroshi Tsutsui, Takao Onoye, Hiroyuki Ochi, and Yukihiro Nakamura, "Efficient Memory Organization Framework for Jpeg2000 Entropy Codec," IEICE Trans. Fundamentals, volume E92-A, number 8, pages 1970-1977, August 2009.

[88] 畠中理英, 達可敏充, 渡邊賢治, 尾上孝雄, "透過減衰を考慮した無線ホームネットワーク向け位置推定," 情報処理学会論文誌, volume 50, number 8, 1835–1844, 2009年8月.

[89] Y. Ogasahara, M. Hashimoto, and T. Onoye, "All Digital Ring-Oscillator Based Macro for Sensing Dynamic Supply Noise Waveform," IEEE Journal of Solid-State Circuits, volume 44, number 6, pages 1745--1755, June 2009.

[90] 増崎隆彦, 筒井弘, 尾上孝雄, 水野雄介, 佐々木元, 中村行宏, "シングルタイル JPEG2000 コーデックのシステム構成," 画像電子学会誌, volume 38, number 3, pages 296-304, 2009年5月.

[91] T. Enami, S. Ninomiya, and M. Hashimoto, "Statistical Timing Analysis Considering Spatially and Temporally Correlated Dynamic Power Supply Noise," IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, volume 28, number 4, pages 541-553, April 2009.

[92] T. Okumura, A. Kurokawa, H. Masuda, T. Kanamoto, M. Hashimoto, H. Takafuji, H. Nakashima, N. Ono, T. Sakata, and T. Sato, "Improvement in Computational Accuracy of Output Transition Time Variation Considering Threshold Voltage Variations," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume 92-A, number 4, pages 990--997, April 2009.

[93] K. Hamamoto, H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "An Experimental Study on Body-Biasing Layout Style Focusing on Area Efficiency and Speed Controllability," IEICE Trans. on Electronics, volume E92-C, number 2, pages 281-285, February 2009.

[94] Takahiko Masuzaki, Hiroshi Tsutsui, Quang Minh Vu, Takao Onoye, and Yukihiro Nakamura, "JPEG2000 High-Speed SNR Progressive Decoding Scheme," International Journal of Computer Science and Network Security, volume 9, number 1, pages 62-68, January 2009.

[95] M. Hashimoto, J. Siriporn, A. Tsuchiya, H. Zhu, and C.-K. Cheng, "Analytical Eye-Diagram Model for On-Chip Distortionless Transmission Lines and Its Application to Design Space Exploration," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E91-A, number 12, pages 3474-3480, December 2008.

[96] S. Abe, M. Hashimoto, and T. Onoye, "Clock Skew Evaluation Considering Manufacturing Variability in Mesh-Style Clock Distribution," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E91-A, number 12, pages 3481-3487, December 2008.

[97] T. Kanamoto, Y. Ogasahara, K. Natsume, K. Yamaguchi, H. Amishiro, T. Watanabe, and M. Hashimoto, "Impact of Well Edge Proximity Effect on Timing," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E91-A, number 12, pages 3461-3464, December 2008.

[98] 密山幸男, 高橋一真, 今井林太郎, 橋本昌宜, 尾上孝雄, 白川功, "Area-Efficient Reconfigurable Architecture for Media Processin," IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, volume E91-A, number 12, pages 3651-3662, 2008年12月.

[99] R. Hashimoto, T. Matsumura, Y. Nozato, K. Watanabe, and T. Onoye, "Implementation of Multi-Agent Object Attention System Based on Biologically Inspired Attractor Selection," IEICE Trans. Fundamentals, volume E91-A, number 10, October 2008.

[100] 渡辺慎吾, 橋本昌宜, 佐藤寿倫, "タイミング歩留まり改善を目的とする演算器カスケーディング," 情報処理学会論文誌コンピューティングシステム, volume 1, number 2, pages 12--21, 2008年8月.

[101] M. Hashimoto, J. Yamaguchi, T. Sato, and H. Onodera, "Timing Analysis Considering Temporal Supply Voltage Fluctuation," IEICE Trans. on Information and Systems , volume E91-D, number 3, pages 655--660, March 2008.

[102] Y. Ogasahara, M. Hashimoto, and T. Onoye, "Measurement and Analysis of Inductive Coupling Noise in 90nm Global Interconnects," IEEE Journal of Solid-State Circuits, volume 43, number 3, pages 718-728, March 2008.

[103] 高橋真吾, 築山修治, 橋本昌宜, 白川功, "液晶ディスプレイ用サンプリング回路におけるサンプリングパルスとトランジスタサイズの最適設計手法," 電子情報通信学会論文誌A, volume J91-A, number 3, pages 373-382, 2008年3月.

[104] Nobuyuki Iwanaga, Tomoya Matsumura, Akihiro Yoshida, Wataru Kobayashi, and Takao Onoye, "Embedded System Implementation of Sound Localization in Proximal Region," IEICE Trans. Fundamentals, volume E91-A, number 3, pages 763-771, March 2008.

[105] M. Hashimoto, J. Yamaguchi, and H. Onodera, "Timing Analysis Considering Spatial Power/Ground Level Variation," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E90-A, number 12, pages 2661-2668, December 2007.

[106] M. Hashimoto, T. Ijichi, S. Takahashi, S. Tsukiyama, and I. Shirakawa, "Transistor Sizing of LCD Driver Circuit for Technology Migration," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E90-A, number 12, pages 2712--2717, December 2007.

[107] Y. Ogasahara, T. Enami, M. Hashimoto, T. Sato, and T. Onoye, "Validation of a Full-Chip Simulation Model for Supply Noise and Delay Dependence on Average Voltage Drop with On-Chip Delay Measurement," IEEE Trans. on Circuits and Systems—II: Express Briefs, volume 54, number 10, pages 868-872, October 2007.

[108] M. Ise, Y. Ogasahara, K. Watanabe, M. Hatanaka, T. Onoye, H. Niwamoto, I. Keshi, and I. Shirakawa, "Design and Implementation of Home Network Protocol for Appliance Control Based on IEEE 802.15.4," International Journal of Computer Science and Network Security, volume 7, number 7, pages 20-30, July 2007.

[109] K. Tsujino, W. Kobayashi, T. Onoye, and Y. Nakamura, "Automatic Filter Design for 3-D Sound Movement in Embedded Applications," In Acoustical Science and Technology, volume 28, number 4, pages 219-229, July 2007.

[110] A. Tsuchiya, M. Hashimoto, and H. Onodera, "Optimal Termination of On-Chip Transmission-Lines for High-Speed Signaling," IEICE Trans. on Electronics, volume E90-C, number 6, pages 1267-1273, June 2007.

[111] 宮本龍介, 劉載勲, 筒井弘, 中村行宏, "可変ウィンドウ手法に基づく高精度ステレオマッチングプロセッサ," 画像電子学会誌, volume 36, number 3, pages 210-218, 2007年5月.

[112] Y. Ogasahara, M. Hashimoto, and T. Onoye, "Quantitative Prediction of On-Chip Capacitive and Inductive Crosstalk Noise　and Tradeoff between Wire Cross Sectional Area and Inductive Crosstalk Effect," In IEICE Trans. on Fundamentals of Electronics,　Communications and Computer Sciences, volume E90-A, number 4, pages 724--731, April 2007.

[113] K. Tsujino, W. Kobayashi, T. Onoye, and Y. Nakamura, "Efficient 3-D Sound Movement with Time-Varying Iir Filters," In IEICE Trans. Fundamentals, volume E90-A, number 3, pages 618--625, March 2007.

[114] K. Watanabe, M. Ise, T. Onoye, H. Niwamoto, and I. Keshi, "An Energy-Efficient Architecture of Wireless Home Network Based on Mac Broadcast and Transmission Power Control," In IEEE Trans. Consumer Electronics, volume 53, number 1, pages 124--130, February 2007.

[115] S. Takahashi, S. Tsukiyama, M. Hashimoto, and I. Shirakawa, "A Sampling Switch Design Procedure for Active Matrix Liquid Crystal Displays," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E89-A, number 12, pages 3538-3545, December 2006.

[116] S. Takahashi, S. Tsukiyama, M. Hashimoto, and I. Shirakawa, "A Sampling Switch Design Procedure for Active Matrix Liquid Crystal Displays," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E89-A, number 12, pages 3538--3545, December 2006.

[117] T. Kanamoto, T. Ikeda, A. Tsuchiya, H. Onodera, and M. Hashimoto, "Si-Substrate Modeling Toward Substrate-Aware Interconnect Resistance and Inductance Extraction in Soc Design," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E89-A, number 12, pages 3560-3568, December 2006.

[118] T. Kanamoto, S. Akutsu, T. Nakabayashi, T. Ichinomiya, K. Hachiya, A. Kurokawa, H. Ishikawa, S. Muromoto, H. Kobayashi, and M Hashimoto, "Impact of Intrinsic Parasitic Extraction Errors on Timing and Noise Estimation," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E89-A, number 12, pages 3666-3670, December 2006.

[119] T. Kanamoto, T. Ikeda, A. Tsuchiya, H. Onodera, and M. Hashimoto, "Si-Substrate Modeling Toward Substrate-Aware Interconnect Resistance and Inductance Extraction in Soc Design," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E89-A, number 12, pages 3560-3568, December 2006.

[120] T. Kanamoto, T. Ikeda, A. Tsuchiya, H. Onodera, and M. Hashimoto, "Si-Substrate Modeling Toward Substrate-Aware Interconnect Resistance and Inductance Extraction in Soc Design," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E89-A, number 12, pages 3560--3568, December 2006.

[121] T. Sato, J. Ichimiya, N. Ono, and M. Hashimoto, "On-Chip Thermal Gradient Analysis Considering Interdependence between Leakage Power and Temperature," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E89-A, number 12, pages 3491-3499, December 2006.

[122] 小谷章夫, 種村嘉高, 密山幸男, 朝井宣実, 中村安久, 尾上孝雄, "ポテンシャルエネルギーを用いた文字重心位置取得手法," 画像電子学会誌, volume 35, number 4, pages 296--305, 2006年7月.

[123] 内田好弘, 谷貞宏, 橋本昌宜, 築山修治, 白川功, "グラウンド平面・シールド配線によるシステム・オン・パネルの配線間容量の低減と容量見積りの容易化," 情報処理学会論文誌, volume 47, number 6, pages 1665--1673, 2006年6月.

[124] G. Fujita, T. Imanaka, H. V. Nhat, T. Onoye, and I. Shirakawa, "Real-Time Human Object Extraction Method for Mobile Systems Based on Color Space Segmentation," In IEICE Trans. Fundamentals, volume E89-A, number 4, pages 941--949, April 2006.

[125] H. Tsutsui, T. Masuzaki, Y. Hayashi, Y. Taki, T. Izumi, T. Onoye, and Y. Nakamura, "Design Framework for JPEG2000 System Architecture," In Journal of Intelligent Automation and Soft Computing, volume 13, number 3, pages 331--343, March 2006.

[126] Z. Guo, Y. Nishikawa, R. Y. Omaki, T. Onoye, and I. Shirakawa, "A Low-Complexity FEC Assignment Scheme for Motion JPEG2000 Over Wireless Network," IEEE Transactions on Consumer Electronics, volume 52, number 1, pages 81--86, February 2006.

[127] M. Ise, Y. Ogasahara, T. Onoye, and I. Shirakawa, "W-CDMA Channel Codec by Configurable Processors," In Intelligent Automation and Soft Computing, volume 12, number 3, pages 317--29, 2006.

[128] A. Kurokawa, M. Hashimoto, A. Kasebe, Z.-C. Huang, , Y. Yang, Y. Inoue, R. Inagaki, and H. Masuda, "Second-Order Polynomial Expressions for On-Chip Interconnect Capacitance," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E88-A, number 12, pages 3453-3462, December 2005.

[129] A. Muramatsu, M. Hashimoto, and H. Onodera, "Effects of On-Chip Inductance on Power Distribution Grid," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E88-A, number 12, pages 3564-3572, December 2005.

[130] M. Hashimoto, T. Yamamoto, and H. Onodera, "Statistical Analysis of Clock Skew Variation in H-Tree Structure," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E88-A, number 12, pages 3375-3381, December 2005.

[131] T. Sato, J. Ichimiya, N. Ono, K. Hachiya, and M. Hashimoto, "On-Chip Thermal Gradient Analysis and Temperature Flattening for Soc Design," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E88-A, number 12, pages 3382-3389, December 2005.

[132] T. Sato, M. Hashimoto, and H. Onodera, "Successive Pad Assignment for Minimizing Supply Voltage Drop," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E88-A, number 12, pages 3429-3436, December 2005.

[133] 藤田玄, 尾上孝雄, 白川功, "MPEG-4向け高精度動き検出コアのVLSI化設計," 電子情報通信学会論文誌, volume J88-A, number 11, pages 1282-1382, 2005年11月.

[134] A. Kosaka, H. Okuhata, T. Onoye, and I. Shirawaka, "Desing of Ogg Vorbis Decoder System for Embedded Platform," IEICE Trans. Fundamentals, volume E88-A, number 8, pages 2124--2130, August 2005.

[135] K. Tsujino, K. Furuya, W. Kobayashi, T. Izumi, T. Onoye, and Y. Nakamura, "Design of Realtime 3-D Sound Processing System," In IEICE Trans. Fundamentals, volume E88-A, number 8, pages 2124--2130, August 2005.

[136] 内田好弘, 谷貞宏, 橋本昌宜, 築山修治, 白川功, "システム液晶のための配線容量抽出手法," 情報処理学会論文誌, volume 46, number 6, pages 1395--1403, 2005年6月.

[137] A. Tsuchiya, M. Hashimoto, and H. Onodera, "Performance Limitation of On-Chip Global Interconnects for High-Speed Signaling," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Science, volume E88-A, number 4, pages 885-891, April 2005.

[138] Y. Mitsuyama, M. Kimura, T. Onoye, and I. Shirakawa, "Architecture of IEEE802.11i Cipher Algorithms for Embedded Systems," IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, volume E88-A, number 4, pages 899-906, April 2005.

[139] T. Miyazaki, M. Hashimoto, and H. Onodera, "A Performance Prediction of Clock Generation Plls: a Ring Oscillator Based Pll and an Lc Oscillator Based Pll," IEICE Trans. on Electronics, volume E88-C, number 3, pages 437-444, March 2005.

[140] T. Matsumura, N. Iwanaga, W. Kobayashi, T. Onoye, and I. Shirakawa, "Embedded 3D Sound Movement System Based on Feature Extraction of Head-Related Transfer Function," IEEE Transactions on Consumer Electronics, volume 51, number 1, pages 262--267, February 2005.

[141] M. Hatanaka, T. Masaki, M. Okada, and K. Murakami, "VLSI Architecture of PSK Demodulator for Digital BS and CS Broadcasting," 映像情報メディア学会誌, volume 59, number 1, pages 69--76, January 2005.

[142] M. Hashimoto and H. Onodera, "Crosstalk Noise Optimization by Post-Layout Transistor Sizing," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E87-A, number 12, pages 3251-3257, December 2004.

[143] M. Hashimoto, Y. Yamada, and H. Onodera, "Equivalent Waveform Propagation for Static Timing Analysis," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems , volume 23, number 4, pages 498-508, April 2004.

[144] M. Kimura, M. H. Miki, T. Onoye, and I. Shirakawa, "Implementation of Java Accelerator for High-Performance Embedded Systems," in IEICE Trans. Fundamentals, volume E86-A, number 12, pages 3079--3088, December 2003.

[145] S. Tani, Y. Uchida, M. Furuie, S. Tsukiyama, B. Lee, S. Nishi, Y. Kubota, I. Shirakawa, and S. Imai, "Parasitic Capacitance Modeling for Non-Planar Interconnects in Liquid Crystal Displays," IEICE Trans. on Fundamentals, volume E86-A, number 12, pages 2923--2932, December 2003.

[146] 岡田勉, 内田翼, 尾上孝雄, 白川功, "次世代 GNSS 受信機用信号処理 機構とその VLSI 化設計," 電子情報通信学会論文誌, volume J86-A, number 12, pages 1417--1425, 2003年12月.

[147] 宋学燮, 岡田浩行, 藤田玄, 尾上孝雄, 白川功, "MPEG-4動画像符号化におけるバイブリッドエラー隠ぺい方式," 画像電子学 会論文誌, volume 32, number 5, pages 609--620, 2003年9月.

[148] 小谷章夫, 小山至幸, 密山幸男, 尾上孝雄, "低解像度表示デバイス向けフォント "LCFONT" の重心位置および可読性評価," 画像電子学会誌, volume 32, number 5, pages 621--628, 2003年9月.

[149] N. Iwanaga, W. Kobayashi, K. Furuya, T. Onoye, and I. Shirakawa, "Embedded Implementation of Acoustic Field Enhancement for Stereo Sound Sources," in IEEE Trans. on Consumer Electronics, volume 49, number 3, pages 737--741, August 2003.

[150] T. Okamoto, T. Yuasa, T. Izumi, T. Onoye, and Y. Nakamura, "Design Tools and Trial Design for Pca-Chip2," In IEICE Trans. Information and Systems,, volume E86-D, number 5, pages 868--871, May 2003.

[151] K. Nakagawa, M. Kawakita, K. Sato, M. Minakuchi, T. Onoye, T. Chiba, and I. Shirakawa, "Object Sharing Scheme for Heterogeneous Environment," in IEICE Transaction on Fundamentals of Electronics, Communications and Computer Sciences, volume E86-A, number 4, pages 813--821, April 2003.

[152] N. Sakamoto, W. Kobayashi, T. Onoye, and I. Shirakawa, "Single DSP Implementation of Realtime 3D Sound Synthesis Algorithm," Journal of Circuits, Systems and Computers, volume 12, number 1, pages 55-73, February 2003.

[153] H. Mizuno, H. Kobayashi, T. Onoye, and I. Shirakawa, "Performance Estimation at Architecture Level for Embedded Systems," IEEE Transaction on Fundamentals of Electronics, Communications and Computer Sciences, volume E85-A, number 12, pages 2636--2644, December 2002.

[154] Y. Ohtani, N. Kawahara, H. Nakaoka, T. Tomaru K. Maruyama, T. Chiba, T. Onoye, and I. Shirakawa, "Wireless Digital Video Transmission System Using IEEE802.11b PHY with Error Correction Block Based ARQ Protocol," IEICE (Institute of Electronics, Information and Communication Engineers) Transaction on Communications, volume E85-B, number 10, pages 2032--2043, October 2002.

[155] 岡田浩行, 宋学燮, 藤田玄, 尾上孝雄, 白川功, "電子透かしのMPEG-4ビットストリームエラー検出への応用," 画像電子学会誌, volume 31, number 5, pages 900--908, 2002年9月.

[156] H. Okada, A.-E. Shiitev, H.-S. Song, G. Fujita, T. Onoye, and I. Shirakawa, "Error Detection by Digital Watermarking for MPEG-4 Video Coding," IEICE (Institute of Electronics, Information and Communication Engineers) Transaction on Fundamentals of Electronics, Communications and Computer Sciences, volume E85-A, number 6, pages 1281--1288, June 2002.

[157] 宋天, 藤田玄, 尾上孝雄, 白川功, "携帯端末用低消費電力 H.263 Version 2 コーデックコアのVLSI化設計," 情報処理学会論文誌, volume 43, number 4, pages 1161--1170, 2002年5月.

[158] M. H. Miki, M. Sakamoto, S. Miyamoto, Y. Takeuchi, T. Yoshida, and I. Shirakawa, "Code Efficiency Evaluation for Embedded Processors," IEICE (Institute of Electronics, Information and Communication Engineers) Transaction on Fundamentals of Electronics, Communications and Computer Sciences, volume E85-A, number 4, pages 811--818, April 2002.

[159] Roberto Y. Omaki, Gen Fujita, Takao Onoye, and Isao Shirakawa, "An Embedded Zerotree Wavelet Video Coding Algorithm with Reduced Memory Bandwidth," IEICE Trans. Fundamentals of Electronics Communications and Computer Sciences, volume E85-A, number 3, pages 703--713, March 2002.

[160] Hiroshi Tsutsui, Akihiko Tomita, Shigenori Sugimoto, Kazuhisa Sakai, Tomonori Izumi, Takao Onoye, and Yukihiro Nakamura, "Lut-Array-Based Pld and Synthesis Approach Based on Sum of Generalized Complex Terms Expression," IEICE Trans. Fundamentals, volume E84-A, number 11, pages 2681-2689, November 2001.

[161] 谷貞宏, 白川功, "多層プリント回路板の電源供給系におけるインピーダンスシミュレーション," エレクトロニクス実装学会誌, volume 4, number 5, pages 378--385, 2001年8月.

[162] K. Kawamoto, K. Kohno, Y. Higuchi, S. Fujino, and I. Shirakawa, "A 25kV ESD Proof LDMOSFET with a Turn-On Discharge MOSFET," IEICE Trans. Electron, volume E84-C, number 6, pages 823--831, June 2001.

[163] T. Watanabe and N. Ishiura, "Resister Constraint Analysis to Minimize Spill Code for Application Specific DSPs," IEICE Trans. Fundamentals of Electronics Communications and Computer Sciences, volume E84-A, number 6, pages 1541--1544, June 2001.

[164] W. Kobayashi, N. Sakamoto, T. Onoye, and I. Shirakawa, "3D Acoustic Image Localization Algorithm by Embedded DSP," IEICE(The Institute of Electronics, Information and Communication Engineers) Trans. Fundamentals of Electronics Communications and Computer Sciences, volume E84-A, number 6, pages 1423--1430, June 2001.

[165] K. Kawamoto, S. Mizuno, H. Abe, Y. Higuchi, H. Ishihara, H. Fukumoto, T. Watanabe, S. Fujino, and I. Shirakawa, "A Single Chip Automotive Control LSI Using SOI Bipolar Complimentary MOS Double-Diffused MOS," The Japan Society of Applied Physics, volume 40, number 4B, pages 2891--2896, April 2001.

[166] Z. Andales, Y. Mitsuyama, T. Onoye, and I. Shirakawa, "A Novel Dynamically Reconfigurable Hardware-Based Cipher," 情報処理学会論文誌, volume 42, number 4, pages 958--966, April 2001.

[167] K. Kawamoto, H. Yamaguchi, H. Himi, S. Fujino, and I. Shirakawa, "A 200 V CMOS SOI IC with Field-Plate Trench Isolation for EL Displays," IEICE Trans. Electron, volume E84-C, number 2, pages 260--266, February 2001.

[168] M. Takahashi, N. Ishiura, A. Yamada, and T. Kambe, "Thread Composition Method for Hardware Compiler Bach Maximizing Resource Sharing among Processes," IEICE Trans. Fundamentals, volume E83-A, number 12, pages 2456--2463, December 2000.

[169] B.Y. Song, M. Furuie, Y. Yoshida, T. Onoye, and I. Shirakawa, "Low-Power VLSI Implementation by NMOS 4-Phase Dynamic Logic," Trans. of IPSJ, volume 41, number 4, pages 899--907, April 2000.

[170] 松村謙次, 古家眞, 藤田玄, 正城敏博, 白川功, 稲田紘, "医療用監視システムとその通信制御用 LSI の設計," 情報処理学会論文誌, volume 41, number 4, pages 962--969, 2000年4月.

[171] M. Hatanaka, T. Masaki, T. Onoye, and K. Murakami, "VLSI Architecture of Switching Control for AAL Type2 Switch," IEICE Trans. Fundamentals, volume E83--A, number 3, pages 435--441, March 2000.

[172] B.Y. Song, M. Furuie, Y. Yoshida, T. Onoye, and I. Shirakawa, "Low-Power Scheme of NMOS 4-Phase Dynamic Logic," IEICE Trans. Electron., volume E82--C, number 9, pages 1772--1776, September 1999.

[173] H. Fujisima, Y. Takemoto, T. Onoye, and I. Shirakawa, "An Architecture of a Matrix-Vector Multiplier Dedicated to Video Decoding and Three-Dimensional Computer Graphics," IEEE Trans. Circuits and Systems for Video Technology, volume 9, number 2, pages 306--314, March 1999.

[174] A. Nagao, I. Shirakawa, and T. Kambe, "A Layout Approach to Monolithic Microwave IC," IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, volume 17, number 12, pages 1262--1272, December 1998.

[175] Masayuki Yamaguchi, Nagisa Ishiura, and Takashi Kambe, "A Binding Algorithm for Retargetable Compilation to Non-Orthogonal DSP Architecture," IEICE Trans. Fundamentals, volume E81-A, number 12, pages 2630--2639, December 1998.

[176] M. H. Miki, 藤田玄, 尾上孝雄, 白川功, "携帯端末向け低電力 H.263 コーデックコアの VLSI 化設計," 電子情報通信学会論文誌, volume J81-A, number 10, pages 1352--1361, 1998年10月.

[177] 長尾明, 澤卓, 重弘裕二, 白川功, 神戸尚志, "方形パッキング法の一算法," 電子情報通信学会論文誌, volume J81-A, number 10, pages 1362--1371, 1998年10月.

[178] H. Okuhata, Morgan H. Miki, T. Onoye, and I. Shirakawa, "A Low-Power DSP Core Architecture for Low Bitrate Speech Codec," IEICE Trans. Fundamentals, volume E81-C, number 8, pages 1616--1621, August 1998.

[179] G. Fujita, T. Onoye, and I. Shirakawa, "A VLSI Architecture for Motion Estimation Core Dedicated to H.263 Video Coding," IEICE Trans. Electronics, volume E81-C, number 5, pages 702--707, May 1998.

[180] 木村浩三, 奥畑宏之, 尾上孝雄, 白川功, 清原督三, 鷺島敬之, "マルチスレッドプロセッサのデータキャッシュ制御方式," 映像情報メディア学会誌, volume 52, number 5, pages 742--749, 1998年5月.

[181] T. Masaki, Y. Nakatani, T. Onoye, N. Yamai, and K. Murakami, "Voice Communication on Multimedia ATM Network Using Shared VCI Cell," IEICE Trans. Communications, volume E81-B, number 2, pages 340-346, February 1998.

[182] H. Uno, K. Kumatani, H. Okuhata, I. Shirakawa, and T. Chiba, "ASK Digital Demodulation Scheme for Noise Immune Infrared Data Communication," ACM Wireless Networks, number 3, pages 121-129, 1997.

[183] I. Arungsrisangchai, Y. Shigehiro, I. Shirakawa, and H. Takahashi, "A Fast Minimum Cost Flow Algorithm for Regenerating Optimal Layout of Functional Cells," IEICE Trans. Fundamentals of Electronics,Communications and Computer Sciences, volume E80-A, number 12, pages 2589-2599, December 1997.

[184] M. Yamaguchi, A. Yamada, T. Nakaoka, T. Kambe, and N. Ishiura, "Architecture Evaluation Based on the Datapath Structure and Parallel Constraint," IEICE Trans. Fundamentals of Electronics,Communications and Computer Sciences, volume E80-A, number 10, pages 1853-1860, October 1997.

[185] S. Yano and N. Ishiura, "Embedded Memory Array Testing Using a Scannable Configuration," IEICE Trans. Fundamentals of Electronics,Communications and Computer Sciences, volume E80-A, number 10, pages 1934-1944, October 1997.

[186] 清水則一, 小山修治, 小野浩, 宮下耕一, 近藤仁志, 水田義明, "GPS変位モニタリングシステムの連続観測における安定性の検証と計測結果 の処理方法の提案," 資源と素材, volume 113, number 7, pages 549-554, 1997年7月.

[187] H. Okuhata, H. Uno, K. Kumatani, I. Shirakawa, and T. Chiba, "A Low Power Receiver Architecture for 4 Mbps Infrared Wireless Communication," J. Circuits, Systems, and Computers, volume 7, number 5, pages 483-494, May 1997.

[188] K. Miyanohana, G. Fujita, K. Yanagida, T. Onoye, and I. Shirakawa, "Single Chip Implementation of Encoder-Decoder for Low Bit Rate Visural Communication," J. Circuits, Systems, and Computers, volume 7, number 5, pages 441-457, May 1997.

[189] 吉田幸弘, 宋宝玉, 奥畑宏之, 尾上孝雄, 白川功, "組み込み用プロセッサの低消費電力化に関する一手法," 電子情報通信学会論文誌, volume J80-A, number 5, pages 765-771, 1997年5月.

[190] T. Masaki, Y. Nakatani, T. Onoye, and K. Murakami, "Voice and Telephony Over ATM for Multimedia Network Using Shared VCI Cell," J. Circuits, Systems, and Computers, volume 7, number 2, pages 93-110, April 1997.

[191] S. Yano, K. Akagi, H. Inohara, and N. Ishiura, "Application of Full Scan Design to Embedded Memory Arrays," in Proc. IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, volume E80-A, number 3, March 1997.

[192] K. Okada, S. Morikawa, S. Takeuchi, and I. Shirakawa, "A High Performance Multiplier and Its Application to an FIR Filter Dedicated to Digital Video Transmission," in Proc. IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, volume E79-A, number 12, pages 2106-2111, December 1996.

[193] 矢野政顕, 石浦菜岐佐, "メモリアレーを含む順序回路へのスキャンパス 方式適用," 電子情報通信学会論文誌, volume J79-D-I, number 12, pages 1055-1062, 1996年12月.

[194] 近藤仁志, M. E. Cannon, 清水則一, 中川浩二, "GPSによる地盤変位モニタリングシステムの開発," 土木学会論文誌, number 546/VI-32, pages 157-168, 1996年9月.

[195] T. Onoye, G. Fujita, M. Takatsu, I. Shirakawa, and N. Yamai, "Single Chip Implementation of Motion Estimator Dedicated to MPEG2 MP@HL," in Proc. IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, volume E79-A, number 8, pages 1210-1216, August 1996.

[196] Y. Shigehiro, T. Nagata, I. Shirakawa, I. Arungsrisangchai, and H. Takahashi, "Automatic Layout Recycling Based on Layout Description and Linear Programming," in Proc. IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, volume 15, number 8, pages 959-967, August 1996.

国際会議

[1] Yuki Ozawa, Dafang Zhao, Daichi Watari, Ittetsu Taniguchi, Toshihiro Suzuki, Yoshiyuki Shimoda, and Takao Onoye, "Data-Driven Hvac Control Using Symbolic Regression: Design and Implementation," In IEEE Power & Energy Society General Meeting, 採録済.

[2] Fuma Sawa, Yoshinori Kamizono, Wataru Kobayashi, Ittetsu Taniguchi, Hiroki Nishikawa, and Takao Onoye, "Live Demonstration: In-Vehicle Auditory Signal Evaluation Platform in a Driving Simulator," In Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), May 2023. [1592.pdf]

[3] Shotaro Nonaka, Daichi Watari, Ittetsu Taniguchi, and Takao Onoye, "Deep Reinforcement Learning-Based SOH-aware Battery Management for DER Aggregation," In Proceedings of the 9th ACM International Conference on Systems for Energy-Efficient Buildings, Cities, and Transportation, 471–474, December 2022. [Buildsys_nonaka_proceeding.pdf]

[4] Naoya Kaneko, Koki Iwabuchi, Kenshiro Kato, Daichi Watari, Dafang Zhao, Ittetsu Taniguchi, Hiroki Nishikawa, and Takao Onoye, "An Evaluation of Electricity Demand Forecasting Models for Smart Energy Management Systems," In Proc. of 19th International SoC Design Conference (ISOCC), pages 195-196, October 2022. [SS5-1(43).pdf]

[5] Dafang Zhao, Ittetsu Taniguchi, Francky Catthoor, and Takao Onoye, "Transient Response and Non-Linear Capacity Variation Aware Unified Equivalent Circuit Battery Model," Proc. of 8th World Conference on Photovoltaic Energy Conversion (WCPEC-8), volume 5DV.2.4, September 2022.

[6] Fuma Sawa, Yoshinori Kamizono, Wataru Kobayashi, Ittetsu Taniguchi, Hiroki Nishikawa, and Takao Onoye, "Development of In-Vehicle Auditory Signal Evaluation Platform in a Driving Simulator," In Proc. of International Workshop on Smart Info-Media Systems in Asia (SISA), pages 37-40, September 2022. [08_RS1-2_(6).pdf]

[7] Mitsuhiro Watanabe, Yoshinori Kamizono, Fuma Sawa, Wataru Kobayashi, Ittetsu Taniguchi, and Takao Onoye, "Development of 3D Sound Localization Platform for Online Communications," In Proc. of International Workshop on Smart Info-Media Systems in Asia (SISA), pages 41-44, September 2022. [09_RS1-3_(7).pdf]

[8] Y. Kamizono, W. Kobayashi, I. Taniguchi, H. Nishikawa, and T. Onoye, "The 3D Sound Localization Platform with Reflected Sounds," In Proc. of International Workshop on Smart Info-Media Systems in Asia (SISA), pages 11-14, September 2022. [03_SS1-3_(8).pdf]

[9] Dafang Zhao, Ittetsu Taniguchi, and Takao Onoye, "A Low-Cost Privacy Concerning Occupancy Estimation System for Hvac Control," In 2022 International Conference on Electronics, Information, and Communication (ICEIC), pages 1-3, 2022.

[10] Kenshiro Kato, Daichi Watari, Dafang Zhao, Hiroki Nishikawa, Ittetsu Taniguchi, and Takao Onoye, "Scheduling for Multiple Hvac Systems with Electrical Power Allocation," In 2022 IEEE 11th Global Conference on Consumer Electronics (GCCE), pages 226-227, 2022.

[11] Taiyo Natomi, Yasuji Kitabatake, Kazuyuki Fujita, Takao Onoye, and Yuichi Itoh, "An Infant-Like Device That Reproduces Hugging Sensation with Multi-Channel Haptic Feedback," In 27th ACM Symposium on Virtual Reality Software and Technology (VRST ’21), number 55, pages 1-3, December 2021.

[12] Daichi Watari, Ittetsu Taniguchi, and Takao Onoye, "Improving Duck Curve by Dynamic Pricing and Battery Scheduling Based on a Deep Reinforcement Learning Approach," In Proc. of the 8th ACM International Conference on Systems for Energy-Efficient Buildings, Cities, and Transportation (BuildSys), pages 232-233, November 2021. [3486611.3492232 (3).pdf]

[13] Koki Iwabuchi, Kenshiro Kato, Daichi Watari, Ittetsu Taniguchi, Francky Catthoor, Eli Shirazi, and Takao Onoye, "Demand-Aware Electricity Price Prediction Based on Lstm and Wavelet Transform," In 38th European Photovoltaic Solar Energy Conference and Exhibition, 1668 - 1670, September 2021. [7DV.1.4_paper.pdf]

[14] Daichi Watari, Ittetsu Taniguchi, Francky Catthoor, Charalampos Marantos, Kostas Siozios, Elham Shirazi, Dimitrios Soudris, and Takao Onoye, "Thermal Comfort Aware Online Energy Management Framework for a Smart Residential Building," In Design, Automation and Test in Europe Conference (DATE), pages 535-538, February 2021. [camera-ready_daichi_DATE21.pdf]

[15] Dafang Zhao, Daichi Watari, Yuki Ozawa, Ittetsu Taniguchi, Toshihiro Suzuki, Sumio Shiochi, Yoshiyuki Shimoda, and Takao Onoye, "Online Management Framework for Building Hvac Systems Considering Peak Shaving and Thermal Comfort: an Experimental Study," In Proceedings of the 9th Workshop on Modeling and Simulation of Cyber-Physical Energy Systems, pages 1-7, 2021.

[16] , An Evaluation of Edge Computing Platform for Reliable Automated Drones, 2020.

[17] Suzunaga Saya, Itoh Yuichi, Fujita Kazuyuki, Shirai Ryo, and Onoye Takao, "Coiled Display: Make Everything Displayable," In SIGGRAPH Asia 2020 Emerging Technologies, pages 01-02, 2020.

[18] , Parallelization of Local Path Planning for High Reliable Autonomous Drones, 2020.

[19] Yoshitaka Ishihara, Ryo Shirai, Yuichi Itoh, Kazuyuki Fujita, and Takao Onoye, "Stickytouch: an Adhesion Changeable Surface," In SIGGRAPH Asia 2019 Emerging Technologies, pages 44-45, November 2019. [2.pdf]

[20] Kenshiro Kato, Daichi Watari, Ittetsu Taniguchi, and Takao Onoye, "A Framework on Spatiotemporal Shifting of Solar Energy Based on Ev Aggregator," In Proc. 36th European Photovoltaic Solar Energy Conference and Exhibition (EU PVSEC 2019), pages 1877-1880, September 2019.

[21] Suzunaga Saya, Itoh Yuichi, Fujita Kazuyuki, Shirai Ryo, and Onoye Takao, "Tuve: a Shape-Changeable Display Using Fluids in a Tube," In Proceedings of the International Conference on Advanced Visual Interfaces, volume 34, pages 1-9, September 2019.

[22] aichi Watari, Ittetsu Taniguchi, Patrizio Manganiello, Hans Goverde, Francky Catthoor, and Takao Onoye, "An Online Multi-Scale Optimization Framework for Smart Pv Systems," In Proc. 36th European Photovoltaic Solar Energy Conference and Exhibition (EU PVSEC 2019), volume 6CO.15.1, pages 1681-1684, September 2019. [6CO.15.1_paper.pdf]

[23] Yoshitaka Ishihara, Shori Ueda, Yuichi Itoh, and Kazuyuki Fujita, "PlanT : a Plant-Based Ambient Display Visualizing Gradually Accumulated Information," In Asian CHI Symposium 2019, May 2019. [2.pdf]

[24] Yoshinori Kamizono, Takao Onoye, Wataru Kobayashi, Hidetaka Shibata, and Daisuke Okamoto, "Evaluation of Auditory Signals in an Automobile for Safe Driving," In International Symposium on Multimedia and Communication Technology (ISMAC), 2019. [2.pdf]

[25] Ryo Shirai, Yuichi Itoh, Shori Ueda, and Takao Onoye, "Optrod: Constructing Interactive Surface with Multiple Functions and Flexible Shape by Projected Image," In The 31st Annual ACM Symposium on User Interface Software and Technology Adjunct Proceedings(UIST '18 Adjunct ), pages 169-171, October 2018. [2.pdf]

[26] Daichi Watari, Ittetsu Taniguchi, and Takao Onoye, "SoH Aware Battery Management Optimization on Decentralized Energy Network," In the 9th ACM/IEEE International Conference on Cyber-Physical Systems (ICCPS 18), pages 337-338, April 2018. [2.pdf]

[27] Jin Liu, Masahide Hatanaka, and Takao Onoye, "A Collision Mitigation Method on Spatial Reuse for WLAN in a Dense Residential Environment," In The 21st Workshop on Synthesis And System Integration of Mixed Information techologies (SASIMI 2018), pages 302-307, March 2018.

[28] Qiaochu Zhao, Ittetsu Taniguchi, Makoto Nakamura, and Takao Onoye, "{An Efficient Parts Counting Method Based on Intensity Distribution Analysis for Industrial Vision Systems}," In The 21st Workshop on Synthesis And System Integration of Mixed Information techologies, March 2018. [2.pdf]

[29] S. Negoro, K. Maekawa, D. Sukezane, A. Shibata, I. Taniguchi, and H. Tomiyama, "Measurement and Modeling of Quadcopter Energy with Ros," In Proc. The 21st Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2018), pages 169--173, March 2018.

[30] 井上佑貴, 伊藤雄一, 尾上孝雄, "Tuve: a Flexible Display with Tube," SIGGRAPH ASIA 2018, 2018年.

[31] R. Shirai, Y. Itoh, T. Fukamachi, M. Yamashita, and T. Onoye, "Optrod: Operating Multiple Various Actuators Simultaneously by Projected Images," In SIGGRAPH Asia 2017 Emerging Technologies, number 11, pages 1-2, November 2017.

[32] K. Maekawa, S. Negoro, I. Taniguchi, and H. Tomiyama, "Power Measurement and Modeling of Quadcopters on Horizontal Flight," In International Workshop on Computer Systems and Architectures (CSA) in conjunction with International Symposium on Computing and Networking (CANDAR), xxx--xxx (4 pages), November 2017.

[33] M. Hashimoto, R. Shirai, Y. Itoh, and T. Hirose, "Toward Real-Time 3d Modeling System with Cubic-Millimeters Wireless Sensor Nodes (Invited)," Proceedings of IEEE International Conference on ASIC, pages 1087--1091, October 2017.

[34] R. Shirai, T. Hirose, and M. Hashimoto, "{Dedicated Antenna Less Power Efficient Ook Transmitter for Mm-Cubic Iot Nodes}," Proceedings of the 47th European Microwave Conference (EuMC), pages 101--104, October 2017.

[35] T. Yamamoto, H. Tomiyama, I. Taniguchi, S. Yamashita, and Y. Hara-Azumi, "Systematic Design of Approximate Array Multipliers with Different Accuracy," In International Workshop on Highly Efficient Neural Networks Design (HENND) in conjunction with ESWEEK, xxx--xxx (4 pages), October 2017.

[36] Yusuke Sakumoto and Ittetsu Taniguchi, "Evaluation of MCMC-Based Autonomous Decentralized Mechanism of Energy Interchange in Practical Scenario with Generation Fluctuation," In 22nd IEEE International Conference on Emerging Technologies & Factory Automation (ETFA2017), xxx--xxx (5 pages), September 2017.

[37] R. Shirai, J. Kono, T. Hirose, and M. Hashimoto, "Near-Field Dual-Use Antenna for Magnetic-Field Based Communication and Electrical-Field Based Distance Sensing in Mm^3-Class Sensor Node," Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS), pages 124--127, May 2017.

[38] Kazuki Hirosue, Shohei Ukawa, Yuichi Itoh, Takao Onoye, and Masanori Hashimoto, "Gpgpu-Based Highly Parallelized 3d Node Localization for Real-Time 3d Model Reproduction," In Proceedings of the 22nd International Conference on Intelligent User Interfaces 2017 (IUI '17), pages 173-178, March 2017.

[39] Yuki Tsujimoto, Yuichi Itoh, and Takao Onoye, "Ketsuro-Graffiti: an Interactive Dislplay with Water Condensation," In Proceedings of ACM International Conference on Interactive Surfaces and Spaces 2016 (ISS 2016), pages 49-55, November 2016.

[40] R. Doi, J. Hotate, T. Kishimoto, T. Higashi, H. Ochi, M. Tada, T. Sugibayashi, K. Wakabayashi, H. Onodera, Y. Mitsuyama, and M. Hashimoto, "Highly-Dense Mixed Grained Reconfigurable Architecture with Via-Switch," ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), March 2016.

[41] Y. Masuda, M. Hashimoto, and T. Onoye, "Measurement of Timing Error Detection Performance of Software-Based Error Detection Mechanisms and Its Correlation with Simulation," In ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), pages 28-35, March 2016.

[42] U. Schlichtmann, M. Hashimoto, I. H.-R. Jiang, and B. Li, "Reliability, Adaptability and Flexibility in Timing: Buy a Life Insurance for Your Circuits (Invited)," Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pages 705--711, January 2016.

[43] N. Banno, M.Tada, K. Okamoto, N. Iguchi, T. Sakamoto, M. Miyamura, Y. Tsuji, H. Hada, H. Ochi, H. Onodera, M. Hashimoto, and T. Sugibayashi Author(s) in English , "A Novel Two-Varistors (A-Si/Sin/A-Si) Selected Complementary Atom Switch (2v-1cas) for Nonvolatile Crossbar Switch with Multiple Fan-Outs," Technical Digest of IEEE International Electron Devices Meeting (IEDM), pages 32--35, December 2015.

[44] R. Doi, M. Hashimoto, and T. Onoye, "An Analytic Evaluation on Soft Error Immunity Enhancement Due to Temporal Triplication," IEEE Pacific Rim International Symposium on Dependable Computing (PRDC), November 2015.

[45] E. Aliwarga, J. Yu, M. Hatanaka, and T. Onoye, "Design of Generic Hardware for Soft Cascade-Based Linear Svm Classification," In International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), pages 257-262, November 2015.

[46] Y. Masuda, M. Hashimoto, and T. Onoye, "Performance Evaluation of Software-Based Error Detection Mechanisms for Localizing Electrical Timing Failures under Dynamic Supply Noise," In Proceedings of International Conference on Computer-Aided Design (ICCAD), pages 315-322, November 2015.

[47] S. Iizuka, Y. Masuda, M. Hashimoto, and T. Onoye, "Stochastic Timing Error Rate Estimation under Process and Temporal Variations," In Proceedings of International Test Conference (ITC), October 2015.

[48] Y. Akihara, T. Hirose, Y. Tanaka, N. Kuroki, M. Numa, and M. Hashimoto, "A Wireless Power Transfer System for Small-Sized Sensor Applications," Proceedings of International Conference on Solid State Devices and Materials (SSDM), pages 154--155, September 2015.

[49] M. Ueno, M. Hashimoto, and T. Onoye, "Real-Time On-Chip Supply Voltage Sensor and Its Application to Trace-Based Timing Error Localization," Proceedings of International On-Line Testing Symposium (IOLTS), pages 188--193, July 2015.

[50] S. Hirokawa, R. Harada, M. Hashimoto, K. Sakuta, and Y. Watanabe, "Neutron-Induced Seu and Mcu Rate Characterization and Analysis of Sotb and Bulk Srams at 0.3v Operation," IEEE Nuclear and Space Radiation Effects Conference (NSREC), July 2015.

[51] M. Hashimoto, "Run-Time Performance Adaptation: Opportunities and Challenges (Invited)," Proceedings of IEEE Conference on Electron Devices and Solid-State Circuits (EDSSC), June 2015.

[52] T. Uemura and M. Hashimoto, "Investigation of Single Event Upset and Total Ionizing Dose in Feram for Medical Electronic Tag," Proceedings of International Symposium on Reliability Physics (IRPS), April 2015.

[53] T. Uemura, S. Okano, T. Kato, H. Matsuyama, and M. Hashimoto, "Soft Error Immune Latch Design for 20 Nm Bulk Cmos," Proceedings of International Reliability Physics Symposium (IRPS), April 2015.

[54] T. Uemura, T. Kato, S. Okano, H. Matsuyama, and M. Hashimoto, "Impact of Package on Neutron Induced Single Event Upset in 20 Nm Sram," Proceedings of International Symposium on Reliability Physics (IRPS), April 2015.

[55] S. Ukawa, T. Shinada, M. Hashimoto, Y. Itoh, and T. Onoye, "3d Node Localization from Node-To-Node Distance Information Using Cross-Entropy Method," Proceedings of Virtual Reality Conference (VR), March 2015.

[56] M. Hashimoto, D. Alnajjar, H. Konoura, Y. Mitsuyama, H. Shimada, K. Kobayashi, H. Kanbara, H. Ochi, T. Imagawa, K. Wakabayashi, T. Onoye, and H. Onodera, "Reliability-Configurable Mixed-Grained Reconfigurable Array Compatible with High-Level Synthesis," Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pages 14--15, January 2015.

[57] S. Iizuka, Y. Higuchi, M. Hashimoto, and T. Onoye, "Area Efficient Device-Parameter Estimation Using Sensitivity-Configurable Ring Oscillator," Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pages 731--736, January 2015.

[58] T. Amaki, M. Hashimoto, and T. Onoye, "An Oscillator-Based True Random Number Generator with Process and Temperature Tolerance," Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pages 4--5, January 2015.

[59] Yuki Tsujimoto, Yuichi Itoh, and Takao Onoye, "Ketsuro-Graffiti: a Canvas with Computer Generated Water Condensation," In SIGGRAPH Asia 2015 Emerging Technologies, 15:1--15:2, 2015.

[60] M. Hashimoto, "Opportunities and Verification Challenges of Run-Time Performance Adaptation (Invited)," Proceedings of Asian Test Symposium (ATS), pages 248--253, November 2014.

[61] M. Hashimoto, "Stochastic Verification of Run-Time Performance Adaptation with Field Delay Testing (Invited)," Proceedings of Asia Pacific Conference on Circuits and Systems (APCCAS), pages 751--754, November 2014.

[62] Yohei Miyazaki, Yuichi Itoh, Yuki Tsujimoto, Masahiro Ando, and Takao Onoye, "Ketsuro-Graffiti: Water Condensation Display," In ACE '14 Proceedings of the 11th Conference on Advances in Computer Entertainment Technology, November 2014. [2.pdf]

[63] M. Hashimoto, "Toward Robust Subthreshold Circuit Design: Variability and Soft Error Perspective (Invited)," Proceedings of SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), October 2014.

[64] Kosuke Tomita, Masahide Hatanaka, and Takao Onoye, "An Approach to GPU Implementation of OFDM Transceiver Using Dynamic Spectrum Access," In 2014 International Workshop on Smart Info-Media Systems in Asia, SISA 2014, October 2014.

[65] A. Iokibe, M. Hashimoto, and T. Onoye, "Feasibility Evaluation on an Instant Invader Detection System with Ultrasonic Sensors Scattered on the Ground," Proceedings of International Conference on Sensing Technology (ICST), pages 188--193, September 2014.

[66] R. Harada, S. Hirokawa, and M. Hashimoto, "Measurement of Alpha- and Neutron-Induced Seu and Mcu on Sotb and Bulk 0.4 V Srams," IEEE Nuclear and Space Radiation Effects Conference (NSREC), July 2014.

[67] T. Uemura, T. Kato, R. Tanabe, H. Iwata, J. Ariyoshi, H. Matsuyama, and M. Hashimoto, "Optimizing Well-Configuration for Minimizing Single Event Latchup," IEEE Nuclear and Space Radiation Effects Conference (NSREC), July 2014.

[68] T. Uemura, T. Kato, R. Tanabe, H. Iwata, H. Matsuyama, M. Hashimoto, K. Takahisa, M. Fukuda, and K. Hatanaka, "Preventing Single Event Latchup with Deep P-Well on P-Substrate," Proceedings of International Reliability Physics Symposium (IRPS), June 2014.

[69] M. Ueno, M. Hashimoto, and T. Onoye, "Trace-Based Fault Localization with Supply Voltage Sensor," ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), March 2014.

[70] C.Siriteanu, A.Takemura, S.D. Blostein, S.Kuriki, and H.Shin, "Convergence Analysis of Performance-Measure Expressions for Mimo Zf under Rician Fading," Australian Communications Theory Workshop, AUSCTW'14, Sydney, Australia, 114-119 , February 2014.

[71] Masahiro Ando, Yuichi Itoh, Toshiki Hosoi, Kazuki Takashima, Kosuke Nakajima, and Yoshifumi Kitamura, "Stackblock: Block-Shaped Interface for Flexible Stacking," In Proc. of UIST, pages 41-42, 2014.

[72] Hiroaki Konoura, Dawood Alnajjar, Yukio Mitsuyama, Hiroyuki Ochi, Takashi Imagawa, Shinichi Noda, Kazutoshi Wakabayashi, Masanori Hashimoto, and Takao Onoye, "Mixed-Grained Reconfigurable Architecture Supporting Flexible Reliability and C-Based Design," In ReConFig, December 2013.

[73] J. Kono, M. Hashimoto, and T. Onoye, "Feasibility Evaluation of Near-Field Communication in Clay with 1-Mm^3 Antenna," Proceedings of Asia-Pacific Microwave Conference (APMC), pages 1121--1123, November 2013.

[74] R. Harada, M. Hashimoto, and T. Onoye, "Nbti Characterization Using Pulse-Width Modulation," IEEE/ACM Workshop on Variability Modeling and Characterization, November 2013.

[75] D. Alnajjar, H. Konoura, Y. Mitsuyama, H. Shimada, K. Kobayashi, H. Kanbara, H. Ochi, T. Imagawa, S. Noda, K. Wakabayashi, M. Hashimoto, T. Onoye, and H. Onodera, "Reliability-Configurable Mixed-Grained Reconfigurable Array Supporting C-To-Array Mapping and Its Radiation Testing," In Proceedings of IEEE Asian Solid-State Circuits Conference (A-SSCC), pages 313-316, November 2013.

[76] Kosuke Nakajima, Yuichi Itoh, Yusuke Hayashi, Kazuaki Ikeda, Kazuyuki Fujita, and Takao Onoye, "Emoballoon: a Balloon-Shaped Interface Recognizing Social Touch Interactions," In Proceedings of 10th International Conference on Advances in Computer Entertainment Technology, pages 182-197, November 2013.

[77] S. Iizuka, M. Mizuno, D. Kuroda, M. Hashimoto, and T. Onoye, "Stochastic Error Rate Estimation for Adaptive Speed Control with Field Delay Testing," In Proc. International Conference on Computer-Aided Design (ICCAD), pages 107-114, November 2013.

[78] T. Amaki, M. Hashimoto, and T. Onoye, "A Process and Temperature Tolerant Oscillator-Based True Random Number Generator with Dynamic 0/1 Bias Correction," In Proceedings of Asian Solid-State Circuits Conference (A-SSCC), pages 133-136, November 2013.

[79] M. Hashimoto, "Soft Error Immunity of Subthreshold Sram (Invited)," Proceedings of IEEE International Conference on ASIC, pages 91--94, October 2013.

[80] Simon Voelker, Kosuke Nakajima, Christian Thoresen, Yuichi Itoh, Kjell Ivar Øvergård, and Jan Borchers, "Pucs Demo: Detecting Transparent, Passive Untouched Capacitive Widgets," In Proceedings of the 2013 ACM International Conference on Interactive Tabletops and Surfaces, pages 325-328, October 2013.

[81] Simon Voelker, Kosuke Nakajima, Christian Thoresen, Yuichi Itoh, Kjell Ivar Øvergård, and Jan Borchers, "Pucs: Detecting Transparent, Passive Untouched Capacitive Widgets on UnmodifiEd Multi-Touch Displays," In Adjunct Publication of the 26th Annual ACM Symposium on User Interface Software and Technology, pages 1-2, October 2013.

[82] Simon Voelker, Kosuke Nakajima, Christian Thoresen, Yuichi Itoh, Kjell Ivar Øvergård, and Jan Borchers, "Pucs: Detecting Transparent, Passive Untouched Capacitive Widgets on UnmodifiEd Multi-Touch Displays," In Proceedings of the 2013 ACM International Conference on Interactive Tabletops and Surfaces, pages 101-104, October 2013.

[83] Y.Fukuhara, A.Yamada, and T.Onoye, "An Image Compression Method for Frame Memory Size Reduction Using Local Feature of Images," In The 18th Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2013), pages 288-289, October 2013.

[84] T. Uemura, T. Kato, H. Matsuyama, and M. Hashimoto, "Mitigating Multi-Cell-Upset with Well-Slits in 28nm Multi-Bit-Latch," IEEE Nuclear and Space Radiation Effects Conference (NSREC), July 2013.

[85] T. Uemura, T. Kato, H. Matsuyama, and M. Hashimoto, "Scaling Trend of Sram and Ff of Soft-Error Rate and Their Contribution to Processor Reliability on Bulk Cmos Technology," IEEE Nuclear and Space Radiation Effects Conference (NSREC), July 2013.

[86] T. Uemura, T. Kato, H. Matsuyama, and M. Hashimoto, "Soft-Error in Sram at Ultra Low Voltage and Impact of Secondary Proton in Terrestrial Environment," IEEE Nuclear and Space Radiation Effects Conference (NSREC), July 2013.

[87] Yohei Kojima, Kazuma Aoyama, Yuichi Itoh, Kazuyuki Fujita, Taku Fujimoto, and Kosuke Nakajima, "Polka Dot: the Garden of Water Spirits," In ACM SIGGRAPH 2013 Posters, July 2013.

[88] T. Shinada, M. Hashimoto, and T. Onoye, "Proximity Distance Estimation Based on Capacitive Coupling between 1mm^3 Sensor Nodes," Proceedings of International NEWCAS Conference, June 2013.

[89] M. Ueno, M. Hashimoto, and T. Onoye, "Real-Time Supply Voltage Sensor for Detecting/Debugging Electrical Timing Failures," Proceedings of Reconfigurable Architectures Workshop (RAW), pages 301--305, May 2013.

[90] Y. Higuchi, K. Shinkai, M. Hashimoto, R. Rao, and S. Nassif, "Extracting Device-Parameter Variations Using a Single Sensitivity-Configurable Ring Oscillator," Proceedings of IEEE European Test Symposium (ETS), pages 106--111, May 2013.

[91] M. Hashimoto, "Robust Subthreshold Circuit Design to Manufacturing and Environmental Variability (Invited)," China Semiconductor Technology International Conference (CSTIC), pages 1079--1084, March 2013.

[92] Kazuyuki Fujita, Yuichi Itoh, Kazuki Takashima, Kosuke Nakajima, Yusuke Hayashi, and Fumio Kishino, "Ambient Party Room: a Room-Shaped System Enhancing Communication for Parties Or Gatherings," In Proceedings of the 2nd International Workshop on Ambient Information Technologies, pages 1-4, March 2013.

[93] Kosuke Nakajima, Yuichi Itoh, Yusuke Hayashi, Kazuaki Ikeda, Kazuyuki Fujita, and Takao Onoye, "Emoballoon: a Balloon-Shaped Interface Recognizing Social Touch Interactions," In Proceedings of the 2nd International Workshop on Ambient Information Technologies, pages 13-16, March 2013.

[94] Yohei Kojima, Yuichi Itoh, Taku Fujimoto, and Kosuke Nakajima, "Polka Dot – the Garden of Water Spirits," In SIGGRAPH Asia 2013 Emerging Technologies, page 15, 2013. [2.pdf]

[95] 河野仁, 橋本昌宜, 尾上孝雄, "Feasibility Evaluation of Near-Field Communication in Clay with 1-Mm3 Antenna," Microwave Conference Proceedings (APMC), 2013 Asia-Pacific, pages 1121-1123, 2013年.

[96] D. Alnajjar, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Static Voltage Over-Scaling and Dynamic Voltage Variation Tolerance with Replica Circuits and Time Redundancy in Reconfigurable Devices," Proceedings of International Conference on ReConFigurable Computing and FPGAs (ReConFig), December 2012.

[97] Kazutaka Takeuchi, Ryusuke Miyamoto, and Takao Onoye, "High-Speed Multiview Video Decoding for Embedded System," In The First Asian Conference on Information Systems, ACIS 2012, December 2012.

[98] Yuya Iwasaki, Masahide Hatanaka, and Takao Onoye, "Performance Improvement of Channel Estimation for Ofdm Baseband Transceiver with Dynamic Subcarrier Selection," In The First Asian Conference on Information Systems,ACIS 2012, December 2012.

[99] I. Homjakovs, M. Hashimoto, T. Hirose, and T. Onoye, "Signal-Dependent Analog-To-Digital Converter Based on Minimax Sampling," Proceedings of International SoC Design Conference (ISOCC), 120 -- 123 , November 2012.

[100] Kazuki Takashima, Yusuke Hayashi, Kosuke Nakajima, and Yuichi Itoh, "Cup-Embedded Information Device for Supporting Interpersonal Communication," In Proceedings of Joint Virtual Reality Conference of ICAT, EGVE and EuroVR, pages 19-20, October 2012. [2.pdf]

[101] R. Harada, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Impact of Nbti-­Induced Pulse-Width Modulation on Set Pulse-Width Measurement," Proceedings of European Conference on Radiation and Its Effects on Components and Systems (RADECS), September 2012.

[102] T. Kameda, H. Konoura, D. Alnajjar, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "A Predictive Delay Fault Avoidance Scheme for Coarse-Grained Reconfigurable Architecture," Proceedings of International Conference on Field Programmable Logic and Applications (FPL) , August 2012.

[103] Kosuke Nakajima, Yuichi Itoh, Yusuke Hayashi, Kazuaki Ikeda, Kazuyuki Fujita, and Takao Onoye, "Emoballoon," In Proceedings of The 10th Asia Pacific Conference on Computer Human Interaction (APCHI2012), volume 2, pages 681-682, August 2012. [2.pdf]

[104] Ryusuke Endo, Yuichi Itoh, Kosuke Nakajima, Kazuyuki Fujita, and Fumio Kishino, "Planning-Capable Digital Signage System Using Multi-Touch Display," In Proceedings of The 10th Asia Pacific Conference on Computer Human Interaction (APCHI2012), volume 2, pages 545-554, August 2012. [2.pdf]

[105] R. Harada, S. Abe, H. Fuketa, T. Uemura, M. Hashimoto, and Y. Watanabe, "Angular Dependency of Neutron Induced Multiple Cell Upsets in 65-Nm 10t Subthreshold Sram," IEEE Nuclear and Space Radiation Effects Conference, July 2012.

[106] R. Harada, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Set Pulse-Width Measurement Eliminating Pulse-Width Modulation and Within-Die Process Variation Effects," Proceedings of International Reliability Physics Symposium (IRPS), April 2012.

[107] K. Watanabe, G. Fujita, T. Homemoto, and R. Hashimoto, "A High-Speed H.264/AVC CABAC Decoder for 4K Video Utilizing Residual Data Accelerator," The 17th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2012), pages 6-10, March 2012.

[108] H. Shigeta, J. Nakase, Y. Tsunematsu, K. Kiyokawa, M. Hatanaka, K. Hosoda, M. Okada, Y. Ishihara, F. Ooshita, H. Kakugawa, S. Kurihara, and K. Moriyama, "Implementation of a Smart Office System in an Ambient Environment," In The 1st International Workshop on Ambient Information Technologies (AMBIT-2012), Orange County, CA, USA, March 2012.

[109] K. Kiyokawa, M. Hatanaka, K. Hosoda, M. Okada, H. Shigeta, Y. Ishihara, F. Ooshita, H. Kakugawa, S. Kurihara, and K. Moriyama, "Owens Luis - a Context-Aware Multi-Modal Smart Office Chair in an Ambient Environment," In The 1st International Workshop on Ambient Information Technologies (AMBIT-2012), Orange County, CA, USA, March 2012.

[110] Kazuyuki Fujita, Yuichi Itoh, Hiroyuki Ohsaki, Naoaki Ono, Keiichiro Kagawa, Kazuki Takashima, Sho Tsugawa, and Kosuke Nakajima, "Ambient Suite: Room- Shaped Information Environment for Interpersonal Communication," In Proceedings of the 1st International Workshop on Ambient Information Technologies, pages 18-21, March 2012.

[111] Kosuke Nakajima, Yuichi Itoh, Takayuki Tsukitani, Kazuyuki Fujita, Kazuki Takashima, Yoshifumi Kitamura, and Fumio Kishino, "Fusa2 Touch Display: Furry and Scalable Multi-Touch Display," In Proceedings of The 1st International Workshop on Ambient Information Technologies, pages 35-36, March 2012. [2.pdf]

[112] Yusuke Hayashi, Yuichi Itoh, Kazuki Takashima, Kazuyuki Fujita, Kosuke Nakajima, Ikuo Daibo, and Takao Onoye, "Cup-Le: a Cup-Shaped Device for Conversational Experiment," In Proceedings of the 1st International Workshop on Ambient Information Technologies, pages 36-37, March 2012.

[113] S. Kimura, M. Hashimoto, and T. Onoye, "Body Bias Clustering for Low Test-Cost Post-Silicon Tuning," In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pages 283--289, February 2012.

[114] Takashi Nakamae, Akihisa Yamada, Masayuki Yamaguchi, and Takao Onoye, "A Near-Lossless Image Compression Method Using Adaptive Variable Length Coding," In International Conference on Embedded Systems and Intelligent Technology, January 2012.

[115] K. Kiyokawa, M. Hatanaka, K. Hosoda, M. Okada, H. Shigeta, Y. Ishihara, F. Ooshita, H. Kakugawa, S. Kurihara, and K. Moriyama, "Owens Luis - a Proposal of a Smart Office Chair in an Ambient Environment," In The 21st International Conference on Artificial Reality and Telexistence (ICAT 2011), Osaka, Japan, November 2011.

[116] Kazuyuki Fujita, Yuichi Itoh, Hiroyuki Ohsaki, Naoaki Ono, Keiichiro Kagawa, Kazuki Takashima, Sho Tsugawa, Kosuke Nakajima, Yusuke Hayashi, and Fumio Kishino, "Ambient Suite: Enhancing Communication among Multiple Participants," In Proceedings of the International Conference on Advances in Computer Entertainment Technology , 25:1-25:8, November 2011. [2.pdf]

[117] Kosuke Nakajima, Yuichi Itoh, Takayuki Tsukitani, Kazuyuki Fujita, Kazuki Takashima, Yoshifumi Kitamura, and Fumio Kishino, "Fusa2 Touch Display," In Proceedings of ACM International Conference on Interactive Tabletops and Surfaces 2011, November 2011.

[118] Kosuke Nakajima, Yuichi Itoh, Takayuki Tsukitani, Kazuyuki Fujita, Kazuki Takashima, Yoshifumi Kitamura, and Fumio Kishino, "Fusa2 Touch Display: Furry and Scalable Multi-Touch Display," In Proceedings of ACM International Conference on Interactive Tabletops and Surfaces 2011, pages 35-44, November 2011. [2.pdf]

[119] H. Konoura, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Implications of Reliability Enhancement Achieved by Fault Avoidance on Dynamically Reconfigurable Architectures," In Proc. 21st International Conference on Field Programmable Logic and Applications (FPL2011), Chania, Crete, Greece, pages 189-194, September 2011.

[120] Toshihiro Kameda, Hiroaki Konoura, Yukio Mitsuyama, Masanori Hashimoto, and Takao Onoye, "Nbti Mitigation by Giving Random Scan-In Vectors During Standby Mode," In PATMOS2011, September 2011.

[121] Y. Takai, M. Hashimoto, and T. Onoye, "Power Gating Implementation for Noise Mitigation with Body-Tied Triple-Well Structure," In Proceedings of IEEE Custom Integrated Circuits Conference (CICC), September 2011.

[122] I. Homjakovs, M. Hashimoto, T. Hirose, and T. Onoye, "Signal-Dependent Analog-To-Digital Conversion Based on Minimax Sampling," In Proceedings of International Midwest Symposium on Circuits and Systems (MWSCAS), August 2011.

[123] M. Hashimoto and H. Fuketa, "Adaptive Performance Compensation with On-Chip Variation Monitoring (Invited)," In Proceedings of International Midwest Symposium on Circuits and Systems (MWSCAS), August 2011.

[124] M. Okada, T. Onoye, and W. Kobayashi, "A Ray Tracing Simulation of Sound Diffraction Based on Analytic Secondary Source Model," In 19th European Signal Processing Conference (EUSIPCO-2011), Barcelona, Spain, pages 1653-1657, August 2011.

[125] T. Amaki, M. Hashimoto, and T. Onoye, "An Oscillator-Based True Random Number Generator with Jitter Amplifier," In Proc. IEEE International Symposium on Circuits and Systems (ISCAS 2011), pages 725-728, May 2011.

[126] R. Harada, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Neutron Induced Single Event Multiple Transients with Voltage Scaling and Body Biasing," In Proc. International Reliability Physics Symposium (IRPS), April 2011.

[127] S. Kimura, M. Hashimoto, and T. Onoye, "Body Bias Clustering for Low Test-Cost Post-Silicon Tuning," In ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), pages 46--51, April 2011.

[128] D. Alnajjar, H. Kounoura, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Mttf Measurement under Alpha Particle Radiation in a Coarse-Grained Reconfigurable Architecture with Flexible Reliability," In IEEE Workshop on Silicon Errors in Logic - System Effects, March 2011.

[129] K. Shinkai, M. Hashimoto, and T. Onoye, "Extracting Device-Parameter Variations with Ro-Based Sensors," In ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), pages 13--18, March 2011.

[130] Tatsuo Maeno, Hiroshi Tsutsui, and Takao Onoye, "Hardware Implementation of Real-Time Motion Adaptive Deinterlacing Based on Inpainting," In International Conference on Embedded Systems and Intelligent Technology, February 2011.

[131] K. Shinkai and M. Hashimoto, "Device-Parameter Estimation with On-Chip Variation Sensors Considering Random Variability," In Proceedings of IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), pages 683-688, January 2011. [2.pdf]

[132] M. Hashimoto, "Run-Time Adaptive Performance Compensation Using On-Chip Sensors (Invited)," In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pages 285--290, January 2011.

[133] T. Amaki, M. Hashimoto, and T. Onoye, "Jitter Amplifier for Oscillator-Based True Random Number Generator," In Proc. Asia and South Pacific Design Automation Conference (ASP-DAC 2011), pages 81-82, January 2011.

[134] T. Amaki, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "A Design Procedure for Oscillator-Based Hardware Random Number Generator with Stochastic Behavior Modeling," In Proc. International Workshop on Information Security Applications (WISA 2010), pages 107-121, January 2011.

[135] M. Hatanaka, R. Hashimoto, T. Tatsuka, T. Onoye, H. Hatamoto, S. Ibi, S. Miyamoto, and S. Sampei, "VLSI Design of OFDM Baseband Transceiver with Dynamic Spectrum Access," In Proc. of the 18th International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS2010), pages 329-332, December 2010.

[136] Y. Takai, M. Hashimoto, and T. Onoye, "Evaluation of Power Gating Structures Focusing on Power Supply Noise with Measurement and Simulation," In Proceedings of IEEE Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS), pages 213--216, October 2010.

[137] Hideyuki Nakamura, Hiroshi Tsutsui, and Takao Onoye, "Motion-Compensated Frame Interpolation Using Feature Tracking and Motion Segmentation," In International Workshop on Smart Info-Media Systems in Asia, September 2010.

[138] T. Okumura and M. Hashimoto, "Setup Time, Hold Time and Clock-To-Q Delay Computation under Dynamic Supply Noise," In Proceedings of IEEE Custom Integrated Circuits Conference (CICC), September 2010.

[139] L. M. Handaya, M. Okada, T. Onoye, and W. Kobayashi, "Improvement of Frontal Localization with Complement of Multiple Delayed Sounds," 2010 International Workshop on Information Communication Technology, August 2010.

[140] K. Shinkai and M. Hashimoto, "Self-Heating in Nano-Scale Vlsi Interconnects," In Proceedings of International Workshop on Information Communication Technology (ICT), S-1-6, August 2010. [2.pdf]

[141] H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "Alpha-Particle-Induced Soft Errors and Multiple Cell Upsets in 65-Nm 10t Subthreshold Sram," In Proceedings of International Reliability Physics Symposium (IRPS), pages 213--217, May 2010.

[142] S. Abe, K. Shinkai, M. Hashimoto, and T. Onoye, "Clock Skew Reduction by Self-Compensating Manufacturing Variability with On-Chip Sensors," In Proc. Great Lakes Symposium on VLSI (GLSVLSI), May 2010.

[143] Y. Takai, Y. Ogasahara, M. Hashimoto, and T. Onoye, "Measurement of On-Chip I/O Power Supply Noise and Correlation Verification between Noise Magnitude and Delay Increase Due to Sso," In Proceedings of IEEE Workshop on Signal Propagation on Interconnects (SPI), pages 19--20, May 2010.

[144] D. Kuroda, H. Fuketa, M. Hashimoto, and T. Onoye, "A 16-Bit Risc Processor with 4.18pj/Cycle at 0.5v Operation," In Proceedings of IEEE COOL Chips, page 190, April 2010.

[145] H. Konoura, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Comparative Study on Delay Degrading Estimation Due to Nbti with Circuit/Instance/Transistor-Level Stress Probability Consideration," In Proc. International Symposium on Quality Electronic Design (ISQED), pages 646-651, March 2010.

[146] R. Harada, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Measurement Circuits for Acquiring SET Pulse Width Distribution with Sub-FO1-inverter-delay Resolution," In Proc. International Symposium on Quality Electronic Design (ISQED), March 2010. [2.pdf]

[147] S. Abe, K. Shinkai, M. Hashimoto, and T. Onoye, "Clock Skew Reduction by Self-Compensating Manufacturing Variability with On-Chip Sensors," In Proc. International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), March 2010.

[148] T. Enami, S. Ninomiya, K. Shinkai, S. Abe, and M. Hashimoto, "Statistical Timing Analysis Considering Clock Jitter and Skew Due to Power Supply Noise and Process Variation," In Proc. International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), pages 41-46, March 2010.

[149] Yuki Kawamura, Yasutake Manabe, Takao Onoye, Kazuto Ohara, Hiroyuki Okada, and Ikuo Keshi, "Implementation of Simultaneous Video Decoding on Multicore Processor," In Proc. of International Symposium on Communications, Control and Signal Processing (ISCCSP 2010), March 2010.

[150] H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "Adaptive Performance Control with Embedded Timing Error Predictive Sensors for Subthreshold Circuits," In Proc. Asia and South Pacific Design Automation Conference (ASP-DAC), pages 361-362, January 2010.

[151] T. Okumura, F. Minami, K. Shimazaki, K. Kuwada, and M. Hashimoto, "Gate Delay Estimation in Sta under Dynamic Power Supply Noise," In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), 775 -- 780, January 2010.

[152] D. Alnajjar, Y. Ko, T. Imagawa, M. Hiromoto, Y. Mitsuyama, M. Hashimoto, H. Ochi, and T. Onoye, "Soft Error Resilient Vlsi Architecture for Signal Processing," In Proceedings of IEEE International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), pages 183--186, December 2009.

[153] Koichi Hattori, Hiroshi Tsutsui, Hiroyuki Ochi, and Yukihiro Nakamura, "A High-Throughput Pipelined Architecture for JPEG XR Encoding," In Proc. of 7th IEEE Workshop on Embedded Systems for Real-Time Multimedia (ESTIMedia2009) , pages 9-17, October 2009.

[154] H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "Adaptive Performance Compensation with In-Situ Timing Error Prediction for Subthreshold Circuits," In Proc. IEEE Custom Integrated Circuits Conference, pages 215-218, September 2009.

[155] R. Hashimoto, T. Tatsuka, M. Hatanaka, T. Onoye, H. Hatamoto, S. Ibi, S. Miyamoto, and S. Sampei, "Implementation of Ofdm Baseband Transceiver with Dynamic Spectrum Access for Cognitive Radio Systems," In Proc. of 9th International Symposium on Communication and Information Technology (ISCIT2009), pages 658-663, September 2009.

[156] S. Ninomiya and M. Hashimoto, "Enhancement of Grid-Based Spatially-Correlated Variability Modeling for Improving Ssta Accuracy," In Proceedings of IEEE International SOC Conference (SOCC), pages 337--340, September 2009.

[157] D. Alnajjar, Y. Ko, T. Imagawa, H. Konoura, M. Hiromoto, Y. Mitsuyama, M. Hashimoto, H. Ochi, and T. Onoye, "Coarse-Grained Dynamically Reconfigurable Architecture with Flexible Reliability," In Proceedings of International Conference on Field Programmable Logic and Applications (FPL), pages 186--192, August 2009.

[158] K. Hamamoto, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "Tuning-Friendly Body Bias Clustering for Compensating Random Variability in Subthreshold Circuits," In Proceedings of IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), pages 51--56, August 2009.

[159] Masayuki Hiromoto, Hiroshi Tsutsui, Hiroyuki Ochi, Tomoyuki Osano, Norihiro Ishikawa, and Yukihiro Nakamura, "Dynamic Rate Control for Media Streaming in High-Speed Mobile Networks," In Proc. of IEEE Wireless Communications and Networking Conference (WCNC 2009), April 2009.

[160] D. Alnajjar, Y. Ko, T. Imagawa, M. Hiromoto, Y. Mitsuyama, M. Hashimoto, H. Ochi, and T. Onoye, "A Coarse-Grained Dynamically Reconfigurable Architecture Enabling Flexible Reliability," In Proceedings of IEEE Workshop on System Effects of Logic Soft Errors (SELSE), March 2009.

[161] M. Okada, N. Iwanaga, T. Matsumura, T. Onoye, and W. Kobayashi, "An Embedded Sound Localization System for Multiple Sources by Fuzzy Clustering with Spatial Constraints," In 2009 International Workshop on Nonlinear Circuits and Signal Processing (NCSP '09), Waikiki, Hawaii, pages 257-260, March 2009.

[162] S. Watanabe, M. Hashimoto, and T. Sato, "A Case for Exploiting Complex Arithmetic Circuits Towards Performance Yield Enhancement," In Proceedings of International Symposium on Quality Electronic Design (ISQED), pages 401--407, March 2009.

[163] Y. Ko, D. Alnajjar, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Coarse-Grained Dynamically Reconfigurable Architecture with Flexible Reliability," In Proceedings of Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI), pages 236--241, March 2009.

[164] K. Shinkai and M. Hashimoto, "A Gate Delay Model Focusing on Current Fluctuation Over Wide-Range of Process and Environmental Variability," In Proc. International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), pages 79-84, February 2009. [2.pdf]

[165] H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "Trade-Off Analysis between Timing Error Rate and Power Dissipation for Adaptive Speed Control with Timing Error Prediction," In Proc. Asia and South Pacific Design Automation Conference (ASP-DAC), pages 266-271, January 2009.

[166] L. Zhang, Y. Zhang, A. Tsuchiya, M. Hashimoto, E. Kuh, and C-K Cheng, "High Performance On-Chip Differential Signaling Using Passive Compensation for Global Communication," In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pages 385--390, January 2009.

[167] M. Okada, N. Iwanaga, T. Matsumura, T. Onoye, and W. Kobayashi, "A 3D Sound Localization Method for Multiple Sound Sources Based on Fuzzy Clustering," In 2008 International Workshop on Smart Info-Media Systems in Bangkok (SISB 2008), pages 133-138, December 2008.

[168] H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "Vth Variation Modeling and Its Validation with Ring Oscillation Frequencies for Body-Biased Circuits and Subthreshold Circuits," In ICCAD Colocated Workshop on Test Structure Design for Variability Characterization, November 2008.

[169] Koichi Hattori, Hiroshi Tsutsui, Hiroyuki Ochi, and Yukihiro Nakamura, "An Architecture of Photo Core Transform in HD Photo Coding System for Embedded Systems of Various Bandwidths," In Proc. of 2008 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS2008), pages 1592-1595, November 2008.

[170] T. Enami, M. Hashimoto, and T. Sato, "Decoupling Capacitance Allocation for Timing with Statistical Noise Model and Timing Analysis," In Proc. IEEE/ACM International Conference on Computer-Aided Design, pages 420-425, November 2008.

[171] Y. Ogasahara, M. Hashimoto, T. Kanamoto, and T. Onoye, "Measurement of Supply Noise Suppression by Substrate and Deep N-Well in 90nm Process," In Proceedings of IEEE Asian Solid-State Circuits Conference (A-SSCC), pages 397--400, November 2008.

[172] Y. Zhang, L. Zhang, A. Tsuchiya, M. Hashimoto, and C.-K. Cheng, "On-Chip High Performance Signaling Using Passive Compensation," In Proceedings of IEEE International Conference on Computer Design (ICCD), pages 182-187, October 2008.

[173] H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "Correlation Verification between Transistor Variability Model with Body Biasing and Ring Oscillation Frequency in 90nm Subthreshold Circuits," In Proc. IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), pages 3-8, August 2008.

[174] S. Takahashi, S. Tsukiyama, M. Hashimoto, and I. Shirakawa, "A Design Method of Finding Optimal Sampling Pulse and Transistor Size in a Sampling Circuit for Liquid Crystal Displays," In In Proceedings of International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), June 2008.

[175] S. Watanabe, M. Hashimoto, and T. Sato, "Cascading Dependent Operations for Mitigating Timing Variability," In Proceedings. of Workshop on Quality-Aware Design (W-QUAD), June 2008.

[176] K. Hamamoto, H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "Experimental Study on Body-Biasing Layout Style - Negligible Area Overhead Enables Sufficient Speed Controllability -," In ACM Great Lakes Symposium on VLSI, pages 387-390, May 2008.

[177] T. Enami, S. Ninomiya, and M. Hashimoto, "Statistical Timing Analysis Considering Spatially and Temporally Correlated Dynamic Power Supply Noise," In Proc. ACM International Symposium on Physical Design, pages 160-167, April 2008. [1.txt]

[178] H. Okuhata, K. Takahashi, Y. Nozato, T. Onoye, and I. Shirakawa, "Video Image Enhancement Scheme for High Resolution Consumer Devices," In Proc. of International Symposium on Communications, Control and Signal Processing (ISCCSP2008), pages 639-644, March 2008.

[179] S. Abe, M. Hashimoto, and T. Onoye, "Clock Skew Evaluation Considering Manufacturing Variability in Mesh-Style Clock Distribution," In Proc. International Symposium on Quality Electronic Design (ISQED), pages 520-525, March 2008.

[180] L. Zhang, J. Liu, H. Zhu, C-K Cheng, and M. Hashimoto, "High Performance Current-Mode Differential Logic," In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pages 720--725, January 2008.

[181] Y. Ogasahara, M. Hashimoto, and T. Onoye, "Dynamic Supply Noise Measurement Circuit Composed of Standard Cells Suitable for In-Site Soc Power Integrity Verification," In Proc. IEEE/ACM Asia and South Pacific Design Automation Conference, pages 107-108, January 2008.

[182] R. Hashimoto, K. Kato, G. Fujta, and T. Onoye, "VLSI Architecture of H.264 RDO-BASED Block Size Decision for 1080 HD," In Proc. PCS, November 2007.

[183] R. Hashimoto, T. Matsumura, Y. Nozato, K. Watanabe, and T. Onoye, "Implementation of Object Attention Based on Multi-Agent Attractor Selection," In Proc. SISB, November 2007.

[184] Yasutake Manabe, Junichi Hara, and Takao Onoye, "Jpm-Based Differential Image Storage Scheme for Image Revision Management System," In IIEEJ Image Electronics and Visual Computing Workshop 2007, November 2007.

[185] K. Takahashi, Y. Nozato, H. Okuhata, and T. Onoye, "VLSI Architecture for Real-Time Retinex Video Image Enhancement," In Proc. Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI 2007), pages 81--86, October 2007.

[186] K.Hamamoto, H.Fuketa, M.Hashimoto, Y.Mitsuyama, and T.Onoye, "A Study on Body-Biasing Layout Style Focusing on Area Efficiency and Speed Controllability," In Proc. Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI 2007), pages 233-237, October 2007.

[187] M. Hashimoto, J. Siriporn, A. Tsuchiya, H. Zhu, and C.-K. Cheng, "Analytical Eye-Diagram Model for On-Chip Distortionless Transmission Lines and Its Application to Design Space Exploration," In Proc. IEEE Custom Integrated Circuits Conference, pages 869-872, September 2007.

[188] T. Kanamoto, Y. Ogasahara, K. Natsume, K. Yamaguchi, H. Amishiro, T. Watanabe, and M. Hashimoto, "Impact of Well Edge Proximity Effect on Timing," In Proc. IEEE European Solid-State Device Research Conference, pages 115-118, September 2007.

[189] Y. Ogasahara, M. Hashimoto, and T. Onoye, "Dynamic Supply Noise Measurement with All Digital Gated Oscillator for Evaluating Decoupling Capacitance Effect," In Proc. IEEE Custom Integrated Circuits Conference, pages 783-786, September 2007.

[190] Mohd Nadzrul Bin Mohd Nor, T. Matsumura, and T. Onoye, "Direction of Arrival Estimation Improvement of Speech on a Two-Microphone Array," In IASTED International Conference on Signal and Image Processing, pages 576-115, August 2007.

[191] K. Shinkai, M. Hashimoto, and T. Onoye, "Future Prediction of Self-Heating in Short Intra-Block Wires," In Proc. International Symposium on Quality Electronic Design (ISQED), pages 660-665, March 2007.

[192] K. Watanabe, M. Ise, T. Onoye, H. Niwamoto, and I. Keshi, "An Energy-Efficient Architecture of Wireless Home Network Based on Mac Broadcast and Transmission Power Control," In International Conference on Consumer Electronics Digest of Technical Papers, P1-20, January 2007.

[193] R. Hashimoto, K. Kato, G. Fujta, and T. Onoye, "VLSI Architecture of H.264 Block Size Decision Based on Rate-Distortion Optimization," In Proc. ISPACS, pages 618--621, December 2006.

[194] K. Shinkai, M. Hashimoto, A. Kurokawa, and T. Onoye, "A Gate Delay Model Focusing on Current Fluctuation Over Wide-Range of Process and Environmental Variability," In Proc. International Conference on Computer-Aided Design (ICCAD), pages 47-53, November 2006.

[195] Y. Ogasahara, M. Hashimoto, and T. Onoye, "Quantitative Prediction of On-Chip Capacitive and Inductive Crosstalk Noise and Discussion on Wire Cross-Sectional Area Toward Inductive Crosstalk Free Interconnects," Proc. IEEE International Conference on Computer Design, pages 70--75, October 2006.

[196] J. Ashida, R. Miyamoto, H. Tsutsui, T. Onoye, and Y. Nakamura, "Probabilistic Pedestrian Tracking Based on a Skeleton Model," In Proc. International Conference on Image Processing, pages 2825--2828, October 2006.

[197] Y. Ogasahara, M. Hashimoto, and T. Onoye, "Measurement of Inductive Coupling Effect on Timing in 90nm Global Interconnects," In Proc. IEEE Custom Integrated Circuits Conference, pages 721--724, September 2006.

[198] Y. Ogasahara, T. Enami, M. Hashimoto, T. Sato, and T. Onoye, "Measurement Results of Delay Degradation Due to Power Supply Noise Well Correlated with Full-Chip Simulation," In Proc.~IEEE Custom Integrated Circuits Conference, pages 861--864, September 2006.

[199] A. Kosaka and T. Onoye, "Pipeline Processing of Continuous Speech Recognition Algorithm for Embedded System Implementation," In Proc. International Technical Conference on Circuits/Systems, Computers and Communication, volume Ⅱ, pages 373--376, July 2006.

[200] F. Hyuga, T. Masuzaki, H. Tsutsui, T. Onoye, and Y. Nakamura, "A JPEG Coding Scheme for High Fidelity Images by Halftoning Less Signification Extra Bits," In Proc. International Technical Conference on Circuits/Systems, Computers and Communication, volume Ⅲ, pages 97--100, July 2006.

[201] T. Ijichi, M. Hashimoto, S. Takahashi, S. Tsukiyama, and I. Shirakawa, "Transistor Sizing of Lcd Driver Circuit for Technology Migration," In Proceedings of International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), volume 1, I25--I28, July 2006.

[202] H. Sugano, H. Tsutsui, T. Masuzaki, T. Onoye, H. Ochi, and Y. Nakamura, "Efficient Memory Architecture for JPEG2000 Entropy Codec," In Proc. International Symposium on Circuits and Systems, pages 2881--2884, May 2006.

[203] K. Tsujino, W. Kobayashi, T. Onoye, and Y. Nakamura, "Automated Design of Digital Filters for 3-D Sound Localization in Embedded Applications," In Proc. International Conf. Audio, Speech, and Signal Processing (ICASSP2006), V.349--V.352, May 2006.

[204] T. Kanamoto, T. Ikeda, A. Tsuchiya, H. Onodera, and M. Hashimoto, "Si-Substrate Modeling Toward Substrate-Aware Interconnect Resistance and Inductance Extraction in Soc Design," In Proceedings of IEEE Wrokshop on Signal Propagation on Interconnects (SPI), pages 227--230, May 2006.

[205] A. Kotani, Y. Tanemura, Y. Mitsuyama, Y. Asai, Y. Nakamura, and T. Onoye, "Contour-Based Gravity Center Evaluation of Characters," In Proc. EUROMEDIA, pages 15--20, April 2006.

[206] Y. Mitsuyama, R. Imai, K. Takahashi, T. Onoye, and I. Shirakawa, "Domain-Specific Reconfigurable Architecture for Media Processing," In Proc. Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI 2006), pages 322--327, April 2006.

[207] K. Shinkai, M. Hashimoto, A. Kurokawa, and T. Onoye, "A Gate Delay Model Focusing on Current Fluctuation Over Wide-Range of Process and Environmental Variability," In Proc. International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), pages 59-64, February 2006.

[208] A. Tsuchiya, M. Hashimoto, and H. Onodera, "Interconnect Rl Extraction at a Single Representative Frequency," In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pages 515-520, January 2006.

[209] T. Kanamoto, T. Ikeda, A. Tsuchiya, H. Onodera, and M. Hashimoto, "Effective Si-Substrate Modeling for Frequency-Dependent Interconnect Resistance and Inductance Extraction," In The 3rd International Workshop on Compact Modeling, pages 51--56, January 2006.

[210] Z. Guo, Y. Nishikawa, R. Y. Omaki, T. Onoye, and I. Shirakawa, "A Low-Complexity FEC Assignment Scheme for Motion JPEG2000 Over Wireless Network," In International Conference on Consumer Electronics(ICCE2006), digest of technical papers, Las Vegas, Nevada, USA, pages 391--392, January 2006.

[211] S. Takahashi, A. Taji, S. Tsukiyama, M. Hashimoto, and I. Shirakawa, "A Design Scheme for Sampling Switch in Active Matrix LCD," In Proceedings of European Conference on Circuit Theory and Design, 3e-212, 2005.

[212] S. Takahashi, A. Taji, S. Tsukiyama, M. Hashimoto, and I. Shirakawa, "A Sampling Switch Design for Liquid Crystal Displays," In Proceedings of IEEE International Region 10 Conference, 1C-03.3, 2005.

[213] S. Takahashi, A. Taji, S. Tsukiyama, M. Hashimoto, and I. Shirakawa, "A Sampling Switch Design for Liquid Crystal Displays," In Proceedings of IEEE International Region 10 Conference, November 2005.

[214] T. Kouno, M. Hashimoto, and H. Onodera, "Input Capacitance Modeling of Logic Gates for Accurate Static Timing Analysis," In Proceedings of IEEE Asian Solid-State Circuits Conference (A-SSCC), pages 453-456, November 2005.

[215] 79-82, "Estimation of Maximum Oscillation Frequency for Cmos Lcvcos," In Estimation of Maximum Oscillation Frequency for CMOS LCVCOs, October 2005.

[216] M. Hashimoto, A. Tsuchiya, A. Shinmyo, and H. Onodera, "Performance Prediction of On-Chip High-Throughput Global Signaling," In Proceedings of IEEE 14th Topical Meeting on Electrical Performance of Electronic Packaging (EPEP), pages 79-82, October 2005.

[217] A. Tsuchiya, M. Hashimoto, and H. Onodera, "Design Guideline for Resistive Termination of On-Chip High-Speed Interconnects," In Proceedings of IEEE Custom Integrated Circuits Conference (CICC), pages 613-616, September 2005.

[218] Y. Ogasahara, M. Hashimoto, and T. Onoye, "Measurement and Analysis of Delay Variation Due to Inductive Coupling," In Proc. IEEE Custom Integrated Circuits Conference, pages 305--308, September 2005.

[219] S. Takahashi, A. Taji, S. Tsukiyama, M. Hashimoto, and I. Shirakawa, "A Design Scheme for Sampling Switch in Active Matrix Lcd," In A Design Scheme for Sampling Switch in Active Matrix LCD, August 2005.

[220] Huynh Van Nhat, T. Imanaka, G. Fujita, T. Onoye, and I. Shirakawa, "Real-Time Human Object Extraction for Mobile Terminal," In in Proc.The 20th Commemorative International Technical Conference on Circuits/Systems, Computers and Communications(ITC-CSCC2005), Jeju, Korea, volume 3, pages 1015-1016, July 2005.

[221] Y. Mitsuyama, R. Imai, K. Takahashi, T. Onoye, and I. Shirakawa, "An Approach for Area-Efficient Coarse-Grained Reconfigurable Architecture Dedicated to Media Processing," In Proc. International Technical Conference of Circuits/Systems, Computers and Communications (ITC-CSCC2005), pages 131--132, July 2005.

[222] A. Tsuchiya, M. Hashimoto, and H. Onodera, "Substrate Loss of On-Chip Transmission-Lines with Power/Ground Wires in Lower Layer," In Proceedings of IEEE Workshop on Signal Propagation on Interconnects (SPI), Proceedings of IEEE Workshop on Signal Propagation on Interconnects (SPI), May 2005.

[223] R. Miyamoto, H. Sugita, Y. Hayashi, H. Tsutsui, T. Masuzaki, T. Onoye, and Y. Nakamura, "High Quality Motion JPEG2000 Coding Scheme Based on the Human Visual System," In Proc. IEEE Int’l Symp. Circuits and Systems, pages 2096--2099, May 2005.

[224] T. Matsumura, N. Iwanaga, T. Onoye, W. Kobayashi, I. Shirakawa, and I. Arungsrisangchai, "3D Sound Movement System for Embedded Applications," In in Proc. IEEE International Symposium on Circuits and Systems (ISCAS2005), Kobe, Japan, pages 5345-5348, May 2005.

[225] A. Muramatsu, M. Hashimoto, and H. Onodera, "Effects of On-Chip Inductance on Power Distribution Grid," In Proceedings of International Symposium on Physical Design (ISPD), pages 63-69, April 2005.

[226] A. Tsuchiya, M. Hashimoto, and H. Onodera, "Effects of Orthogonal Power/Ground Wires on On-Chip Interconnect Characteristics," In Proceedings of International Meeting for Future of Electron Devices, Kansai, pages 33-34, April 2005.

[227] Y. Uchida, S. Tani, M. Hashimoto, S. Tsukiyama, and I. Shirakawa, "Interconnect Capacitance Extraction for System LCD Circuits," In in Proc. IEEE/ACM Great Lake Symposium on Very Large Scale Integrated circuits (GLSVLSI 2005), pages 160--163, April 2005.

[228] M. Hashimoto, T. Yamamoto, and H. Onodera, "Statistical Analysis of Clock Skew Variation in H-Tree Structure," In Proceedings of International Symposium on Quality Electronic Design (ISQED), pages 402-407, March 2005.

[229] A. Shinmyo, M. Hashimoto, and H. Onodera, "Design and Measurement of 6.4 Gbps 8:1 Multiplexer in 0.18um Cmos Process," In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), D9-D10, January 2005.

[230] A. Tsuchiya, M. Hashimoto, and H. Onodera, "Return Path Selection for Loop Rl Extraction," In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pages 1078-1081, January 2005.

[231] M. Hashimoto, J. Yamaguchi, T. Sato, and H. Onodera, "Timing Analysis Considering Temporal Supply Voltage Fluctuation," In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pages 1098-1101, January 2005.

[232] T. Matsumura, N. Iwanaga, W. Kobayashi, T. Onoye, and I. Shirakawa, "Embedded 3D Sound Movement System Based on Feature Extraction of Head-Related Transfer Function," In in Proc.~International Conference on Consumer Electronics (ICCE2005), digest of technical papers, Las Vegas, Nevada, USA, 7.1-2, January 2005.

[233] T. Sato, M. Hashimoto, and H. Onodera, "Successive Pad Assignment Algorithm to Optimize Number and Location of Power Supply Pad Using Incremental Matrix Inversion," In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pages 723-728, January 2005.

[234] T. Sato, N. Ono, J. Ichimiya, K. Hachiya, and M. Hashimoto, "On-Chip Thermal Gradient Analysis and Temperature Flattening for Soc Design," In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pages 1074-1077, January 2005.

[235] R. Miyamoto, Y. Hayashi, H. Tsutsui, T. Masuzaki, T. Onoye, and Y. Nakamura, "Video Quality Enhancement for Motion JPEG2000 Encoding Based on the Human Visual System," In Proc. IEEE Asia Pacific Conference on Circuits and Systems, pages 1161--1164, December 2004.

[236] K. Tsujino, W. Kobayashi, T. Izumi, T. Onoye, and Y. Nakamura, "Realtime Filter Redesign for Interactive 3-D Sound Systems," In Proc. IEEE Region 10 Conference, pages 124--127, November 2004.

[237] M. Hashimoto, A. Tsuchiya, A. Shinmyo, and H. Onodera, "Performance Prediction of On-Chip Global Signaling," In IEEE Electrical Design of Advanced Packaging and Systems (EDAPS) , pages 87-100, November 2004.

[238] M. Hashimoto, J. Yamaguchi, and H. Onodera, "Timing Analysis Considering Spatial Power/Ground Level Variation," In Proceedings of ACM/IEEE International Conference on Computer-Aided Design (ICCAD), pages 814-820, November 2004.

[239] N. Iwanaga, W. Kobayashi, K. Furuya, T. Onoye, and I. Shirakawa, "VLSI Implementation of 3D Sound Image Movement for Embedded Systems," In in Proc. IEEE Region 10 Conference (TENCON) 2004, A--021, November 2004.

[240] A. Muramatsu, M. Hashimoto, and H. Onodera, "Lsi Power Network Analysis with On-Chip Wire Inductance," In Proceedings of Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI), pages 55-60, October 2004.

[241] M. Hashimoto, A. Tsuchiya, and H. Onodera, "On-Chip Global Signaling by Wave Pipelining," In IEEE 13th Topical Meeting on Electrical Performance of Electronic Packaging (EPEP), pages 311-314, October 2004.

[242] M. Hashimoto, T. Yamamoto, and H. Onodera, "Statistical Analysis of Clock Skew Variation," In Proceedings of Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI), pages 214-219, October 2004.

[243] N. Iwanaga, W. Kobayashi, K. Furuya, T. Onoye, and I. Shirakawa, "VLSI Implementation of a 3D Sound Movement System," In in Proc. The 12th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI) 2004, pages 121-125, October 2004.

[244] T. Miyazaki, M. Hashimoto, and H. Onodera, "A Performance Prediction of Clock Generation Plls: a Ring Oscillator Based Pll and an Lc Oscillator Based Pll," In IEEJ International Analog VLSI Workshop, pages 45-50, October 2004.

[245] T. Sato, M. Hashimoto, and H. Onodera, "An Ir-Drop Minimization by Optimizing Number and Location of Power Supply Pads," In Proceedings of Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI), pages 66-72, October 2004.

[246] A. Tsuchiya, M. Hashimoto, and H. Onodera, "Performance Limitation of On-Chip Global Interconnects for High-Speed Signaling," In Proceedings of IEEE Custom Integrated Circuits Conference (CICC), pages 489-492, September 2004.

[247] H. Tsutsui, T. Masuzaki, Y. Hayashi, Y. Taki, T. Izumi, T. Onoye, and Y. Nakamura, "Scalable Design Framework for JPEG2000 System Architecture," In Proc. Asia-Pacific Computer Systems Architecture Conference, pages 6--11, September 2004.

[248] J. Ashida, R. Miyamoto, H. Tsutsui, T. Onoye, and Y. Nakamura, "A Scalable Approach for Estimation of Focus of Expansion," In Proc. IASTED International Conference on Visualization, Imaging, and Image Processing, pages 6--11, September 2004.

[249] S. Maeta, A. Kosaka, A. Yamada, T. Onoye, T. Chiba, and I. Shirakawa, "C-Based Hardware Design of IMDCT Accelerator for Ogg Vorbis Decoder," In in Proc.12th European Signal Processing Conference (EUSIPCO 2004), pages 1361--1364, September 2004.

[250] Y. Mitsuyama, M. Kimura, T. Onoye, and I. Shirakawa, "Embedded Architecture of IEEE802.11i Cipher Algorithms," In in Proc. 2004 IEEE International Symposium on Consumer Electronics (ISCE2004), pages 241--246, September 2004.

[251] A. Shinmyo, M. Hashimoto, and H. Onodera, "Design and Optimization of Cmos Current Mode Logic Dividers," In IEEE Asia-Pacific Conference on Advanced System Integrated Circuits , pages 434-435, August 2004.

[252] Y. Ogasahara, M. Ise, T. Onoye, and I. Shirakawa, "Architecture of Turbo Decoder for W-CDMA by Configurable Processor," In Proc.The 2004 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC2004), Sendai, Japan, F2P-27-1--7F2P-27-4, page 7, July 2004.

[253] T. Onoye, H. Tsutsui, G. Fujita, Y. Nakamura, and I. Shirakawa, "Embedded System Implementation of Scalable and Object-Based Video Coding," In in Proc. of World Automation Congress (WAC) , International Forum on Multimedia and Image Processing (IFMIP), IFMIP076, June 2004.

[254] H. Sugita, Q.-M. Vu, T. Masuzaki, H. Tsutsui, T. Izumi, T. Onoye, and Y. Nakamura, "JPEG2000 High-Speed Progressive Decoding Scheme," In Proc. IEEE International Symposium on Circuits and Systems, pages 873--876, May 2004.

[255] A. Kosaka, S. Yamaguchi, H. Okuhata, T. Onoye, and I. Shirakawa, "SoC Design of Ogg Vorbis Decoder Using Embedded Processor," In in Proc. 2004 Computing Frontier Conference, pages 481--487, April 2004.

[256] K. Tsujino, A. Shigiya, W. Kobayashi, T. Izumi, T. Onoye, and Y. Nakamura, "An Implementation of Moving 3-D Sound Synthesis System Based on Floating Point Dsp," In Proc. IEEE International Symposium on Signal Processing and Information Technology, WA4-8.1-WA4-8.4, December 2003.

[257] K. Tsujino, A. Shigiya, T. Izumi, T. Onoye, Y. Nakamura, and W. Kobayashi, "A Dsp-Based 3-D Sound Synthesis System for Moving Sound Images," In Proc. GAME-ON Conference, pages 23--25, November 2003.

[258] K. Hontani, T. Imanaka, G. Fujita, T. Onoye, and I. Shirakawa, "Modified Snake: Real-Time Face Object Extraction for Video Phone," In in Proc. IEEE International Conference on Image Processing(ICIP2003), Barcelona, Spain, volume III, pages 873--876, September 2003.

[259] M. Ise, Y. Ogasahara, T. Onoye, and I. Shirakawa, "Implementation of W-CDMA Channel Codec by Configurable Processors," In Proc. Sixth Baiona Workshop on Signal Processing in Communications, pages 205--210, September 2003.

[260] Y. Uchida, S. Tani, S. Tsukiyama, and I. Shirakawa, "Parasitic Capacitance Modeling for TFT Liquid Crystal Displays," In in Proc. The European Solid-State Device Research Conference (ESSDERC2003) , Estoril, Portugul, pages 453--456, September 2003.

[261] A. Kotani, Y. Asai, Y. Nakamura, S. Okada, N. Koyama, K. Yamane, Y.Okano, Y. Mitsuyama, and T. Onoye, "Visibility Font Technology on High Resolution Color LCD "LCFONT.C"," In in Proc. The 2003 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2003), Kang-Woo Do, Korea, volume 1, pages 535--538, July 2003.

[262] H.-S. Song, H. Okada, G. Fujita, T. Onoye, and I. Shirakawa, "Efficient Error Recovery Scheme for MPEG-4 Video Coding," In in Proc. The 2003 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC2003), Kang-Woo Do, Korea, volume 2, pages 1328--1331, July 2003.

[263] S. Yamaguchi, A. Kosaka, H. Okuhata, T. Onoye, and I. Shirakawa, "Low Power Ogg Vorbis Decoder by Embedded Processor," In in Proc. The 2003 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC2003), Kang-Woo Do, Korea, volume 1, pages 565--568, July 2003.

[264] T. Matsumura, N. Iwanaga, W. Kobayashi, T. Onoye, and I. Shirakawa, "Feature Extraction of Head-Related Transfer Function for 3D Sound Movement," In in Proc. The 2003 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC2003), Kang-Woo Do, Korea, volume 1, pages 685--688, July 2003.

[265] Y. Uchida, S. Tani, S. Tsukiyama, and I. Shirakawa, "Parasitic Capacitance Modeling for On-Chip Interconnects," In in Proc. The 2003 International Technical Conference on Circuits/Systems, Computers and ommunications (ITC-CSCC2003) , Kang-Woo Do, Korea, volume 3, pages 1638--1641, July 2003.

[266] N. Iwanaga, W. Kobayashi, K. Furuya, T. Onoye, and I. Shirakawa, "Embedded Implementation of Acoustic Field Enhancement for Stereo Sound Sources," In in IEEE 29th International Conference on Consumer Electronics (ICCE2003), digest of technical papers, Los Angeles, Carifornia, USA, pages 256--257, June 2003.

[267] M. Hatanaka, T. Masaki, M. Okada, and K. Murakami, "Implementation of PSK Demodulator for Digital BS/CS Broadcasting System," In in Proc. IEEE International Symposium on Circuits and Systems (ISCAS2003) , Bankok, Thailand, volume II, pages 764--767, May 2003.

[268] S. Komata, A. Pal, N. Sakamoto, W. Kobayashi, T. Onoye, and I. Shirakawa, "Interactive Interface of Realtime 3D Sound Movement for Embedded Applications," In in Proc. IEEE International Symposium on Circuits and Systems (ISCAS2003) , Bankok, Thailand, volume II, pages 520--523, May 2003.

[269] T. Okada, T. Uchida, T. Onoye, and I. Shirakawa, "A Novel Signal Processing Scheme for Next Generation GNSS Receiver," In in Proc. the 8th ISU International Symposium, Strasbourg, France, May 2003.

[270] Y. Hayashi, H. Tsutsui, T. Masuzaki, T. Izumi, T. Onoye, and Y. Nakamura, "Design Framework for JPEG2000 Encoding System Architecture," In Proc. International Symposium on Circuits and Systems, pages 740--743, May 2003.

[271] T. Okada, T. Uchida, T. Onoye, and I. Shirakawa, "A Novel Signal Processing Scheme for Next Generation GNSS Receiver and Its VLSI Implementation," In in Proc. International Signal Processing Conference , Dallas, number 357, April 2003.

[272] N. Iwanaga, W. Kobayashi, K. Furuya, N. Sakamoto, T. Onoye, and I.Shirakawa, "Low Cost Approach to Acoustic Field Enhancement for Stereo Headphones," In in Proc. Euromedia 2003, Plymouth, United Kingdom, pages 32--36, April 2003.

[273] S. Tani, Y. Uchida, M. Furuie, S. Tsukiyama, B. Lee, S. Nishi, Y. Kubota, I. Shirakawa, and S. Imai, "A Parasitic Capacitance Modeling Method for Non-Planar Interconnects," In in Proc. the Workshop on Synthesis and System Integration of Mixed Information Technologies (SASIMI 2003), pages 294--299, April 2003.

[274] T. Nakagawa, G. Fujita, T. Onoye, and I. Shirakawa, "Vlsi Architecture for Mpeg-4 Core Profile Codec Core," In Proc. Workshop on Synthesis and System Integration of Mixed Information Technologies, pages 365--371, April 2003.

[275] T. Yuasa, A. Tomita, T. Izumi, T. Onoye, and Y. Nakamura, "An Approach for Circuit Size Reduction by Variable Reordering for Pca-Chip2," In Proc. Workshop on Synthesis and System Integration of Mixed Information Technologies, pages 217--221, April 2003.

[276] T. Yuasa, Y. Soga, T. Izumi, T. Onoye, and Y. Nakamura, "An Improved Communication Channel in Dynamic Reconfigurable Device for Multimedia Applications," In Proc. EUROMEDIA, pages 152--157, April 2003.

[277] Y. Hayashi, H. Tsutsui, T. Masuzaki, T. Izumi, T. Onoye, and Y. Nakamura, "Scalable Design Framework for JPEG2000 Encoder Architecture," In Proc. Workshop on Synthesis and System Integration of Mixed Information Technologies, pages 372--376, April 2003.

[278] K. Hontani, T. Imanaka, G. Fujita, T. Onoye, and I. Shirakawa, "Realtime Face Object Extraction Algorithm for Video Phone," In in Proc. IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2002), Orchard Road, Singapore, volume 1, pages 35--38, December 2002.

[279] N. Iwanaga, W. Kobayashi, K. Furuya, N. Sakamoto, T. Onoye, and I. Shirakawa, "Embedded Implementation of Acousitic Field Enhancement for Stereo Headphones," In ibid, volume 1, pages 51--54, December 2002.

[280] S. Tani, Y. Uchida, M. Furuie, S. Tsukiyama, B. Lee, S. Nishi, Y. Kubota, I. Shirakawa, and S. Imai, "Parasitic Capacitance Modeling for Multilevel Interconnects," In in Proc. IEEE Proceedings of Asia-Pacific Conference on Circuits and Systems 2002, volume 1, pages 59--64, December 2002.

[281] Y. Ohtani, H. Nakaoka, T. Tomaru, K. Maruyama, T. Chiba, T. Onoye, and I. Shirakawa, "Implementation of Wireless MPEG2 Transmission System Using IEEE 802.11b PHY," In ibid, volume 1, pages 39--44, December 2002.

[282] A. Kosaka, S. Yamaguchi, H. Okuhata, T. Onoye, and I. Shirakawa, "VLSI Implementation of Ogg Vorbis Decoder for Embedded Applications," In in Proc. 15th Annual IEEE International ASIC/SoC Conference(ASIC/SoC2002), Rochester, N.Y., pages 20--24, September 2002.

[283] A. Kosaka, S. Yamaguchi, H. Okuhata, T. Onoye, and I. Shirakawa, "A Hardware Implementation of Ogg Vorbis Audio Decoder with Embedded Processor," In in Proc. 17th Annual International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC2002), Phuket, Thailand, pages 94--97, July 2002.

[284] H. Okada, A.-E. Shiitev, H.-S. Song, G. Fujita, T. Onoye, and I. Shirakawa, "Digital Watermark Based Error Detection for MPEG-4 Bitstream Error," In ibid, pages 152--155, July 2002.

[285] H.-S. Song, H. Okada, G. Fujita, T. Onoye, and I. Shirakawa, "Hybrid Error Concealment Algorithm for MPEG-4 Videodecoders," In ibid, pages 611--614, July 2002.

[286] K. Nakagawa, M. Kawakita, K. Sato, M. Minakuchi, O. Tsumori, K. Hanada, T. Chiba, and I. Shirakawa, "OCEAN: Object Communication Environment for Arbitrary Network," In in Proc. IEEE International Conference on Distributed Computing Systems Workshops, pages 162--166, July 2002.

[287] S. Komata, N. Sakamoto, W. Kobayashi, T. Onoye, and I. Shirakawa, "Synthesis of 3D Sound Movement by Embedded DSP," In ibid, pages 117--120, July 2002.

[288] T. Kaya, R. Miyamoto, T. Onoye, and I. Shirakawa, "Embedded System for Video Coding with Logic-Enhanced DRAM and Configurable Processor," In ibid, pages 216--219, July 2002.

[289] W. Kobayashi, K. Furuya, N. Sakamoto, T. Onoye, and I. Shirakawa, "`Out-Of-Head' Acoustic Field Enhancement for Stereo Headphones by Embedded DSP," In in IEEE 28th International Conference on Consumer Electronics (ICCE2002), digest of technical papers, Cardiff, Wales, pages 222--223, June 2002.

[290] Y. Ohtani, N. Kawahara, T. Onoye, I. Shirakawa, and T. Chiba, "MAC LSI Design for Wireless MPEG2 Transmission Over IEEE802.11b PHY," In ibid, pages 242--243, June 2002.

[291] H. Mizuno, H. Kobayashi, T. Onoye, and I. Shirakawa, "Power Estimation at Architecture Level for Embedded Systems," In ibid, volume II, pages 476--479, May 2002.

[292] Y. Mitsuyama, Z. Andales, T. Onoye, and I. Shirakawa, "Burst Mode: a New Acceleration Mode for 128-Bit Block Ciphers," In in Proc. IEEE 24th Custom Integrated Circuits Conference (CICC2002), Orland, Florida, pages 151--154, May 2002.

[293] Y. Mitsuyama, Z. Andales, T. Onoye, I. Shirakawa, and I. Arungsrisangchai, "VLSI Architecture of Burst Mode Acceleration for 128-Bit Block Ciphers," In ibid, volume II, pages 344--347, May 2002.

[294] Y. Ohtani, N. Kawahara, T. Tomaru, K. Maruyama, T. Onoye, I. Shirakawa, and T. Chiba, "Error Correction Block Based ARQ Protocol for Wireless Digital Video Transmission," In ibid, volume I, pages 605--608, May 2002.

[295] Y. Uchida, M. Ise, T. Onoye, I. Shirakawa, and I. Arungsrisangchai, "VLSI Architecture of Digital Matched Filter and Prime Interleaver for W-CDMA," In Proc. IEEE International Symposium on Circuits and Systems (ISCAS2002), Phoenix, Arizona, volume III, pages 269--272, May 2002.

[296] M. Kimura, M. H. Miki, T. Onoye, and I. Shirakawa, "A Java Accelerator for High Performance Embedded Systems," In in Proc. 4th International Conference of Massively Parallel Computing Systems (MPCS 2002), Ischia, Italy, 2, April 2002.

[297] N. Sakamoto, W. Kobayashi, T. Onoye, and I. Shirakawa, "DSP Implementation of Realtime 3D Sound Synthesis Algorithm for Monaural Sound Source," In in Proc. EUROMEDIA 2002, Modena, Italy, pages 123--127, April 2002.

[298] M. H. Miki, M. Kimura, T. Onoye, and I. Shirakawa, "High Performance Java Hardware Engine and Software Kernel for Embedded Systems," In in Proc. 11th IFIP International Conference on Very Large Scale Integration (VLSI-SOC 2001), Montpellier-Le Corum, France, pages 365--369, December 2001.

[299] H. Mizuno, H. Kobayashi, T. Onoye, and I. Shirakawa, "An Architecture Level Power Estimation Method for Embedded Systems," In in Proc. Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI 2001), Nara, Japan, pages 78--85, October 2001.

[300] M. Ise, Y. Uchida, T. Onoye, and I. Shirakawa, "System-On-A-Chip Architecture for W-CDMA Baseband Modem LSI," In in Proc. The 4th International Conference on ASIC (ASICON 2001), Shanghai, pages 364--369, October 2001.

[301] M. Kimura, M. H. Miki, T. Onoye, and I. Shirakawa, "High Performance Java Execution for Embedded Systems," In in Proc. Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI 2001), Nara, Japan, pages 346--350, October 2001.

[302] Z. Andales, Y. Mitsuyama, T. Onoye, and I. Shirakawa, "System Performance Evaluation of High-Speed Burst Mode for 128-Bit Block Ciphers," In in Proc. Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI 2001), Nara, Japan, pages 332--339, October 2001.

[303] M. Furuie, T. Onoye, S. Tsukiyama, and I. Shirakawa, "Two-Dimensional Array Layout for NMOS 4-Phase Dynamic Logic," In in Proc. The 8th IEEE International Conference on Electronics, Circuits and Systems(ICECS 2001), Malta, pages 589--592, September 2001.

[304] N. Sakamoto, W. Kobayashi, T. Onoye, and I. Shirakawa, "DSP Implementaion of 3D Sound Localization Algorithm for Monaural Sound Source," In in Proc. The 8th IEEE International Conference on Electronics, Circuits and Systems(ICECS 2001), Malta, pages 1061--1064, September 2001.

[305] N. Sakamoto, W. Kobayashi, T. Onoye, and I. Shirakawa, "DSP Implementation of Low Computational 3D Sound Localization Algorithm," In in Proc. 200l IEEE Workshop on Signal Processing Systems, Design and Implementation(SIPS 2001), Antwerp, Belgium, pages 109--116, September 2001.

[306] Y. Mitsuyama, Z. Andales, T. Onoye, and I. Shirakawa, "VLSI Implementation of High Performance Burst Mode for 128-Bit Block Ciphers," In in Proc. 14th Annual IEEE International ASIC/SoC Conference (ASIC/SoC2001), Washington, D.C., pp. W.1.1.1--W.1.1.5, September 2001.

[307] H. Okada, H. S. Song, G. Fujita, T. Onoye, and I. Shirakawa, "Error Detection Based on Check Marker Embedding for MPEG-4 Video Coding," In in Proc. International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC '01), Tokushima, Japan, pages 96--99, July 2001.

[308] H. S. Song, H. Okada, G. Fujita, T. Onoye, and I. Shirakawa, "Error Concealment Algorithm by Motion Estimation Method for MPEG-4 Video Decoder," In in Proc. International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC '01), Tokushima, Japan, pages 104--107, July 2001.

[309] N. Sakamoto, W. Kobayashi, T. Onoye, and I. Shirakawa, "Low Power DSP Implementation of 3D Sound Localization for Monaural Sound Source," In in Proc. World Multiconference on Systemics, Cybernetics and Informatics (SCI 2001), Orlando, Florida, USA, pages 173--177, July 2001.

[310] N. Sakamoto, W. Kobayashi, T. Onoye, and I. Shirakawa, "DSP Implementation of Realtime 3D Sound Localization Algorithm," In in Proc. International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC '01), Tokushima, Japan, pages 1140--1143, July 2001.

[311] T. Song, G. Fujita, T. Onoye, and I. Shirakawa, "Low Power Architecture for H.263 Version2 Codec," In in Proc. International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC '01), Tokushima, Japan, pages 620--623, July 2001.

[312] M. H. Miki, M. Sakamoto, S. Miyamoto, Y. Takeuchi, T. Yoshida, and I. Shirakawa, "Evaluation of Processor Code Efficiency for Embedded Systems," In in Proc. ACM 15th International Conference on Supercomputing, Sorrento, Italy, pages 229--235, June 2001.

[313] Y. Mitsuyama, Z. Andales, T. Onoye, and I. Shirakawa, "VLSI Architecture of Dynamically Reconfigurable Hardware-Based Cipher," In in Proc. IEEE International Symposium on Circuits and Systems (ISCAS2001) , Sydney, Australia, volume IV, pages 734--737, May 2001.

[314] Z. Andales, Y. Mitsuyama, T. Onoye, and I. Shirakawa, "A High Performance Burst Mode Approach for 128-Bit Block Ciphers," In in Proc. EUROMEDIA2001, Valencia, Spain, pages 146--150, April 2001.

[315] R. Y. Omaki, Y. Dong, M. H. Miki, M. Furuie, D. Taki, M. Tarui, G. Fujita, T. Onoye, and I. Shirakawa, "Realtime Wavelet Video Coder Based on Reduced Memory Accessing," In in Proc.~Asia and South Pacific Design Automation Conference (ASP-DAC 2001), Yokohama, Japan, pages 15--16, January 2001.

[316] Y. Mitsuyama, Z. Andales, T. Onoye, and I. Shirakawa, "A Dynamically Reconfigurable Hardware-Based Cipher Chip," In in Proc. Asia and South Pacific Design Automation Conference (ASP-DAC 2001), Yokohama, Japan, pages 11--12, January 2001.

[317] M. Furuie, T. Onoye, S. Tsukiyama, and Isao Shirakawa, "Two-Dimensional Array Layout for Low Power NMOS 4-Phase Dynamic Logic," In in Proc. International Conference on Electronics Packaging(2001 ICEP), Tokyo, April, 2001., pages 417--421, 2001.

[318] S. Hashimoto, A. Niwa, H. Okuhata, T. Onoye, and I. Shirakawa, "VLSI Implementation of Portable MPEG-4 Audio Decoder," In in Proc. International ASIC/SOC Conference (ASIC/SOC 2000), Arington, VA, USA, pages 80--84, September 2000.

[319] Y. Dong, R. Y. Omaki, T. Onoye, and I. Shirakawa, "VLSI Implementation of a Reduced Memory Bandwidth Realtime EZW Video Coder," In in Proc. International Conference on Image Processing (ICIP 2000), volume III, pages 126--129, September 2000.

[320] K. Kawamoto, S. Mizuno, H. Abe, Y. Higuchi, S. Fujino, and I. Shirakawa, "A Shingle Chip Automotive Control LSI Using SOI BiCDMOS," In in Proc. of 2000 International Conference on Solid State Device and Materials, pages 486-487, August 2000.

[321] N. Sakamoto, W. Kobayashi, T. Onoye, and I. Shirakawa, "Low Power DSP Implementation of 3D Sound Localization," In in Proc. International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2000), Pusan, Korea, pages 253--256, July 2000.

[322] R. Kuroda, G. Fujita, T. Onoye, and I. Shirakawa, "Discrete Cosine Transformer with Variable-Length Basis Vector for MPEG-4 Video Codec," In in Proc. International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2000), Pusan, Korea, pages 811--814, July 2000.

[323] T. Watanabe and N. Ishiura, "Minimization of Spill Code Insertion by Register Constraint Analysis for Code Generation for Application Specific DSPs," In in Proc. International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2000), Pusan, Korea, pages 953--956, July 2000.

[324] W. Kobayashi, N. Sakamoto, T. Onoye, and I. Shirakawa, "3D Acoustic Image Localization Algorithm by Embedded DSP," In in Proc. International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2000), Pusan, Korea, pages 264--267, July 2000.

[325] Y. Mitsuyama, Z. Andales, T. Onoye, and I. Shirakawa, "VLSI Implementation of Dynamically Reconfigurable Hardware-Based Cryptosystem," In in Symposium on VLSI Circuits Digest of Technical Papers, Hawaii, USA, pages 204--205, June 2000.

[326] M. Hatanaka, T. Masaki, and K. Murakami, "An Efficient Network Architecture for AAL Type2 and Its VLSI Implementation," In in Proc. EUROMEDIA2000 , Antwerp, Belgium, pages 123--125, May 2000.

[327] R. Y. Omaki, Y. Dong, M. H. Miki, M. Furuie, S. Yamada, D. Taki, M. Tarui, G. Fujita, T. Onoye, and I. Shirakawa, "VLSI Implementation of a Realtime Wavelet Video Coder," In in Proc. Custom Integrated Circuits Conference (CICC 2000), Florida, USA, pages 543--546, May 2000.

[328] Z. Andales, Y. Mitsuyama, T. Onoye, and I. Shirakawa, "Chameleon: a Dynamically Reconfigurable Hardware-Based Cryptosystem," In in Proc. EUROMEDIA2000 , Antwerp, Belgium, pages 90--94, May 2000.

[329] N. Ishiura, T. Watanabe, and M. Yamaguchi, "A Code Generation Method for Datapath Oriented Application Specific Processor Design," In in Proc. Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI 2000), pages 71--78, April 2000.

[330] M. Furuie, B. Y. Song, Y. Yoshida, T. Onoye, and I. Shirakawa, "Layout Generation of Array Cell for NMOS 4-Phase Dynamil Logic," In in Proc. ASP-DAC2000, pages 529--532, January 2000.

[331] M. Takahashi, N. Ishiura, A. Yamada, and T. Kambe, "Thread Partitioning Method for Hardware Compiler Bach," In in Proc. Asia and South Pacific Design Automation Conference (ASP-DAC 2000), pages 303--308, January 2000.

[332] R. Y. Omaki, G. Fujita, T. Onoye, and I. Shirakawa, "Video Coding Algorithm Based on Modified Discrete Wavelet Transform," In in Proc. NOLTA'99, volume I, pages 251--254, November 1999.

[333] R. Y. Omaki, G. Fujita, T. Onoye, and I. Shirakawa, "Architecture of Embedded Zerotree Wavelet Based Real-Time Video Coder," In in Proc. 12th IEEE ASIC/SOC Conference, pages 137-141, October 1999.

[334] M. Furuie, B. Y. Song, Y. Yoshida, T. Onoye, and I. Shirakawa, "Layout Generation for Low-Power NMOS 4-Phase Dynamic Logic Array," In in Proc. IEEE Region 10 Conference (TENCON '99), pages 872--875, September 1999.

[335] M. Tarui, M. Oshita, T. Onoye, and I. Shirakawa, "High-Speed Implementation of JBIG Arithmetic Coder," In in Proc. IEEE Region 10 Conference (TENCON '99), pages 1291--1294, September 1999.

[336] R. Y. Omaki, G. Fujita, T. Onoye, and I. Shirakawa, "Embedded Zerotree Wavelet Based Algorithm for Video Compression," In in Proc. IEEE Region 10 Conference (TENCON '99), pp.II-1343--1346, September 1999.

[337] B. Y. Song, M. Furuie, Y. Yoshida, T. Onoye, and I. Shirakawa, "Array Macro Cell Architecture for Low-Power NMOS 4-Phase Dynamic Logic," In in Proc. International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC '99), Sado, Japan, pages 561--564, July 1999.

[338] M. Oshita, M. Tarui, T. Onoye, and I. Shirakawa, "Pipelined Implementation of JBIG Arithmetic Coder," In in Proc. International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC '99), Sado, Japan, pages 470--473, July 1999.

[339] N. Ishiura and M. Yamaguchi, "Operation Binding for Retargetable Compilers Minimizing Clock Cycles," In in Proc. International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC '99), Sado, Japan, pages 705--708, July 1999.

[340] H. Fujishima, Y. Takemoto, T. Yoneda, T. Onoye, and I. Shirakawa, "Hybrid Media-Processor Core for Natural and Synthetic Video Decoding," In in Proc. IEEE International Symposium on Circuits and Systems (ISCAS '99) , Orland, USA, volume IV, pages 275--278, June 1999.

[341] M. H. Miki, D. Taki, G. Fujita, T. Onoye, I. Shirakawa, T. Fujiwara, and T. Kasami, "Recursive Maximum Likelihood Decoder for High-Speed Satellite Communication," In in Proc. IEEE International Symposium on Circuits and Systems (ISCAS '99) , Orland, USA, volume IV, pages 572--575, June 1999.

[342] G. Fujita, H. Okuhata, M. H. Miki, T. Onoye, and I. Shirakawa, "Low-Power Architecture of H.324 Codec Dedicated to Mobile Computing," In in Proc. EUROMEDIA'99 , Munich, Germany, pages 145--149, April 1999.

[343] K. Asari, Y. Mitsuyama, T. Onoye, I. Shirakawa, H. Hirano, T. Honda, T. Otsuki, T. Baba, and T. Meng, "Multi-Mode and Multi-Level Technologies for FeRAM Embedded Reconfigurable Hardware," In in Proc. IEEE Internatinal Solid-State Circuits Conference, pages 106--107, February 1999.

[344] H. Fujisima, Y. Takemoto, T. Onoye, I. Shirakawa, and K. Matsumura, "Matrix-Vector Multiplier Module for Natural/Synthetic Hybrid Video Coding," In in Proc. IEEE Asia Pacific Conference on Circuits and Systems, pages 631--634, November 1998.

[345] H. Fujisima, Y. Takemoto, T. Yoneda, T. Onoye, and I. Shirakawa, "Hybrid VLSI Architecture for Motion Compensation and Texture Mapping," In in Proc. IEEE International Workshop on Intelligent Signal Processing and Communication Systems, pages 383--386, November 1998.

[346] J. Fan, G. Fujita, M. Furuie, T. Onoye, and I. Shirakawa, "Structual Objeco-Oriented Video Segmentation and Representation Algorithm," In in Proc. IEEE International Workshop on Intelligent Signal Processing and Communication Systems, pages 78--82, November 1998.

[347] N. Ishiura, M. Yamaguchi, and T. Kambe, "A Graph-Based Algorithm of Operation Binding for Compilers Targeting Heterogeneous Datapath," In in Proc. IEEE Asia Pacific Conference on Circuits and Systems, pages 395--398, November 1998.

[348] B.Y. Song, Y. Yoshida, T. Onoye, and I. Shirakawa, "Delay and Power Simulation for a New Logic Scheme of NMOS 4-Phase Dynamic Logic," In in Proc. European Simulation Symposium, pages 339--343, October 1998.

[349] B.Y. Song, Y. Yoshida, T. Onoye, and I. Shirakawa, "Low-Power Implementation by a New Logic Scheme of NMOS 4-Phase Dynamic Logic," In in Proc. Workshop on Synthesis and System Integration of Mixed Technologies, pages 235--240, October 1998.

[350] J. Fan, G. Fujita, J. Yu, K. Miyanohana, T. Onoye, N. Ishiura, L. Wu, and I. Shirakawa, "Hierarchical Object-Oriented Image and Video Segmentation Algorithm Based on 2D Entropic Thresholding," In in Proc. Electronic Imaging and Multimedia Systems II, SPIE, pages 141--151, September 1998.

[351] K. Matsumura, G. Fujita, I. Shirakawa, and H. Inada, "A Wireless Data System Constructed of SAW-Based Receiver/Transmitter and Its Applications to Medical Cares," In in Proc. IEEE Radio & Wireless Conf., pages 47--50, August 1998.

[352] D. Taki, G. Fujita, T. Onoye, I. Shirakawa, T. Fujiwara, and T. Kasami, "VLSI Implementation of a Recursive Maximum Likelihood Decoder for High-Speed Satellite Communication," In in Proc. International Technical Conference on Circuits/Systems, Computers and Communications, pages 1383--1386, July 1998.

[353] H. Fujisima, Y. Takemoto, T. Onoye, and I. Shirakawa, "Matrix-Vector Multiplier for Natural/Synthetic Hybrid Video Coding," In in Proc. International Technical Conference on Circuits/Systems, Computers and Communications, pages 1269--1272, July 1998.

[354] K. Matsumura, G. Fujita, I. Shirakawa, and H. Inada, "A Wireless Data System by Means of SAW-Based Transmitter/Receiver and Its Applications to Medical Cares," In in Proc. International Technical Conference on Circuits/Systems, Computers and Communications, pages 299--302, July 1998.

[355] N. Ishiura, M. Yamaguchi, and N. Nitta, "Field Partitioning Algorithms for Compression of Instruction Codes of Application Specific VLIW Processors," In in Proc. International Technical Conference on Circuits/Systems, Computers and Communications, pages 1387--1390, July 1998.

[356] R. Y. Omaki, G. Fujita, T. Onoye, and I. Shirakawa, "Implementation of DWT and EZW Cores for a Bitrate Scalable Video Coder," In in Proc. International Technical Conference on Circuits/Systems, Computers and Communications, pages 221--224, July 1998.

[357] Y. Takemoto, T. Yoneda, H. Fujishima, T. Onoye, and I. Shirakawa, "VLSI Implementation of Function Module for Texture Mapping and Motion Compensation," In in Proc. International Technical Conference on Circuits/Systems, Computers and Communications, pages 179--182, July 1998.

[358] K. Matsumura, G. Fujita, I. Shirakawa, and H. Inada, "A Wireless Data Systems Constructed of SAW-Divices and Its Applications to Medical Cares," In in Proc. Analog VLSI WS, pages 39--44, June 1998.

[359] M. Yamaguchi, N. Ishiura, and T. Kambe, "A Binding Algorithm for Retargetable Compilation to Non-Orthogonal Datapath Architectures," In in Proc. International Symposium on Circuits and Systems, WPA4-4, June 1998.

[360] G. Fujita, H. Okuhata, M. H. Miki, T. Onoye, and I. Shirakawa, "Implementation of H.324 Audiovisual Codec for Mobile Computing," In in Proc. IEEE Custom Integrated Circuits Conference, pages 193--196, May 1998.

[361] H. Okuhata, M. H. Miki, T. Onoye, and I. Shirakawa, "A Low Power DSP Core Architecture for Low Bitrate Speech Codec," In in Proc. IEEE Int'l Conf. Acoustics, Sounds, and Signal Processing, pages 3121--3124, May 1998.

[362] M. Yamaguchi, N. Ishiura, and T. Kambe, "Binding and Scheduling Algorithms for Highly Retargetable Compilation," In in Proc. Aia and South Pacific Design Automation Conference (ASP-DAC '98), pages 93-98, February 1998.

[363] T. Onoye, G. Fujita, H. Okuhata, M. H. Miki, and I. Shirakawa, "Low-Power Implementation of H.324 Audiovisual Codec Dedicated to Mobile Computing," In in Proc. Aia and South Pacific Design Automation Conference (ASP-DAC '98), pages 589-594, February 1998.

[364] N. Ishiura and M. Yamaguchi, "Instruction Code Compression for Application Specific VLIW Processors Based on Automatic Field Partitioning," In in Proc. of the Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI'97), pages 105-109, December 1997.

[365] T. Masaki, Y. Nakatani, T. Onoye, and K. Murakami, "Performance Evaluation of Shared VCI Cell for Multimedia ATM Network," In in Proc. International Seminar on Teletraffic and Network, pages 482-485, November 1997.

[366] H. Fujishima, Y. Takemoto, T. Onoye, I. Shirakawa, and S. Sakaguchi, "A Unified Media-Processor Architecure for Video Coding and Computer Graphics," In in Proc. International Workshop on Synthetic-Natural Hybrid Coding and Three Dimensional Imaging, pages 253-256, September 1997.

[367] H. Uno, K. Kumatani, H. Okuhata, T. Chiba, and I. Shirakawa, "Low Power Architecture for High Speed Infrared Wireless Communication System," In in Proc.International Symposium on Low Power Electronics and Design, pages 255-258, August 1997.

[368] M. H. Miki, G.Fujita, T. Onoye, and I. Sirakawa, "Low-Power H.263 Video CoDec Dedicated to Mobile Computing," In in Proc. International Symposium on Low Power Electronics and Design, pages 80-83, August 1997.

[369] Y. Yoshida, B. Y. Song, H. Okuhata, T. Onoye, and I. Shirakawa, "An Object Code Compression Approach to Embedded Processors," In in Proc. International Symposium on Low Power Electronics and Design, pages 265-268, August 1997.

[370] H. Fujisima, Y. Takemoto, T. Onoye, and I. Shirakawa, "Media-Processor Architecture Unified for Video Coding and 3D Graphics," In in Proc. Int'l Technical Conference on Circuit/Systems, Computers and Communications, pages 1223-1226, July 1997.

[371] T. Masaki, Y. Nakatani, T. Onoye, and K. Murakami, "Fellow Cell Switching for Voice Communication on Multimedia ATM Network and Its VLSI Implementation," In in Proc. Int'l Technical Conference on Circuit/Systems, Computers and Communications, pages 1219-1222, July 1997.

[372] G. Fujita, T. Onoye, and I. Sirakawa, "A New Motion Estimation Core Dedicated to H.263 VideoCoding," In in Proc. IEEE International Symposium on Circuits and Systems, pages 1161-1164, June 1997.

[373] I. Arungsrisangchai, Y. Shigehiro, I. Shirakawa, and H. Takahashi, "A Fast Minimun Cost Flow Algofithm for VLSI Layout Compaction," In in Proc. IEEE International Symposium on Circuits and Systems, pages 1672-1675, June 1997.

[374] M.Yamaguchi, T. Nakaoka, A. Yamada, and T. Kambe, "An Architecture Evaluation System Based on the Datapath Structure and Parallel Constraint," In in Proc. IEEE International Symposium on Circuits and Systems, pages 1584-1587, June 1997.

[375] T. Masaki, Y. Nakatani, T. Onoye, and K. Murakami, "Multimedia ATM Network Using Shared VCI Cell and VLSI Implementation of Rerouting Node," In in Proc. IEEE International Symposium on Circuits and Systems, pages 2793-2796, June 1997.

[376] K. Miyanohana, G. Fujita, K. Yanagida, T. Onoye, and I. Shirakawa, "VLSI Implementation of Single Chip Encoder/Decoder for Low Bitrate Visual Communication," In in Proc. IEEE Custom Integrated Circuits Conference, pages 229-232, May 1997.

[377] H. Okuhata, H. Uno, K. Kumatani, I. Shirakawa, and T. Chiba, "A 4Mbps Infrared Wireless Link Dedicated to Mobile Computing," In in Proc. IEEE International Performance, Computing, and Communications Conference, pages 463-467, February 1997.

[378] M. Yamaguchi, A. Yamada, T. Nakaoka, and T. Kambe, "Architecture Evaluation Based on the Datapath Structure and Parallel Constraint," In in Proc. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC '97), pages 503-508, January 1997.

[379] S. Morikawa, K. Okada, S. Takeuchi, and I. Shirakawa, "A High Performance FIR Filter Dedicated to Digital Video Transmission," In in Proc. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC '97), pages 77-82, January 1997.

[380] G. Fujita, T. Onoye, I. Shirakawa, S. Tsukiyama, and K. Matsumura, "Implementation of Half-Pel Precision Motion Estimator for MPEG2 MP@HL," In in Proc. IEEE Region 10 International Conference on Digital Signal Processing Applications (TENCON '96), pages 949-954, November 1996.

[381] H. Kondo, A. Sugiyama, and M. E. Cannon, "Precise Carrier Phase GPS and Its Application to Real-Time Landslide Detection," In in Proc. IEEE Region 10 International Conference on Digital Signal Processing Applications (TENCON '96), pages 906-911, November 1996.

[382] H. Uno, K. Kumatani, H. Okuhata, I. Shirakawa, and T. Chiba, "A 4Mbps Infrared Wireless Communication System Dedicated to Mobile Computing," In in Proc. IEEE Asia Pacific Conference on Circuits and Systems (APCCAS '96), pages 334-337, November 1996.

[383] K. Miyanohana, G. Fujita, T. Onoye, and I. Shirakawa, "VLSI Implementation of Edge Detector and Vector Quantizer for Very Low Bitrate Video Encoding," In in Proc. IEEE Asia Pacific Conference on Circuits and Systems (APCCAS '96), pages 480-483, November 1996.

[384] Y. Konno, K. Nakamura, T. Bitoh, K. Saga, and S. Yano, "A Consistent Scan Design System for Large-Scale ASICs," In in Proc. Fifth Asian Test Symposium, pages 82-87, November 1996.

[385] K. Miyanohana, G. Fujita, T. Onoye, and I. Shirakawa, "Implementation of Very Low Bitrate Video Encoder Core," In in Proc. 2nd International Conference on ASIC, pages 131-134, October 1996.

[386] Y. Yoshida, B. Y. Song, H. Okuhata, T. Onoye, and I. Shirakawa, "Low-Power Consumption Architecture for Embedded Processor," In in Proc. 2nd International Conference on ASIC, pages 77-80, October 1996.

[387] T. Onoye, G. Fujita, M. Takatsu, I. Shirakawa, and K. Matsumura, "A Single Chip Motion Estimator Dedicated to MPEG2 MP@HL," In in Proc. European Signal Processing Conference, pages 1479-1482, September 1996.

[388] G. Fujita, H. Okuhata, Y. Nakatani, T. Onoye, and I. Shirakawa, "Single Chip MPEG2 MP@ML Motion Estimator," In in Proc. Int'l Technical Conference on Circuits/Systems, Computers and Communications, pages 286-289, July 1996.

[389] H. Uno, K. Kumatani, H. Okuhata, T. Masaki, I. Shirakawa, and T. Chiba, "A 4Mbps Infrared Wireless Communication Link for Mobile Computing," In in Proc. Workshop on Multi-Dimensional Mobile Communications (MDMC '96), pages 267-271, July 1996.

[390] K. Miyanohana, G. Fujita, T. Onoye, and I. Shirakawa, "VLSI Architecture for Very Low Bitrate Video Encoder Core," In in Proc. Int'l Technical Conference on Circuits/Systems, Computers and Communications, pages 294-297, July 1996.

[391] S. Nakamura, N. Ishiura, T. Yamamoto, and I. Shirakawa, "High-Level Synthesis System for Behavioral Descriptions with Conditional Branches," In in Proc. Int'l Technical Conference on Circuits/Systems, Computers and Communications, pages 935-938, July 1996.

[392] Y. Shigehiro, I. Shirakawa, I. Arungsrisangchai, and H. Takahashi, "A Fast Minimum Cost Flow Algorithm and Its Application to VLSI Layout Compaction," In in Proc. Int'l Technical Conference on Circuits/Systems, Computers and Communications, pages 951-954, July 1996.

[393] N. Shimizu, Y. Mizuta, H. Kondo, and H. Ono, "A New GPS Real-Time Monitoring System for Deformation Measurements and Its Application," In in Proc. 8th FIG Int. Symp. Deformation Measurements, Hong Kong, S1.5, pages 47-54, June 1996.

[394] K. Itoh, Y. Shigehiro, I. Shirakawa, and K. Matsumura, "An Approach for Multi-Layer Gridless Routing," In in Proc. Printed Circuit World Convention VII, pp.P2-1-P2-7, May 1996.

[395] T. Onoye, G. Fujita, M. Takatsu, I. Shirakawa, K. Matsumura, H. Ariyoshi, and S. Tsukiyama, "A VLSI Architecture of MPEG2 MP@HL Motion Estimator," In in Proc. IEEE Int'l Symposium on Circuits and Systems, pages 664-667, May 1996.

[396] T. Onoye, G. Fujita, M. Takatsu, I. Shirakawa, K. Matsumura, H. Ariyoshi, and S. Tsukiyama, "VLSI Implementation of Hierarchical Motion Estimator for MPEG2 MP@HL," In in Proc. IEEE Custom Integrated Circuits Conference, pages 351-354, May 1996.

[397] N. Shimizu, K. Nakagawa, and H. Kondo, "Displacement Monitoring by Using Global Positioning System," In in Proc. 4th Int. Symp. Field Measurements in Geomechanics, %Bergamo, Italy, pages 555-562, April 1996.

国内会議(査読付き)

[1] 上田将理, 伊藤雄一, 藤田和之, 尾上孝雄, "PlanT：植物を用いた積算情報可視化ディスプレイ," インタラクション2020論文集, pages 21-30, 2020年3月. [2.pdf]

[2] 岩瀬大輝, 伊藤雄一, 秦秀彦, 山下真由, 尾上孝雄, "アクティブ音響センシングによる日常物体識別と位置推定," インタラクション2018論文集, pages 62-71, 2018年2月.

[3] 井上佑貴, 伊藤雄一, 尾上孝雄, "TuVe: チューブを用いたディスプレイ," インタラクション2018, 2018年.

[4] 秋原優樹, 廣瀬哲也, 田中勇気, 黒木修隆, 沼昌宏, 橋本昌宜, "小型センサデバイスに向けた無線給電システムの設計," 回路とシステムワークショップ, pages 258--263, 2015年4月.

[5] 中島康祐, 伊藤雄一, Simon Voelker, Christian Thoresen, Kjell Ivar Øvergård, Jan Borchers, "PUCs: 静電容量方式マルチタッチパネルにおけるユーザの接触を必要と しないウィジェット検出手法," インタラクション2014論文集, 2014年3月.

[6] 中島康祐, 伊藤雄一, 遠藤隆介, 岸野文郎, "複合商業施設での複数人によるタイムスロット考慮型プランニングを実現するデジタルサイネージシステム," インタラクション2014論文集, 2014年3月.

[7] 中島康祐, 伊藤雄一, 林勇介, 池田和章, 藤田和之, 尾上孝雄, "Emoballoon: ソーシャルタッチインタラクションのための柔らかな風船型インタフェース," インタラクション2013論文集, pages 95-102, 2013年3月. [2.pdf]

[8] 安藤正宏, 細井俊輝, 中島康祐, 伊藤雄一, 北村喜文, 尾上孝雄, "ブロック型デバイスのための赤外線を用いた積み重ね形状認識におけるブロック間距離の影響に関する検討," 日本バーチャルリアリティ学会研究報告, volume 18, number CS-4, pages 11-14, 2013年.

[9] 小島康介, 橋本亮司, 藤田玄, "H.264 向け量子化パラメータを考慮した動きベクトル検出手法の一検討," 第22回 回路とシステム軽井沢ワークショップ , pages 142-147, 2009年4月.

研究会等発表論文

[1] 渡 大地, 谷口 一徹, Francky Catthoor, Charalampos Marantos, Kostas Siozios, Elham Shirazi, Dimitrios Soudris, 尾上孝雄, "［招待講演］熱的快適性を考慮したスマートビルディング向けオンラインエネルギーマネジメントに関する実証研究," 信学技報, volume 122, number 329, pages 5-6, 2023年1月. [desc]

[2] 新崎義峰, 伊藤弘大, 小玉伽那, 藤田和之, 武田理宏, 尾上孝雄, 伊藤雄一, "スクワットによる脚力疲労に伴う日常生活動作時の重心揺動変化に関する検討," ヒューマンインタフェース学会研究会研究報告集, volume 24, number 5, pages 003-008, 2022年6月.

[3] 渡 大地, 谷口 一徹, Francky Catthoor, Charalampos Marantos, Kostas Siozios, Elham Shirazi, Dimitrios Soudris, 尾上孝雄, "スマートビルディングにおける熱的快適性を考慮したオンラインエネルギーマネジメントフレームワーク," 信学技報, volume 121, number 92, pages 36-41, 2021年7月. [MSS_2021_submitted.pdf]

[4] 渡大地, 谷口一徹, Patrizio Manganiello, Hans Goverde, Francky Catthoor, 尾上孝雄, "An Online Multi-Scale Optimization Framework for Smart Pv Systems,," 計測自動制御学会 システム・情報部門 学術講演会 (SICE-SSI), 2020年11月.

[5] Suzunaga Saya, Itoh Yuichi, Fujita Kazuyuki, Shirai Ryo, and Onoye Takao, "CoiLED Display：ストライプ状LED群を用いたフレキシブルディスプレイ," In ヒューマンインタフェース学会研究会研究報告集, volume 22, number 6, pages 89-92, October 2020.

[6] 川崎祐太, 伊藤雄一, 藤田和之, 尾上孝雄, "アクティブ音響センシングを用いた物体情報識別における環境温度変化に関する一検討," ヒューマンインタフェース学会研究会研究報告集, volume 22, number 6, pages 055-060, 2020年10月. [SIGDeMO_submission.pdf]

[7] , How Far Can We Go with Scene Descriptions for Visual Question Answering?, 2020.

[8] 西村賢人, 伊藤雄一, 藤原健, 藤田和之, 松井裕子, 彦野賢, 尾上孝雄, "SenseChairによる意見発散課題におけるコミュニケーションとうなずきの関係性に関する検討," 信学技報, volume 120, number 136, HCS2020-32, pages 65-70, 2020年8月.

[9] , 次世代型自動車内サイン音の構成要素評価, 2020. [desc]

[10] 上田将理, 伊藤雄一, 藤田和之, 尾上孝雄, "PlanT：植物を用いた積算情報可視化アンビエントディスプレイ," ヒューマンインタフェース学会研究会研究報告集, volume 21, number 6, pages 71-76, 2019年10月. [2.pdf]

[11] 鈴永紗也, 伊藤雄一, 藤田和之, 尾上孝雄, "ガラス管を用いたボリューメトリックディスプレイのための気泡の位置制御," ヒューマンインタフェース学会研究会研究報告集, volume 21, number 4, pages 31-36, 2019年6月. [2.pdf]

[12] 渡大地, 谷口一徹, 尾上孝雄, "蓄電池劣化を抑制するシステムレベル蓄電池マネージメント手法," 信学技報, VLD2018-104, volume 118, number 457, pages 67-72, 2019年2月. [2.pdf]

[13] 坂井高志, 畠中理英, 尾上孝雄, "QC-LDPC符号の復号処理のGPU実装についての検討," 第31回 回路とシステムワークショップ, pages 214-219, 2018年5月.

[14] 山下真由, 伊藤雄一, 高嶋和毅, 尾上孝雄, "ペン把持力のセンシングによる理解状況推定," 電子情報通信学会技術研究報告, volume 117, number 509, pages 47-52, 2018年3月.

[15] 増山昌樹, 伊藤雄一, 西村賢人, 福島浩介, 尾上孝雄, "椅子用キャスター型デバイスを用いた着座状態識別に関する一検討," ヒューマンインタフェース学会研究会研究報告集, volume 20, number 7, pages 85-90, 2018年. [2.pdf]

[16] 石原好貴, 伊藤雄一, 尾上孝雄, "粘着を用いたタッチサーフェスのための粘着性変化モジュールの開発," ヒューマンインタフェース学会研究会研究報告集, 2018年. [2.pdf]

[17] 白井僚, 廣瀬哲也, 橋本昌宜, "IoTノード向けアンテナ組込型小体積高効率トランスミッタの開発," 電子情報通信学会技術研究報告, volume Vol. 117, number No. 343, pages 159--163, 2017年12月.

[18] 白井僚, 河野仁, 廣瀬哲也, 橋本昌宜, "近傍界磁界通信・電界測距共用mm^3級アンテナの実装と評価," 電子情報通信学会技術研究報告, volume Vol. 117, number No. 343, pages 101--105, 2017年12月.

[19] 岩瀬大輝, 伊藤雄一, 秦秀彦, 山下真由, 尾上孝雄, "アクティブ音響センシングを用いた物体識別と位置推定," 電子情報通信学会技術研究報告, volume 117, number 73, pages 135-140, 2017年6月.

[20] 増山昌樹, 伊藤雄一, 福島浩介, 尾上孝雄, "着座者の重心・重量取得のための椅子用キャスター型デバイスの検討," ヒューマンコミュニケーション基礎研究会（HCS）, volume 116, number 524, pages 95-100, 2017年3月.

[21] 白井僚，廣瀬哲也，橋本昌宜, "超小型IoTノード向けアンテナ組み込み型OOKトランスミッタの実装と評価," 第45回アナログRF研究会, page 2, 2017年3月.

[22] 山下真由, 伊藤雄一, 高嶋和毅, 尾上孝雄, "学習者の自信度と筆記行動の関係に関する検討," ヒューマンインタフェース学会研究会研究報告集, volume 19, number 7, pages 71-76, 2017年.

[23] 深町太一, 伊藤雄一, 尾上孝雄, "光信号を用いたアクチュエータ群制御システムの検討と評価," 日本バーチャルリアリティ学会研究報告, volume 21, number CS-4, pages 17-20, 2016年12月.

[24] 藤原健, 伊藤雄一, 續毅海, 高嶋和樹, 尾上孝雄, "演奏者の重心移動を用いた演奏連携度と演奏に対する評価," HCGシンポジウム2016論文集, pages 186-189, 2016年12月.

[25] 庄田駿一, 劉錦, 畠中理英, 尾上孝雄, "ノード位置推定を用いた無線LANのスループット向上手法に関する研究," 第29回 回路とシステムワークショップ, pages 81-83, 2016年5月.

[26] 深町太一，伊藤雄一，尾上孝雄, "汎用型光駆動アクチュエータのための制御ユニットの実装と評価," ヒューマンインタフェース学会研究会研究報告集, volume 18, number 7, pages 31-34, 2016年. [2.pdf]

[27] 山下真由, 伊藤雄一, 高嶋和毅, 尾上孝雄, "ペン把持力のセンシングによる筆記量推定手法," ヒューマンインタフェース学会研究会研究報告集, volume 18, number 5, pages 3-8, 2016年.

[28] 續毅海, 伊藤雄一, 藤原健, 高嶋和毅, 尾上孝雄, "演奏者の重心移動を用いた演奏連携度の取得に関する検討," ヒューマンインタフェース学会研究会研究報告集, volume 18, number 5, pages 15-18, 2016年. [2.pdf]

[29] 増田豊，橋本昌宜，尾上孝雄, "電源ノイズ起因タイミング故障のデバッグにおける C 言語ベース故障検出手法の有効性評価," 情報処理学会DAシンポジウム, 2015年8月.

[30] 辻本祐輝, 伊藤雄一, 尾上孝雄, "結露を用いたディスプレイの結露生成機構に関する研究," 研究報告ヒューマンコンピュータインタラクション（HCI）, volume 2015-HCI-164, number 5, pages 001-005, 2015年7月.

[31] E. Aliwarga, J. Yu, M. Hatanaka, and T. Onoye, "Hardware Architecture of Generic Soft Cascaded Linear Svm Classifier," number 75, 電子情報通信学会ディペンダブルコンピューティング研究会, June 2015.

[32] 檜原弘樹, 岩崎晃, 橋本昌宜, 越智裕之, 密山幸男, 小野寺秀俊, 神原弘之, 若林一敏, 杉林直彦, 竹中崇, 波田博光, 多田宗弘, "センサの知能化に適したプロセッサアーキテクチャの考察," 電子情報通信学会ディペンダブルコンピューティング研究会, number DC2015-8, pages 43--48, 2015年4月.

[33] S. Iizuka, Y. Higuchi, M. Hashimoto, and T. Onoye, "Area Efficient Device-Parameter Estimation Using Sensitivity-Configurable Ring Oscillator," 電子情報通信学会 VLSI設計技術研究会, March 2015.

[34] 鵜川翔平，信田龍哉，橋本昌宜，伊藤雄一，尾上孝雄, "クロスエントロピー法を用いたノード間距離情報に基づく3次元ノード位置推定," 情報処理学会ヒューマンコンピュータインタラクション研究会, 2015年1月.

[35] 土井龍太郎, 橋本昌宜, 尾上孝雄, "時間的三重化によるソフトエラー耐性向上の解析的評価," 電子情報通信学会ディペンダブルコンピューティング研究会, 2014年11月.

[36] 岡田史也, 畠中理英, 尾上孝雄, "ダイナミックスペクトルアクセス向けキャリアセンシング手法に関する一検討," 電子情報通信学会技術研究報告, volume 114, number 205, pages 57-62, 2014年9月.

[37] 増田豊, 橋本昌宜, 尾上孝雄, "電源ノイズ起因電気的故障を対象としたソフトウェアベース高速エラー検出手法の性能評価," 情報処理学会DAシンポジウム, pages 203--208, 2014年8月.

[38] 飯塚翔一, 樋口裕磨, 橋本昌宜, 尾上孝雄, "感度可変リングオシレータを用いた省面積デバイスパラメータばらつき推定手法," 情報処理学会DAシンポジウム, pages 15--20, 2014年8月.

[39] 宮崎陽平, 伊藤雄一, 藤原健, 高嶋和毅, 尾上孝雄, "着座揺動による会話者の行動の同期性検出に関する検討," HCS2014-53, 2014年8月. [2.pdf]

[40] 冨田幸佑, 畠中理英, 尾上孝雄, "ダイナミックスペクトルアクセスを用いたOFDM送受信機のGPU実装に関する一検討," 電子情報通信学会技術研究報告, volume 114, number 122, pages 81-86, 2014年7月.

[41] 河野仁, 鵜川翔平, 信田龍哉, 塚元瑞穂, 田中勇気, 中島康祐, 伊藤雄一, 廣瀬哲也, 橋本昌宜, "リアルタイム3次元モデリングシステムiClayの実現に向けた1mm^3級センサノードの要素技術開発," LSIとシステムのワークショップ, 2014年5月.

[42] 飯塚翔一, 水野雅文, 黒田弾, 橋本昌宜, 尾上孝雄, "プロセッサの適応的速度制御における故障発生時間見積り高速化に関する研究," LSIとシステムのワークショップ, 2014年5月.

[43] 郡浦宏明, 密山幸男, 橋本昌宜, 尾上孝雄, "動的部分再構成による故障回避に適した初期配置配線の検討," 情報処理学会SLDM研究会, 2014年3月.

[44] 鵜川翔平, 信田龍哉, 伊藤雄一, 橋本昌宜, 尾上孝雄, "ノード間距離情報に基づいた逐次的3次元ノード位置推定手法の検討," 信学技報 CAS研究会, 2014年3月.

[45] 橋本昌宜, "オンチップばらつきモニタリングによる適応的性能補償 (Invited)," 信学技報 集積回路研究会, 2014年1月.

[46] 尾上孝雄, 橋本昌宜, 密山幸男, Dawood Alnajjar, 郡浦宏明, "VLSIの信頼性を向上させる再構成可能アーキテクチャ (Invited)," 信学技報リコンフィギャラブルシステム研究会, 2013年11月.

[47] 菊地佑介, 津川翔, 岸野文郎, 中島康祐, 伊藤雄一, 大崎博之, "ココロスコア: Twitter解析によるココロの状態推測," 電子情報通信学会 通信行動工学時限研専 第5回研究会予稿集, pages 17-24, 2013年11月.

[48] 遠藤隆介, 伊藤雄一, 中島康祐, 岸野文郎, "複合商業施設における複数人でのタイムスロット考慮型プランニングを実現するデジタルサイネージシステム," 情報処理学会研究報告集, volume 2013-HCI-155, number 9, pages 1-8, 2013年10月.

[49] 安藤正宏, 細井俊輝, 中島康祐, 伊藤雄一, 北村喜文, 尾上孝雄, "積み木型ブロックデ バイスのための赤外線による積み重ね認識手法に関する検討," ヒューマンインタフェース学会研究報告集, volume 15, number 7, pages 125-128, 2013年9月.

[50] 飯塚翔一, 水野雅文, 黒田弾, 橋本昌宜, 尾上孝雄, "適応的速度制御における連続時間マルコフ過程を用いた故障発生時間高速評価手法," 情報処理学会DAシンポジウム, 2013年8月.

[51] 福原優貴, 山田晃久, 尾上孝雄, "画像の局所的特徴を利用したフレームメモリ容量削減のための画像圧縮手法," 信学技報, CAS2013-33, volume 113, number 118, pages 183-188, 2013年7月.

[52] 郡浦宏明, 今川隆司, 密山幸男, 橋本昌宜, 尾上孝雄, "動作合成に対応した信頼性可変混合粒度再構成可能アーキテクチャの検討," 信学技報, RECONF2013-8, volume 113, number 52, pages 41-46, 2013年5月.

[53] 原田諒, 密山幸男, 橋本昌宜, 尾上孝雄, "放射線起因一過性パルスが信頼性に与える影響の実験的評価," LSI とシステムのワークショップ, 2013年5月.

[54] 郡浦宏明, Dawood Alnajjar, 密山幸男, 越智裕之, 今川隆司, 野田真一, 若林一敏, 橋本昌宜, 尾上孝雄, "C ベース設計に対応した信頼性可変粒度複合型再構成可能アーキテクチャ," LSIとシステムのワークショップ, 2013年5月.

[55] 藤本拓, 伊藤雄一, 中島康祐, 土方義徳, 尾上孝雄, "ついでタスク推薦のためのコン ピュータ作業のクラスタリングに関する一検討," ARG Webインテリジェンスとイ ンタラクション研究会 第2回研究会予稿集, pages 13-14, 2013年5月.

[56] 信田龍哉, 橋本昌宜, 尾上孝雄, "センサノード間静電容量結合に基づく距離推定に向けた電極形状の検討," 信学技報, CAS2012-119, volume 112, number 484, pages 131-136, 2013年3月.

[57] 天木健彦, 橋本昌宜, 密山幸男, 尾上孝雄, "確率的動作モデルを用いたオシレータベース真性乱数生成回路のワーストケース設計手法," 信学技報, VLD2012-154, volume 112, number 451, pages 099-104, 2013年3月.

[58] 樋口裕磨, 橋本昌宜, 尾上孝雄, "オンチップセンサを用いたばらつき自己補償手法の検討," 信学技報 VLSI設計技術研究会, 2013年3月.

[59] 郡浦宏明, 今川隆司, 密山幸男, 橋本昌宜, 尾上孝雄, "動的部分再構成による故障回避に関する一考察," 信学技報, RECONF2012-59 , volume 112, number 325, pages 71-76, 2012年11月.

[60] 池田和章, 伊藤雄一, 中島康祐, 尾上孝雄, "着座時の座面重心と重量を用いた個人識別に関する検討," ヒューマンインタフェース学会研究報告集, volume 14, number 8, pages 11-16, 2012年9月.

[61] 藤田和之, 伊藤雄一, 高嶋和毅, 中島康祐, 林勇介, 岸野文郎, "Ambient Party Room: パーティ場面における部屋型会話支援システムの構築," ヒューマンインタフェース学会研究報告集, volume 14, number 8, pages 7-10, 2012年9月.

[62] 中川雄太, 藤井佑一, 岸野文郎, 中島康祐, 伊藤雄一, "立体形状の毛状マルチタッチ ディスプレイ," エンタテインメントコンピューティング2012論文集, pages 195-198, 2012年9月.

[63] 竹内一貴, 尾上孝雄, "多視点映像復号の組込み実装に関する一検討," 電子情報通信学会技術研究報告, volume 112, number 78, pages 71-76, 2012年6月.

[64] 児島陽平, 伊藤雄一, 藤田和之, 中島康祐, 尾上孝雄, "空間内の複数人員配置のための指示位置提示手法に関する検討," ヒューマンインタフェース学会研究報告集, volume 14, number 4, pages 17-22, 2012年6月.

[65] 遠藤隆介, 伊藤雄一, 中島康祐, 藤田和之, 岸野文郎, "マルチタッチディスプレイを用いたプランニングができるデジタルサイネージシステムの提案," ヒューマンインタフェース学会研究報告集, volume 14, number 4, pages 37-42, 2012年6月.

[66] 保米本徹, 畠中理英, 尾上孝雄, "ダイナミックスペクトルアクセスを用いた無線通信向けの伝搬路補償手法に関する一検討," 信学技報, CAS2011-126, volume 111, number 465, pages 109-114, 2012年3月.

[67] 天木健彦, 橋本昌宜, 尾上孝雄, "ゆらぎ増幅回路を用いたオシレータベース物理乱数生成器," 信学技報, ICD2011-118, volume 111, number 352, pages 087-092, 2011年12月.

[68] 池田和章, 伊藤雄一, 中島康祐, 尾上孝雄, "様々な椅子での重心・重量による姿勢識別率に関する検討," ヒューマンインタフェース学会研究報告集, volume 13, number 7, pages 33-38, 2011年10月.

[69] 池田和章, 林勇介, 中島康祐, 伊藤雄一, 尾上孝雄, "風精―気圧センサと風船を用いたタッチインタラクション検出," エンタテインメントコンピューティング2011論文集, pages 187-192, 2011年10月.

[70] 亀田敏広, 郡浦宏明, 密山幸男, 橋本昌宜, 尾上孝雄, "スキャンパスを用いたＮＢＴＩ劣化抑制に関する研究," 情報処理学会DAシンポジウム, pages 201-206, 2011年8月.

[71] 中前貴司, 山田晃久, 山口雅之, 尾上孝雄, "フレームメモリ容量削減のための準可逆画像圧縮手法," 信学技報, CAS2011-29, volume 111, number 102, pages 163-168, 2011年6月.

[72] 郡浦宏明, 密山幸男, 橋本昌宜, 尾上孝雄, "動的再構成可能アーキテクチャによる故障回避機構の定量的評価," 信学技報, RECONF2011-6, volume 111, number 31, pages 31-36, 2011年5月.

[73] 中島康祐, 伊藤雄一, 築谷喬之, 藤田和之, 高嶋和毅, 岸野文郎, "FuSA2 Touch Display: 大画面毛状マルチタッチディスプレイ," インタラクション2011論文集, pages 547-550, 2011年3月.

[74] 天木健彦, 橋本昌宜, 密山幸男, 尾上孝雄, "確率的動作モデルを用いたオシレータベース物理乱数生成器の設計手法," 情報処理学会研究報告, SLDM2010-147, volume 2010-SLDM-147, number 19, pages 1-6, 2010年11月.

[75] 岡田雅司, 尾上孝雄, 小林亙, "解析的二次音源モデルに基づく回折のレイトレーシングシミュレーション," 信学技報, EA2010-65, volume 110 , number 239 , 043-048 , 2010年10月.

[76] 榎並孝司, 木村修太, 橋本昌宜, 尾上孝雄, "自己性能補償に向けたカナリアFF挿入手法," 情報処理学会DAシンポジウム, pages 227-232, 2010年9月.

[77] 三瓶政一, 衣斐信介, 宮本伸一, 尾上孝雄, 畠中理英, "アンビエント情報環境のための無線アクセスに関する一検討 ― 無線分散ネットワーク技術からのアプローチ ―," 信学技報, SR2009-112, volume 109, number 442, pages 143-148, 2010年3月.

[78] 高井康充, 橋本昌宜, 尾上孝雄, "電源ノイズに注目した電源遮断法の実機評価," number 信学技報 vol.110, No344, 電子情報通信学会(IEICE), 2010年.

[79] 黒田弾, 更田裕司, 橋本昌宜, 尾上孝雄, "低エネルギー動作に適した超低電圧プロセッサのアーキテクチャ評価," 情報処理学会第141回システムLSI設計技術研究会, pp107-112, 2009年10月.

[80] 新開健一, 橋本昌宜, "広範囲な製造・環境ばらつきに対応したゲート遅延モデル," 情報処理学会DAシンポジウム, pages 73-78, 2009年8月.

[81] 橋本昌宜, 榎並孝司, 新開健一, 二宮進有, 阿部慎也, "電源ノイズや製造ばらつきによるクロックジッタ・スキューを考慮した統計的タイミング解析," 情報処理学会DAシンポジウム, pages 79-84, 2009年8月.

[82] 郡浦宏明, 密山幸男, 橋本昌宜, 尾上孝雄, "NBTI による劣化予測におけるトランジスタ動作確率算出法の評価," 情報処理学会DAシンポジウム, pages 181-186, 2009年8月.

[83] 松下裕丈, 河村侑輝, 尾上孝雄, 大原一人, 芥子育雄, "携帯機器における動画像ストリーム高速簡略復号の一手法," IEICE Technical Report SIS2009-4 (2009-6), pages 19-24, 2009年6月.

[84] 天木健彦, 橋本昌宜, 密山幸男, 尾上孝雄, "マルコフモデルによるオシレータサンプリング方式真性乱数生成器の乱数品質解析," 第22回回路とシステム軽井沢ワークショップ, pages 474-479, 2009年4月.

[85] 更田裕司, 橋本昌宜, 密山幸男, 尾上孝雄, "サブスレッショルド回路における基板バイアスを考慮したトランジスタのばらつきモデリングとリングオシレータを用いた検証," 信学技報, VLD2008-159, volume 108, number 478, pages 201-206, 2009年3月.

[86] 榎並孝司, 橋本昌宜, 佐藤高史, "電源ノイズ考慮統計的タイミング解析を用いたデカップリング容量割当手法," 信学技報, VLD2008-161, volume 108, number 478, pages 207-212, 2009年3月.

[87] 濱本浩一, 橋本昌宜, 密山幸男, 尾上孝雄, "レイアウトを考慮した基板バイアスクラスタリング手法," 信学技報, VLD2008-159 , volume 108, number 478, pages 195-200, 2009年3月.

[88] 達可敏充, 橋本亮司, 渡邊賢治, 畠中理英, 尾上孝雄, "ダイナミックスペクトルアクセスを用いたコグニティブ無線ネットワークにおけるノード位置推定手法の一検討," 信学技報, IN2008-220, volume 108, number 458, pages 523-528, 2009年3月.

[89] 橋本亮司, 筒井弘, 尾上孝雄, 猪飼知宏, "DCT領域 Distributed Video Coding における尤度推定手法," 信学技報, IE2008-209, volume 108, number 425, pages 31-36, 2009年2月.

[90] 小島康介, 橋本亮司, 藤田玄, "H.264向けRDOに基づいた動きベクトル検出手法の一検討," 電子情報通信学会技術研究報告, SIP2008-99, volume 104, number 213, pages 53-58, 2008年9月.

[91] 更田裕司, 橋本昌宜, 密山幸男, 尾上孝雄, "タイミングエラー予告を用いた適応的速度制御におけるタイミングエラー頻度と消費電力のトレードオフ解析," 情報処理学会DAシンポジウム, pages 217-222, 2008年8月.

[92] 渡邊賢治, 達可敏充, 畠中理英, 尾上孝雄, "屋内位置推定システムのための間取り推定に関する一検討," 信学技報, USN2008-33, volume 108, number 138, pages 129-134, 2008年7月.

[93] 廣本正之, 筒井弘, 越智裕之, 小佐野智之, 石川憲洋, 中村行宏, "メディアストリーミングにおける高速移動通信網に適した動的符号化レート制御手法の検討," マルチメディア，分散，協調とモバイル(DICOMO2008)シンポジウム, pages 1167-1176, 2008年7月.

[94] 河村侑輝, 真鍋安武, 尾上孝雄, 大原一人, 岡田浩行, 芥子育雄, "動画像並列復号のマルチコアプロセッサへの実装," 信学技報, SIS2008-23, volume 108, number 86, pages 51-56, 2008年6月.

[95] 岡田雅司, 岩永信之, 松村友哉, 尾上孝雄, 小林亙, "ファジィクラスタリングに基づく多音源立体音像定位手法," 信学技報, SIS2008-1, volume 108, number 85, pages 001-006, 2008年6月.

[96] 服部幸市, 筒井弘, 越智裕之, 中村行宏, "バス帯域を考慮した HD Photo における Photo Core Transform のアーキテクチャ," 信学技報, SIS2008-21, volume 108, number 85, pages 39-44, 2008年6月.

[97] 濱本浩一, 更田裕司, 橋本昌宜, 密山幸男, 尾上孝雄, "基板バイアス印加レイアウト方式の面積効率と速度制御性の評価," 信学技報, CAS2008-14, VLD2008-27, SIP2008-48(2008-6), pages 75-79, 2008年6月.

[98] 小笠原泰弘, 橋本昌宜, 尾上孝雄, "バス配線による誘導性クロストークノイズによる遅延変動の実測とノイズ重ねあわせ効果の検証," 信学技報, VLD2007-153, 2008年3月.

[99] 加藤裕視, 山田晃久, 尾上孝雄, "フレームメモリの削減を目的とした画像圧縮手法," 電子情報通信学会 CAS信学技報, volume 107, number 476, pages 31-36, 2008年1月.

[100] 小笠原泰弘, 橋本昌宜, 尾上孝雄, "スタンダードセルで構成された電源ノイズ波形測定回路の提案," 信学技報, CPM2007-131, ICD2007-142, pages 17-22, 2008年1月.

[101] 二宮進有, 橋本昌宜, "SSTAにおける空間的相関を持つ製造ばらつきのグリッドベースモデル化法の検討," 信学技報, VLD2007-91, DC2007-46, volume 107, number 336, pages 13-17, 2007年11月.

[102] 橋本亮司, 加藤公也, 才辻誠, 田中照人, 上津寛和, 藤田玄, 尾上孝雄, "1080HD向けマルチシンボルH.264エントロピー復号器," 第21回ディジタル信号処理シンポジウム, 2007年11月.

[103] 橋本昌宜, "製造・環境ばらつきを考慮したタイミング検証技術," 信学技報, VLD2007-65, pages 21-24, 2007年10月.

[104] 加藤公也, 橋本亮司, 藤田玄, 尾上孝雄, "H.264 High ProfileにおけるマルチシンボルCABAC復号器のアーキテクチャ検討," 信学技報, SIP2007-121, ICD2007-110, IE2007-80, pages 65-70, 2007年10月.

[105] 阿部慎也, 橋本昌宜, 尾上孝雄, "製造ばらつきを考慮したメッシュ型クロック分配網のスキュー評価," 情報処理学会DAシンポジウム, pages 133-138, 2007年8月.

[106] 筒井弘, 藤田憲正, 尾上孝雄, 中村行宏, "JPEG2000 マルチシンボル算術復号器," 信学技報, SIS2007-3, volume 107, number 93, pages 13--18, 2007年6月.

[107] 橋本昌宜, "製造・環境ばらつきと動的性能補償を考慮したタイミング検証に向けて," 第20回 回路とシステム(軽井沢)ワークショップ, pages 661-666, 2007年4月.

[108] 新開健一, 橋本昌宜, 尾上孝雄, "短距離ブロック内配線の自己発熱," 第 20 回 回路とシステム軽井沢ワークショップ, pages 7-12, 2007年4月.

[109] 榎並孝司, 二宮進有, 橋本昌宜, "電源ノイズの空間的相関を考慮した統計的タイミング解析," 第20回 回路とシステム軽井沢ワークショップ, pages 667-672, 2007年4月.

[110] 小笠原泰弘, 橋本昌宜, 尾上孝雄, "90nm グローバル配線における誘導性クロストークノイズによる遅延変動の実測," 信学技報, CPM2006-131, ICD2006-173, pages 13--18, 2007年1月.

[111] 小笠原泰弘, 榎並孝司, 橋本昌宜, 佐藤高史, 尾上孝雄, "電源ノイズによる遅延変動の測定と電源ノイズを再現するフルチップシミュレーション手法," 信学技報, CPM2006-132, ICD2006-174, pages 19--23, 2007年1月.

[112] 吉田明弘, 松村友哉, 岩永信之, 小林亙, 尾上孝雄, "頭部近傍における立体音像定位の向上に関する一手法," 日本音響学会聴覚研究会資料, H-2006-134, 2006年12月.

[113] 松村友哉, 吉田明弘, 岩永信之, 小林亙, 尾上孝雄, "頭部伝達関数による立体音像移動の移動感向上に関する一手法," 日本音響学会聴覚研究会資料, vol. 36, no.9, H--2006--135, 2006年12月.

[114] 種村嘉高, 小谷章夫, 山崎聖一, 密山幸男, 尾上孝雄, "視覚特性を考慮した文字の黒み推定に関する一検討," 電子情報通信学会技術研究報告, volume 106, number 374, pages 69--74, 2006年11月.

[115] Jangsombatsiri Siriporn, 橋本昌宜, 尾上孝雄, "シャントコンダクタンスを挿入したオンチップ伝送線路特性評価," 第十回シリコンアナログRF研究会, 2006年11月.

[116] 橋本亮司, 藤田玄, 尾上孝雄, "H.264符号化における演算量動的割当ての一手法," 第21回ディジタル信号処理シンポジウム, D8-1, 2006年11月.

[117] 野里良裕, 高橋和之, 奥畑宏之, 尾上孝雄, "リアルタイム動画像Retinex階調補正における照明光推定器のアーキテクチャ," 第21回ディジタル信号処理シンポジウム, D8-3, 2006年11月.

[118] 榎並孝司, 橋本昌宜, 尾上孝雄, "主成分分析による電源電圧変動の統計的モデル化手法," 情報処理学会DAシンポジウム, pages 205--210, 2006年7月.

[119] 藤田玄, 大窪啓太, 上甲憲市, 才辻誠, 尾上孝雄, "低動作周波数によるH.264 CABACのリアルタイム処理実現手法," 信学技報 SIS2006-34, pages 19--23, 2006年6月.

[120] 高橋和之, 野里良裕, 奥畑宏之, 尾上孝雄, "変分法によるRetinex階調補正の演算量削減検討," 信学技報 SIS2006-3, pages 13--18, 2006年6月.

[121] 小笠原泰弘, 橋本昌宜, 尾上孝雄, "LSI配線における容量性, 誘導性クロストークノイズの定量的将来予測," 第19回回路とシステム軽井沢ワークショップ, pages 5--10, 2006年4月.

[122] 新開健一, 橋本昌宜, 黒川敦, 尾上孝雄, "電流変動に着目した広範囲な製造・環境ばらつき対応ゲート遅延モデル," 第19回 回路とシステム軽井沢ワークショップ, pages 559-564, 2006年4月.

[123] 今福哲也, 岩永信之, 松村友哉, 小林亙, 尾上孝雄, "多音源に対する立体音像移動手法," 信学技報, SP2005-192, pages 47-52, 2006年3月.

[124] 伊勢正尚, 小笠原泰弘, 渡邊賢治, 畠中理英, 尾上孝雄, 庭本浩明, 芥子育雄, 白川功, "IEEE 802.15.4を用いたホームネットワーク向け無線ネットワークプロトコル," 信学技報, CAS2005-99, pages 19--24, 2006年3月.

[125] 伊地知孝仁, 橋本昌宜, 高橋真吾, 築山修治, 白川功, "画素充電率制約を満足する液晶ドライバ回路のトランジスタサイズ決定技術," 信学技報, VLD2005-131, pages 55--60, 2006年3月.

[126] 渡邊賢治, 伊勢正尚, 藤田玄, 畠中理英, 尾上孝雄, 庭本浩明, 芥子育雄, 白川功, "無線ホームネットワークにおける消費電力および即時性の改善手法," 信学技報, CAS2005-100, pages 25--30, 2006年3月.

[127] 藤田玄, 尾上孝雄, 白川功, "MPEG-4向け高精度動き検出コアのVLSI化設計," 電子情報通信学会, volume J88-A, number 11, pages 1282--1291, 2005年11月.

[128] 小谷章夫, 種村嘉高, 朝井宣美, 中村安久, 大塚正章, 密山幸男, 尾上孝雄, "文字重心位置評価手法とその可読性評価への応用," 信学技報, SIS2005-23, pages 1--6, 2005年9月.

[129] 吉田明弘, 松村友哉, 岩永信之, 小林亙, 尾上孝雄, "近距離音像の定位を実現するための頭部伝達関数の特徴解析," 信学技報, EA2005-39, pages 29--34, 2005年8月.

[130] 小笠原泰弘, 橋本昌宜, 尾上孝雄, "誘導性・容量性クロストークノイズによる遅延変動の測定と評価," 信学技報, SDM2005-135, ICD2005-74, pages 43--48, 2005年8月.

[131] 野里良裕, 奥畑宏之, 尾上孝雄, 白川功, "適応的階調補正のハードウェア実現における Retinex 理論の比較評価," 信学技報, SIS2005-16, pages 19--24, 2005年6月.

[132] 藤田玄, 今仲隆晃, フィンヴァンニャット, 尾上孝雄, 白川功, "色空間のブロック分割に基づく携帯端末向けリアルタイム人オブジェクト抽出手法," 第18回 回路とシステム軽井沢ワークショップ, pages 431--436, 2005年4月.

[133] ワットカナッド・ウィラポーン, 木村基, 藤田玄, 尾上孝雄, 白川功, "動画像マルチデコーダ用動き補償機構のVLSIアーキテクチャ," 信学技報, SIS2004-62, pages 37--43, 2005年3月.

[134] 盧承烈, 小笠原泰弘, 伊勢正尚, 畠中理英, 尾上孝雄, 庭本浩明, 芥子育雄, 白川功, "ユニバーサルプラグアンドプレイ技術を用いたホームネットワーク一構成方式," 信学技報, CAS2004-68, pages 7--12, 2005年1月.

[135] 郭朝暉, 西川裕規, 大巻ロベルト裕治, 尾上孝雄, 白川功, "Motion JPEG2000 における誤り訂正符号の割当て手法," 信学技報, CAS2004-67, pages 1--6, 2005年1月.

[136] 内田好弘, 谷貞宏, 橋本昌宜, 築山修治, 白川功, "システム液晶のための配線間容量抽出手法," 信学技報, VLD2004-64, pages 19--24, 2004年12月.

[137] 小谷章夫, 朝井宣美, 中村安久, 大塚正章, 密山幸男, 尾上孝雄, "文字輪郭を用いた重心位置評価手法に関する一検討," 情報処理学会研究報告, 2004-HI-111, pages 63--70, 2004年11月.

[138] 木村基, 密山幸男, 尾上孝雄, 白川功, "組込みシステム向け IEEE802.11i 暗号処理回路の実装," 信学技報, ICD2004-129, pages 49--54, 2004年10月.

[139] 今井林太郎, 密山幸男, 尾上孝雄, 白川功, "メディア処理向けリコンフィギュラブルアーキテクチャに関する一検討," 電子情報通信学会 第4回リコンフィギャラブルシステム研究会, pages 33--40, 2004年9月.

[140] 木村基, 密山幸男, 尾上孝雄, 白川功, "組込みシステム向け IEEE 802.11i 暗号処理器のアーキテクチャ," 第17回回路とシステム軽井沢ワークショップ, pages 217--222, 2004年4月.

[141] 中川陽介, 岩永信之, 小林亙, 古谷一彦, 尾上孝雄, 白川功, "周波数特性除去に基づくスピーカによるバイノーラル再生," 聴覚研究会, pages 17--22, 2004年1月.

[142] 内田好弘, 谷貞宏, 築山修治, 白川功, "領域分割による配線間容量モデル化手法について," 信学技報, NLP2003-21, pages 7--12, 2003年6月.

[143] 岩永信之, 阪本憲成, 小林亙, 尾上孝雄, 白川功, "組込みシステム向けヘッドホンステレオ頭外音場拡大手法とその実装," 第17回 ディジタル信号処理シンポジウム, B2-4, 2002年11月.

[144] 河原伸幸, 大谷昌弘, 尾上孝雄, 白川功, "IEEE802.11b を用いた映像伝送システムの設計," 第17回 ディジタル信号処理シンポジウム, B6-1, 2002年9月.

[145] 小坂篤史, 山口悟史, 奥畑宏之, 尾上孝雄, 白川功, "組み込みCPUと専用回路によるOgg Vorbis音楽デコーダのVLSI化設計," 信学技報, SDM2002-159, ICD2002-70, pages 37--42, 2002年8月.

[146] 岡田勉, 内田翼, 尾上孝雄, 白川功, "次世代衛星航法システム受信機のための擬似雑音符号生成器の構成," 信学技報 DSP2002-69, pages 19--24, 2002年6月.

[147] 谷貞宏, 内田好弘, 築山修治, 白川功, "配線間容量モデル化とその評価について," 信学技報 DSP2002-83, pages 7--12, 2002年6月.

[148] 中川克哉, 川北将, 佐藤康二, 花田恵太郎, 千葉徹, 白川功, "異機種間適応型オブジェクト共有環境," 電子情報通信学会 第15回 回路とシステム(軽井沢)ワークショップ, pages 161--166, 2002年4月.

[149] 宋学燮, Alten-Erdene Shiitev, 岡田浩行, 藤田玄, 尾上孝雄, 白川功, "MPEG-4ビデオ符号化におけるエラー隠蔽アルゴリズムの提案," 電子情報通信学会 第15回 回路とシステム(軽井沢)ワークショップ, pages 95--100, 2002年4月.

[150] 水野洋, 小林弘幸, 尾上孝雄, 白川功, "組込みシステムアーキテクチャレベルにおける消費電力見積り手法," 電子情報通信学会 第15回 回路とシステム(軽井沢)ワークショップ, pages 435--440, 2002年4月.

[151] 中川貴史, 濱中慎介, 肖云和, 藤田玄, 白川功, "MPEG-4 コア・プロファイル・コーデックの VLSI アーキテクチャ," 信学技報, VLD2001-136, pages 31--38, 2002年1月.

[152] 木村基, 三木裕介, 尾上孝雄, 白川功, "組込みシステム向け Java 実行環境の構築," 信学技報, VLD2001-137, pages 39--44, 2002年1月.

[153] 大谷昌弘, 河原伸幸, 中岡弘幸, 戸丸知信, 丸山一人, 尾上孝雄, 白川功, "データフレーム選択再送手法に基づいた映像伝送システムの設計," 信学技報, VLD2001-93, pages 25--30, 2001年11月.

[154] 大谷昌弘, 河原伸幸, 戸丸知信, 丸山一人, 尾上孝雄, 白川功, "映像伝送システムのための誤り訂正ブロック単位 ARQ 手法," 第16回 ディジタル信号処理シンポジウム, C8-6, pages 711--717, 2001年11月.

[155] 中川克哉, 佐藤康二, 津森靖, 花田恵太郎, 白川功, "任意ネットワーク対応オブジェクトコミュニケーション環境 (OCEAN)," 情報処理学会 第 104 回 マルチメディアと分散処理(石切)研究会, pages 19--24, 2001年9月.

[156] 宋学燮, Altan-Erdene Shiitev, 岡田浩行, 藤田玄, 尾上孝雄, 白川功, "MPEG-4 ビデオ伝送に対するエラー隠蔽アルゴリズムおよびアーキテクチャ," 信学技報, CAS2001-10, pages 71--77, 2001年6月.

[157] 密山幸男, Zaldy Andales, 尾上孝雄, 白川功, "ブロック暗号の高速化暗号モードとその VLSI 化設計," 信学技報, CAS2001-41, pages 89--94, 2001年6月.

[158] 藤田玄, 樽家昌也, 本谷謙治, 奥畑宏之, 白川功, "顔オブジェクトのリアルタイム抽出アルゴリズム," 信学技報 DSP2001-31, pages 87--92, 2001年6月.

[159] 阪本憲成, 小林亙, 尾上孝雄, 白川功, "3 次元音像定位リアルタイムアルゴリズムの DSP 実装とその評価," 信学技報, CAS2001-50, pages 147--154, 2001年6月.

[160] Yukio MITSUYAMA, Zaldy ANDALES, Takao ONOYE, and Isao SHIRAKAWA, "A New Approach for 128-Bit Block Ciphers," In 信学会 第14回回路とシステム(軽井沢)ワークショップ, pages 231--236, April 2001.

[161] 三木裕介, 坂本守, 武内良典, 吉田豊彦, 白川功, "組込みシステム向きプロセッサのコード効率に関する評価," 信学会 第14回回路とシステム(軽井沢)ワークショップ, pages 113--118, 2001年4月.

[162] 宋天, 宋学燮, 藤田玄, 尾上孝雄, 白川功, "H.263 Version2 コーデックコアの VLSI 化設計," 信学会 第14回回路とシステム(軽井沢)ワークショップ, pages 561--566, 2001年4月.

[163] 渡辺辰雄, 石浦菜岐佐, "特定用途向け DSP 用リターゲッタブルコンパイラによるデータパス指向協調設計手法," 信学技報, VLD2000-89, pages 119--124, 2000年11月.

[164] 阪本憲成, 小林亙, 尾上孝雄, 白川功, "モノラル音の実時間 3 次元音像定位アルゴリズムの 1 チップ DSP 実装," 信学会 第 15 回ディジタル信号処理シンポジウム C6-2, pages 599--604, 2000年11月.

[165] 宋天, 宋学燮, 藤田玄, 尾上孝雄, 白川功, "H.263 拡張 INTRA 符号化モードのコーデックとその VLSI とその VLSI アーキテクチャ," 信学技報, DSP2000-108, pages 45--50, 2000年10月.

[166] 宋学燮, 宋天, 岡田浩行, 藤田玄, 尾上孝雄, 白川功, "動き検出を利用した MPEG-4 ビデオにおけるエラー隠蔽アルゴリズムの提案," 信学技報, DSP2000-107, pages 37--43, 2000年10月.

[167] 中川克哉, 川北将, 佐藤康二, 水口充, 白川功, "異機種間オブジェクトコミュニケーション環境," マルチメディア, 分散, 協調とモバイル(DICOMO 2002) シンポジウム, pages 197--200, 2000年7月.

[168] 小林亙, 阪本憲成, 尾上孝雄, 白川功, "3 次元音像定位リアルタイムアルゴリズムとその低消費電力 DSP 実装," 信学技報, CAS2000-13, pages 97--102, 2000年6月.

[169] 黒田涼, 藤田玄, 尾上孝雄, 白川功, "MPEG-4 向け省面積 SA-DCT の VLSI 化設計," 信学技報, CAS2000-14, pages 103--108, 2000年6月.

[170] 密山幸男, Zaldy Andales, 尾上孝雄, 白川功, "リコンフィギュラブルロジックを用いたハードウェア向き暗号方式," 信学会 第13回回路とシステム(軽井沢)ワークショップ, pages 367--372, 2000年4月.

[171] 山田昇平, 三木Morgan裕介, 藤田玄, 尾上孝雄, 白川功, "低ビットレート動画像符号化 VLSI 実装向きビットレート制御," 信学会 第13回回路とシステム(軽井沢)ワークショップ, pages 385--390, 2000年4月.

[172] 渡辺辰雄, 石浦菜岐佐, 山口雅之, "特定用途向け DSP のデータパス指向協調設計におけるコード生成手法," 信学会 第13回回路とシステム(軽井沢)ワークショップ, pages 539--544, 2000年4月.

[173] 丹羽章雅, 橋本晋弥, 奥畑宏之, 尾上孝雄, 白川功, "携帯用 MPEG-4 オーディオデコーダの VLSI 化設計," 第14回ディジタル信号処理シンポジウム, pages 629--634, 1999年11月.

[174] Zaldy ANDALES, 密山幸男, 浅利康二, 尾上孝雄, 白川功, "リコンフィグラブルハードウェアを用いた暗号システム," 信学技報, CAS99-63, NLP99-87, pages 7--14, 1999年9月.

[175] 古家眞, 宋宝玉, 吉田幸弘, 尾上孝雄, 白川功, "4相NMOSダイナミックロジック用アレイセル," 信学技報, CAS99-62, pages 1--6, 1999年9月.

[176] 三木Morgan裕介, 山田昇平, 藤田玄, 尾上孝雄, 白川功, "携帯端末用 H.263 動画像コーデックの VLSI 設計," DA シンポジウム 99, pages 183--188, 1999年7月.

[177] 古家眞, 松村謙次, 藤田玄, 正城敏博, 白川功, 稲田紘, "医療用監視システムのための通信制御用LSI," 信学技報, CAS99, pages 15--19, 1999年6月.

[178] 大卷ロベルト裕治, 藤田玄, 尾上孝雄, 白川功, "離散ウエーブレット変換に基づく動画像符号化器のアーキテクチャ," 信学技報, CAS99-33, pages 21--28, 1999年6月.

[179] 渡辺辰雄, 石浦菜岐佐, 山口雅之, "非直交なデータパスに対するリターゲッタブルコンパイラのスケジューリング手法," 信学会 第12回回路とシステム軽井沢ワークショップ, pages 109--114, 1999年4月.

[180] 畠中理英, 正城敏博, 尾上孝雄, 村上孝三, "AAL Type2 スイッチの制御方式とアーキテクチャの設計," 信学会 第12回回路とシステム軽井沢ワークショップ, pages 427--432, 1999年4月.

[181] 高橋瑞樹, 石浦菜岐佐, 山田晃久, 神戸尚志, "ハードウェアコンパイラBachにおけるスレッド分割手法," 信学会 第12回回路とシステム(軽井沢)ワークショップ, pages 103--108, 1999年4月.

[182] 服部靖史, 石浦菜岐佐, 山口雅之, "DSP向けリターゲッタブルコンパイラの演算器/転送経路のバインディング手法," 信学技報, VLD98-125, volume 98, number 447, pages 55-61, 1998年12月.

[183] 滝大輔, M.H. Miki, 藤田玄, 尾上孝雄, 白川功, 藤原融, 嵩忠雄, "再帰的最尤復号アルゴリズムを用いた誤り訂正復号器の VLSI 設計," 信学技報, VLD98-52, pages 57--62, 1998年9月.

[184] 藤嶋秀幸, 竹本裕介, 米田友和, 尾上孝雄, 白川功, "動画像復号化と３次元グラフィックスで共用可能なメディアプロセッサ向き演算モジュールの設計," 信学技報, VLD98-41, pages 31--38, 1998年9月.

[185] 密山幸男, 浅利康二, 尾上孝雄, 白川功, 馬場孝明, 大槻達男, "強誘電体メモリを用いた Reconfigurable Logic とその性能評価," 信学技報, ICD98-120, pages 53--58, 1998年8月.

[186] 竹本裕介, 米田友和, 藤嶋秀幸, 尾上孝雄, 白川功, "テクスチャマッピングおよび動き補償用共有回路の VLSI 化設計," 信学技報, VLD98-33, pages 19--26, 1998年7月.

[187] 三木裕介, 藤田玄, 奥畑宏之, 尾上孝雄, 白川功, "携帯端末用 H.324 符号化/復号化方式とその VLSI 化設計," 信学会 第11回回路とシステム軽井沢ワークショップ, pages 439--444, 1998年4月.

[188] 山口雅之, 石浦菜岐佐, 神戸尚志, "非直交なデータパスに対するリターゲッタブルコンパイラのバインディング手法," 信学会 第11回回路とシステム軽井沢ワークショップ, pages 481--486, 1998年4月.

[189] 竹本裕介, 藤嶋秀幸, 尾上孝雄, 白川功, "動画像復号化と3次元コンピュータグラフィクス向き行列ベクトル乗算器のアーキテクチャ," 信学会 第11回回路とシステム軽井沢ワークショップ, pages 451--456, 1998年4月.

[190] 奥畑宏之, 三木裕介Morgan, 尾上孝雄, 白川功, "低ビットレート音声符号化用DSPのVLSI化設計," 第12回ディジタル信号処理シンポジウム, pages 651-655, 1997年11月.

[191] 宮野鼻晃士, 藤田玄, 柳田和弘, 尾上孝雄, 白川功, "携帯環境向き低ビットレート動画像通信システムのVLSI 化設計," 電子情報通信学会技術研究報告, DSP97-107, volume 97, number 315, pages 17-24, 1997年10月.

[192] 山口雅之, 石浦菜岐佐, 神戸尚志, "組込み式システム向けリターゲッタブルコンパイラの方式," 電子情報通信学会技術研究報告, VLD97-90, FTS97-53, pages 85-92, 1997年10月.

[193] 山本哲三朗, 石浦菜岐佐, 山口雅之, 服部靖史, "組込みシステム向け高位合成システム," 電子情報通信学会技術研究報告, VLD97-91, FTS97-54, pages 93-99, 1997年10月.

[194] 澤卓, 長尾明, 白川功, 神戸尚志, 千原國宏, "方形パッキング手法による MMIC 向き配置配線手法," 電子情報通信学会技術研究報告, VLD97-97, FTS97-60, pages 141-146, 1997年10月.

[195] 藤嶋秀幸, 竹本裕介, 尾上孝雄, 白川功, "動画像と3次元CGを扱うメディアプロセッサのアーキテクチャに関す る研究," 第2回映像メディア処理シンポジウム, pages 23-24, 1997年10月.

[196] 藤田玄, 三木裕介Morgan, 尾上孝雄, 白川功, "携帯端末用 H.263 符号化/復号化 VLSI の設計," 第12回画像符号化シンポジウム, pages 51-52, 1997年10月.

[197] 荒井正, 水谷宣明, 会津隆士, 近藤仁志, "GPSを用いた連続変位量観測による地すべり移動特性について ---長野県倉並地すべりの例---," 第36回地すべり学会研究発表講演集, pages 365-368, 1997年8月.

[198] 澤卓, 長尾明, 神戸尚志, 白川功, 千原國宏, "方形パッキング法の一算法," 電子情報通信学会技術研究報告, DSP97-53, pages 159-166, 1997年6月.

[199] 正城敏博, 中谷泰寛, 尾上孝雄, 村上孝三, "音声通信を考慮したマルチメディアATM通信方式とVLSI化," 電子情報通信学会技術研究報告, IN97-10, pages 39-46, 1997年4月.

[200] 矢野政顕, 石浦菜岐佐, "スキャンパス構成を利用した内蔵メモリの試験," 電子情報通信学会第10回回路とシステム軽井沢ワークショップ, pages 95-100, 1997年4月.

[201] 長尾明, 澤卓, 磯部雅哉, 神戸尚志, 白川功, "マイクロ波集積回路向きレイアウト設計に対する自動化手法," 電子情報通信学会第10回回路とシステム軽井沢ワークショップ, pages 433-438, 1997年4月.

[202] 清水則一, 近藤仁志, 宮下耕一, 小野浩, "GPS地盤変位モニタリングシステムによる残壁の長期観測実験," 第28回岩盤力学に関するシンポジウム講演論文集, pages 388-392, 1997年1月.

[203] 山口雅之, 中岡敏博, 神戸尚志, "データパス構成と並列制約にもとづくアーキテクチャ評価システム," 電子情報通信学会技術研究報告, VLD96-74, CPSY96-86, pages 71-78, 1996年12月.

[204] 中谷泰寛, 正城敏博, 尾上孝雄, 村上孝三, "VCI 共有セルを用いたマルチメディア ATM 通信手法と VLSI 設計," 電子情報通信学会技術研究報告, DSP96-90, volume 96, number 301, pages 39-46, 1996年10月.

[205] 宮野鼻晃士, 藤田玄, 尾上孝雄, 白川功, "低ビットレート画像符号化アルゴリズムとその VLSI 化設計," 電子情報通信学会技術研究報告, DSP96-89, volume 96, number 301, pages 33-38, 1996年10月.

[206] 佐藤洋, 森本康夫, 正城敏博, 尾上孝雄, 白川功, "1チップ MPEG2 デコーダの設計と動き補償器の VLSI 実装," 情報処理学会DAシンポジウム'96, pages 47-52, 1996年8月.

[207] 森川俊, 岡田圭介, 竹内澄高, 白川功, "高性能定係数FIRフィルタのVLSI化設計," 情報処理学会DAシンポジウム'96, pages 41-46, 1996年8月.

[208] 清水則一, 小野浩, 近藤仁志, 水田義明, "長大残壁の安全監視へのGPS変位計測システムの応用に関する現場実験," 資源と素材, volume 112, pages 283-288, 1996年5月.

[209] 近藤仁志, "GPSの地すべり計測への応用," 第40回システム制御学会研究発表講演会 (チュートリアルセッション), pages 15-20, 1996年5月.

[210] S. Yano, K. Akagi, and N. Ishiura, "A New Scan Path Approach to Memory Array Testing," In 電子情報通信学会第9回回路とシステム軽 井沢ワークショップ, pages 55-60, April 1996.

[211] 森川俊, 岡田圭介, 竹内澄高, 白川功, "ディジタル映像伝送向け高性 能FIRフィルタのVLSI化設計," 電子情報通信学会第9回回路とシステム軽 井沢ワークショップ, pages 359-364, 1996年4月.

著書

[1] M. Hashimoto and R. Nair, "Power Integrity for Nanoscale Integrated Systems," McGraw-Hill Professional, February 2014.

[2] 伊藤雄一, 中島康祐, “ふさふさ”感触マルチタッチディスプレイの開発, 株式会社エヌ・ティー・エス,, 2013年.

[3] 伊藤雄一, 中島康祐, 「ふさふさ」した触り心地を実現する光ファイバによる毛状マ ルチタッチディスプレイ, 株式会社技術情報協会,, 2013年.

解説

[1] 佐藤高史, 橋本昌宜, "経時劣化概説," 信頼性学会誌, volume 35, number 8, pages 457--458, 2013年12月.

[2] 橋本昌宜, "超低電力サブスレッショルド回路設計技術 ," IEICE Fundamentals Review, pages 30--37, 2013年7月.

[3] 清川清, 畠中理英, 細田一史, 岡田雅司, 繁田浩功, 石原靖哲, 大下福仁, 角川裕次, 栗原聡, 森山甲一, "オーエンス・ルイス：アンビエント環境制御を用いた知的オフィスチェアの提案," システム制御情報学会誌, volume 56, number 1, pages 14-20, 2012年1月.

[4] 伊藤雄一, 中島康祐, "〜「ふさふさ」した触り心地〜 光ファイバによる毛状マルチタッチディスプレイ," MATERIAL STAGE, volume 11, number 8, pages 13-16, 2011年11月. [2.pdf]

[5] 橋本昌宜, "遅延ばらつきを考慮したVLSIタイミング検証," エレクトロニクス実装学会誌, volume 11, number 3, pages 182--185, 2008年5月.

大会等発表論文

[1] 名富太陽, 北畠康司, 藤田和之, 尾上孝雄, 伊藤雄一, "乳児型デバイスを用いた乳児の抱擁感覚再現手法," 日本バーチャルリアリティ学会第26回大会, 2021年9月.

[2] 山下真由, 伊藤雄一, 石原好貴, 上田将理, 綛田峰矢, 尾上孝雄, "KeyPressense: キーの押下開始タイミングを検知できるキーボード," エンタテインメントコンピューティングシンポジウム2017論文集, volume 2017, pages 298-300, 2017年. [2.pdf]

[3] 山下真由, 深町太一, 可知怜也, Adam Myers, Jesse Marciano, 伊藤雄一, "Ocuduss:オプティカルフロー制御による速度感提示デバイス," 情報処理学会インタラクション2017論文集, pages 745-748, 2017年. [2.pdf]

[4] 辻本祐輝, 伊藤雄一, 尾上孝雄, "結露を用いたインタラクティブディスプレイの濃淡制御手法," 情報処理学会インタラクション2017論文集, pages 053-058, 2017年.

[5] 佐藤雅紘, 飯塚翔一, 粟野皓光, 橋本昌宜, 尾上孝雄, "NBTIによる閾値電圧変化の確率的モデル化に関する一考察," 2015年電子情報通信学会総合大会講演論文集, 2015年3月.

[6] 河野仁, 橋本昌宜, 近藤利彦, 森村浩季, "超小型コイルを用いた近距離無線通信における周辺コイルの影響評価," 2015年電子情報通信学会総合大会講演論文集, 2015年3月.

[7] 益田涼平, 橋本昌宜, 尾上孝雄, "サーモパイル型赤外線センサを用いた人感センサの性能評価," 2015年電子情報通信学会総合大会講演論文集, 2015年3月.

[8] 宮崎陽平, 伊藤雄一, 藤原健, 高嶋和毅, 尾上孝雄, "SenseChairによる会話者間の同調傾向検出," 情報処理学会インタラクション2015論文集, 2015年3月. [2.pdf]

[9] 安藤正宏, 細井俊輝, 伊藤雄一, 高嶋和毅, 北村喜文, "StackBlock: 積み重ね形状認識可能なブロック型UI," 情報処理学会インタラクション論文集, 2015年.

[10] 宮崎陽平, 伊藤雄一, 藤原健, 高嶋和毅, 尾上孝雄, "SenseChairを用いた眠気検出に関する検討," 情報処理学会インタラクション2014論文集, 2014年3月. [2.pdf]

[11] 安藤正宏, 細井俊輝, 中島康祐, 高嶋和毅, 伊藤雄一, 足立智昭, 尾上孝雄, 北村喜文, "StackBlock: 積み重ね形状構築を可能とするブロック型デバイス," 情報処理学会インタラクション論文集, pages 135-142, 2014年.

[12] 宮崎陽平, 安藤正宏, 藤田悠矢, 羽鹿諒, Ondreicka Merrielle, 伊藤雄一, "ケツログラフィティ: 結露を用いたインタラクティブディスプレイ," EC2013, 2013年10月.

[13] 作田賢志朗, 安部晋一郎, 渡辺幸信, 原田諒, 橋本昌宜, 更田裕司, 上村大樹, "宇宙線中性子起因マルチセルアップセットのスケーリング則調査," 応用物理学会秋期学術講演会, 2013年9月.

[14] 中川雄太, 岸野文郎, 中島康祐, 伊藤雄一, "半球状の毛状マルチタッチディスプレイにおけるタッチインタラクション認識," 日本バーチャルリアリティ学会第18回大会論文集, pages 659-660, 2013年9月.

[15] 井藤佑哉, 岸野文郎, 中島康祐, 伊藤雄一, "毛状ディスプレイの特定領域内での触感変化に関する検討," 日本バーチャルリアリティ学会第18回大会論文集, pages 390-391, 2013年9月.

[16] 内田將太郎, 岸野文郎, 池田和章, 中島康祐, 伊藤雄一, "SenseChairを用いた眠気検出に関する検討," 電子情報通信学会総合大会講演論文集（基礎・境界）, page 215, 2013年3月.

[17] 富田健太郎, 中川雄太, 藤井佑一, 岸野文郎, 中島康祐, 伊藤雄一, "毛状ディスプレイの触感変化に関する検討," 電子情報通信学会総合大会講演論文集（基礎・境界）, page 214, 2013年3月.

[18] 根本祐輔, 中川雄太, 藤井佑一, 岸野文郎, 中島康祐, 伊藤雄一, "吹きかけインタラク ションのための入力検出法の検討," 電子情報通信学会総合大会講演論文集（基礎・境界）, page 213, 2013年3月.

[19] 岡田雅司, 畠中理英, 尾上孝雄, "秘匿化機能の分散化に基づくセキュアなアンビエント無線通信システムの実装," 第14回 DSPS教育会議 予稿集, pages 71-72, 2012年9月.

[20] 上野美保, 橋本昌宜, 尾上孝雄, "電気的タイミング故障のデバッグ向けオンチップリアルタイム電源電圧センサ," 電子情報通信学会2009ソサイエティ大会2012, volume A-3-6, page 53, 2012年9月. [2.pdf]

[21] 中川雄太, 藤井佑一, 岸野文郎, 中島康祐, 伊藤雄一, "半球状の毛状マルチタッチディスプレイ," 日本バーチャルリアリティ学会第17回大会論文集, pages 300-303, 2012年9月.

[22] 藤井佑一, 岸野文郎, 藤田和之, 中島康祐, 伊藤雄一, 菊池日出男, "U-brella: 降り注ぐ情報を可振化するポータブル傘型インタフェース," 日本バーチャルリアリティ学会第17回大会論文集, pages 652-655, 2012年9月.

[23] 藤本拓, 伊藤雄一, 石原のぞみ, 中島康祐, 尾上孝雄, "タブレットデバイスと目の位置関係を考慮した電子書籍表示手法に関する検討," ヒューマンインタフェースシンポ ジウム2012論文集, pages 701-704, 2012年9月.

[24] 中川雄太, 藤井佑一, 岸野文郎, 中島康祐, 伊藤雄一, "立体毛状マルチタッチディスプレイの一検討," 電子情報通信学会総合大会講演論文集（基礎・境界）, page 261, 2012年3月.

[25] 岡田雅司, 尾上孝雄, 小林亙, "GPU レイトレーサと多音源音像定位手法を用いた対話的な三次元音場生成システム," 電子情報通信学会総合大会, A-20-7, 2012年3月.

[26] 川幡尚亮, 藤井佑一, 岸野文郎, 中島康祐, 伊藤雄一, "インテリアへの適用を考慮した毛状ディスプレイの耐荷重に関する検討," 電子情報通信学会総合大会講演論文集 （基礎・境界）, page 262, 2012年3月.

[27] 竹中拓也, 岸野文郎, 藤田和之, 中島康祐, 伊藤雄一, "二者間の着座状態と会話の活性度の関係に関する検討," 電子情報通信学会総合大会講演論文集（基礎・境界）, page 220, 2012年3月.

[28] 菊地佑介, 岸野文郎, 石原のぞみ, 中島康祐, 伊藤雄一, "形容詞クエリを用いた連想意味関係の名詞抽出に関する検討," 電子情報通信学会総合大会講演論文集（基礎・境界）, page 267, 2012年3月.

[29] 藤枝智子, 岸野文郎, 中島康祐, 池田和章, 伊藤雄一, "着座姿勢の歪みを是正するシステムに向けたセンシングの基礎検討," 電子情報通信学会総合大会講演論文集（基礎・境界）, page 266, 2012年3月.

[30] 金田征悟, 藤井佑一, 岸野文郎, 中島康祐, 伊藤雄一, "毛状ディスプレイのための吹きかけインタラクションの検討," 電子情報通信学会総合大会講演論文集（基礎・境界）, page 263, 2012年3月.

[31] 中瀬絢哉, 栗原聡, 森山甲一, 石原靖哲, 大下福仁, 角川裕次, 清川清, 畠中理英, 細田一史., "カフェ・ド・ナイーダ：アンビエント環境における最適インタラクション推定機構の提案," ヒューマンインターフェースシンポジウム, 2011年9月.

[32] 林勇介, 伊藤雄一, 中島康祐, 藤田和之, 高嶋和毅, 大坊郁夫, 尾上孝雄, "カップ型デバイス Cup-le を用いた会話実験支援手法," ヒューマンインターフェースシンポジウム2011論文集, 2011年9月.

[33] 清川清, 畠中理英, 細田一史, 岡田雅司, 繁田浩功, 石原靖哲, 大下福仁, 角川裕次, 栗原聡, 森山甲一, "オーエンス・ルイス −アンビエント環境制御を用いた知的オフィスチェアの開発−," ヒューマンインターフェースシンポジウム, 2011年9月.

[34] 藤田和之, 高嶋和毅, 伊藤雄一, 大崎博之, 小野直亮, 香川景一郎, 津川翔, 中島康祐, "Ambient Suite: 部屋型情報空間を用いた対人コミュニケーション支援," ヒューマンインタフェースシンポジウム2011論文集, pages 395-400, 2011年9月.

[35] 橋本亮司, 達可敏充, 畠中理英, 尾上孝雄, 畑本浩伸, 衣斐信介, 宮本伸一, 三瓶政一, "ダイナミックスペクトルアクセスを用いたOFDM無線送受信機のFPGA実装," 電子情報通信学会総合大会, AS-2-2, 2010年3月.

[36] 中村秀幸, 筒井弘, 橋本亮司, 尾上孝雄, "特徴点追跡を用いた動き補償フレーム補間手法," 電子情報通信学会2009ソサイエティ大会, A-20-14, page 204, 2009年9月.

[37] 橋本亮司, 加藤公也, 藤田玄, 尾上孝雄, "H.264 CABAC復号器の高速化に関する一検討," 電子情報通信学会2008ソサイエティ大会,A-20-9, 2008年9月.

[38] 山崎聖一, 密山幸男, 尾上孝雄, "文字重心位置を利用した文字ストローク自動補正手法の検討," 電子情報通信学会 2007ソサイエティ大会, A-20-13, 2007年9月.

[39] 榎並孝司, 橋本昌宜, "統計的電源ノイズモデル化に適した適応的領域分割法," 電子情報通信学会ソサイエティ大会, A-3-10, 2007年9月.

[40] 橋本亮司, 藤田玄, 尾上孝雄, "1080HD向けH.264 CAVLC復号器の高速化に関する一検討," 電子情報通信学会2007ソサイエティ大会,A-20-16, 2007年9月.

[41] 河村侑輝, 橋本亮司, 尾上孝雄, "H.264符号化における1/4画素精度動き検出の性能評価," 電子情報通信学会2007ソサイエティ大会,A-4-28, 2007年9月.

[42] 筒井弘, "古いフィルム映像を模擬した劣化動画像の符号化手法," 電子情報通信学会2007ソサイエティ大会, AK-2-3, 2007年9月.

[43] 橋本亮司, 松村友哉, 野里良裕, 渡邊賢治, 尾上孝雄, "複眼光学系による物体注視システムのハードウェア実現," 第9回 DSPS教育者会議 予稿集, pages 87-88, 2007年8月.

[44] Siriporn Jangsombatsiri, 橋本昌宜, 土谷亮, Haikun Zhu, Chung-Kuan Cheng, "シャントコンダクタンスを挿入したオンチップ伝送線路のアイパターン評価," 電子情報通信学会総合大会, A-3-9, 2007年3月.

[45] 二宮進有, 橋本昌宜, "空間的相関を考慮したSSTAにおける領域の分割数と精度," 電子情報通信学会総合大会, A-3-1 , 2007年3月.

[46] 更田裕司, 橋本昌宜, 密山幸男, 尾上孝雄, "加算器を用いたsubthreshold 回路の設計指針の検討," 電子情報通信学会総合大会, A-3-17, 2007年3月.

[47] 濱本浩一, 橋本昌宜, 密山幸男, 尾上孝雄, "低電圧回路向け基板電位制御レイアウト方式の面積効率評価," 電子情報通信学会総合大会, A-3-6, 2007年3月.

[48] 阿部慎也, 橋本昌宜, 尾上孝雄, "メッシュ型クロック分配網のスキュー評価," 電子情報通信学会総合大会, A-3-5, 2007年3月.

[49] 加藤公也, 橋本亮司, 藤田玄, 尾上孝雄, "時間的・空間的隣接ヘッダ情報に基づくH.264イントラ予測モード判定手法," 電子情報通信学会ソサイエティ大会, 2006年9月.

[50] 新開健一, 橋本昌宜, 尾上孝雄, "短距離ブロック内配線の自己発熱問題の将来予測," 電子情報通信学会ソサイエティ大会, A-3-14, 2006年9月.

[51] Mohd Nadzrul Mohd Nor, Tomoya Matsumura, and Takao Onoye, "Improvement of Direction of Arrival Estimation of Speech Using Two-Channel Microphone Array with Angle Position Realignment," In IEICE Society Conference, A-4-32, September 2006.

[52] 榎並孝司, 橋本昌宜, 尾上孝雄, "電源ノイズ解析のための回路動作部表現法の評価," 電子情報通信学会総合大会, A-3-16, 2006年3月.

[53] 橋本亮司, 藤田玄, 尾上孝雄, "動画像の動き量に基づくH.264符号化パラメータ設定手法," 電子情報通信学会総合大会, D-11-42, 2006年3月.

[54] 高橋真吾, 築山修治, 橋本昌宜, 白川功, "液晶ディスプレイ用サンプリング回路の設計手法について," 2005 年電子情報通信学会ソサイエティ大会講演論文集, A-3-4, 2005年.

[55] 今仲隆晃, 藤田玄, 尾上孝雄, 白川功, "携帯端末向けリアルタイム人オブジェクト抽出," 第19回信号処理シンポジウム, D1-3, 2004年11月.

[56] 小坂篤史, 奥畑宏之, 尾上孝雄, 白川功, "組込み向けOgg Vorbis デコーダシステムの設計," 電子情報通信学会 第19回信号処理シンポジウム, C7-1, 2004年11月.

[57] 重信優也, 尾上孝雄, 白川功, "MPEG-2符号化情報に基づくMPEG-2/MPEG-4トランスコーディングの一手法," 電子情報通信学会 第19回信号処理シンポジウム, D4-4, 2004年11月.

[58] 内田好弘, 谷貞宏, 橋本昌宜, 築山修治, 白川功, "システム液晶に適した配線間容量抽出の検討," 電子情報通信学会ソサイエティ大会, A-1-16, 2004年9月.

[59] 奥畑宏之, 小坂篤史, 松村友哉, 尾上孝雄, 白川功, "Retinex 輝度補正のリアルタイム動画像向け演算量削減手法," 電子情報通信学会ソサイエティ大会, A-4-22, 2004年9月.

[60] 渡邊賢治, 西田秀治, 藤田玄, 尾上孝雄, 白川功, "エージェント技術に基づくホームネットワーク制御システム," 電子情報通信学会ソサイエティ大会, A-1-30, 2004年9月.

[61] Y. D. Handoko, 宋天, 藤田玄, 尾上孝雄, 白川功, "低演算量 H.264 向け動き検出アルゴリズム TS-ME の VLSI 化設計," 信学会 総合大会, A-4-10, 2004年3月.

[62] 川北将, 藤田玄, 尾上孝雄, 白川功, "リアルタイム JPEG - MPEG-4 トランス コーダの実装," 信学会 総合大会, A-4-7, 2004年3月.

[63] 中川克哉, 川北将, 尾上孝雄, 千葉徹, 白川功, "適合的情報空間連係の利便性の考察," 情報処理学会 第2回 情報科学技術フォーラム(FIT2003), volume 4, pages 267--268, 2003年9月.

[64] 今仲隆晃, 本谷謙治, 藤田玄, 尾上孝雄, 白川功, "顔領域に基づく携帯端末向けリアルタイム髪オブジェクト抽出," 電子情報通信学会ソサイエティ大会, A-4-26, 2003年9月.

[65] 木村基, 密山幸男, 尾上孝雄, 白川功, "無線 LAN セキュリティ拡張規格向け暗号処理器のアーキテクチャ," 電子情報通信学会ソサイエティ大会, A-4-4, 2003年9月.

[66] 前田真一, 山口悟史, 小坂篤史, 奥畑宏之, 山田晃久, 尾上孝雄, 白川功, "Bach C言語によるOgg VorbisデコーダのVLSI化設計," 信学会 総合大会, A-3-8, 2003年3月.

[67] 内田翼, 岡田勉, 尾上孝雄, 白川功, "次世代衛星航法システム対応汎用擬似雑音符号生成器の実装," 信学会 ソサイエティ大会, A-5-15, 2002年9月.

[68] 岩永信之, 阪本憲成, 小林亙, 尾上孝雄, 白川功, "ヘッドホンステレオ頭外音場拡大手法の組込み実装," 信学会 ソサイエティ大会, A-4-20, 2002年9月.

[69] Altan-Erdene Shiitev, 岡田浩行, 宋学燮, 藤田玄, 尾上孝雄, 白川功, "電子透かしを用いた MPEG-4 ビデオ伝送におけるエラー検出方式の検討," 信学会 ソサイエティ大会, D-11-38, 2001年9月.

[70] 三木裕介, 坂本守, 河原伸幸, 武内良典, 吉田豊彦, 白川功, "組込みシステム用実行ファイルの効率的圧縮および実行方法の提案," 信学会 ソサイエティ大会, A-3-15, 2001年9月.

[71] 中川貴史, 濱中慎介, 藤田玄, 白川功, "MPEG-4 動き補償用パディング処理の VLSI 化設計," 信学会 ソサイエティ大会, A-4-41, 2001年9月.

[72] 伊勢正尚, 内田好弘, 尾上孝雄, 白川功, "W-CDMA 用階層化ディジタルマッチトフィルタ," 信学会 ソサイエティ大会, A-1-7, 2001年9月.

[73] 内田好弘, 伊勢正尚, 尾上孝雄, 白川功, "W-CDMA ターボ符号処理向け VLSI アーキテクチャ," 信学会 ソサイエティ大会, A-1-8, 2001年9月.

[74] 小林弘幸, 水野洋, 尾上孝雄, 白川功, "組込みシステムにおける消費電力見積りの一手法," 信学会 ソサイエティ大会, SA-1-1, 2001年9月.

[75] 阪本憲成, 小林亙, 尾上孝雄, 白川功, "モノラル音 3 次元音像定位処理システムのハードウェア実装," 信学会 ソサイエティ大会, A-4-40, 2001年9月.

[76] 岡田浩行, 宋学燮, 藤田玄, 尾上孝雄, 白川功, "MPEG-4 ビデオ符号化における電子透かしを利用したエラー検出方式," 2001 画像電子学会年次大会一般セッション, pages 19--20, 2001年6月.

[77] Gulistan Raja, 宋天, 藤田玄, 尾上孝雄, 白川功, "H.263 向きデブロッキングフィルタおよび拡張 Intra 符号化処理の VLSI 化設計," 信学会 総合大会, A-3-7, 2001年3月.

[78] 密山幸男, 岩永信之, 尾上孝雄, 白川功, "Bluetooth スキャッタネットの構築手法と経路制御," 信学会 総合大会, A-4-68, 2001年3月.

[79] 小俣真也, 阪本憲成, 小林亙, 尾上孝雄, 白川功, "3 次元音像移動アルゴリズムの DSP 実装," 信学会 総合大会, A-4-55, 2001年3月.

[80] 山口悟史, 小坂篤史, 奥畑宏之, 白川功, "組み込み CPU 向け Ogg Vorbis デコーダの VLSI 実装," 信学会 総合大会, A-3-8, 2001年3月.

[81] 本谷謙治, 藤田玄, 白川功, "改良 SNAKES による顔オブジェクト高速抽出手法," 信学会 総合大会, D-12-15, 2001年3月.

[82] 小俣真也, 小林亙, 阪本憲成, 尾上孝雄, 白川功, "汎用 DSP 実装用 3 次元音像定位リアルタイムアルゴリズム," 映像情報メディア学会 冬季大会, 1-11, 2000年12月.

[83] 三木裕介, 尾上孝雄, 白川功, "組込みプロセッサ向け Java アクセラレータの VLSI 化設計," 信学会 ソサイエティ大会, A-3-12, 2000年10月.

[84] 密山幸男, Zaldy Andales, 尾上孝雄, 白川功, "リコンフィギュラブルロジックを用いた暗号方式," 信学会 ソサイエティ大会, A-4-42, 2000年10月.

[85] 小林亙, 阪本憲成, 尾上孝雄, 白川功, "3 次元音像定位のための実時間アルゴリズム," 信学会 ソサイエティ大会, A-4-23, 2000年10月.

[86] 渡辺辰雄, 石浦菜岐佐, "特定用途向け DSP のコード生成におけるスピルコードの最小化," 信学会 ソサイエティ大会, A-3-20, 2000年10月.

[87] 濱中慎介, 黒田涼, 藤田玄, 白川功, "MPEG-4 リバーシブル可変長復号器の VLSI 化設計," 信学会 ソサイエティ大会, A-4-41, 2000年10月.

[88] 橋本晋弥, 丹羽章雅, 奥畑宏之, 尾上孝雄, 白川功, "MPEG-4 オーディオデコーダにおけるノイズレス復号器およびスペクトル 予測器の VLSI 化設計," 信学会 ソサイエティ大会, A-3-4, 1999年9月.

[89] 大下勝, 尾上孝雄, 白川功, "JBIG 算術符号化部の高速化設計," 信学会 総合大会, A-4-32, 1999年3月.

[90] 山田昇平, 三木Morgan裕助, 藤田玄, 尾上孝雄, 白川功, "H.263 符号化におけるビットレート制御に関する研究," 信学会 ソサイエティ大会, B-8-31, 1998年10月.

[91] 竹本裕介, 藤嶋秀幸, 尾上孝雄, 白川功, "画像符号化と3次元CGで共用可能な行列・ベクトル乗算器," 信学会 総合大会, C-12-19, 1998年5月.

[92] 石浦菜岐佐, 山口雅之, "特定用途向けVLIW型プロセッサの命令コード圧縮手法," 電子情報通信学会ソサイエィ大会, A-3-10, 1997年8月.

[93] 藤田玄, 尾上孝雄, 白川功, "H.263用 DCT/IDCT演算コアのVLSI化設計," 電子情報通信学会ソサイエティ大会, C-12-28, 1997年8月.

[94] 宮野鼻晃士, 柳田和弘, 尾上孝雄, 白川功, "低ビットレート動画像通信システムのVLSI化設計," SCI第41回システム制御情報学会研究発表講演会, pages 247-248, 1997年5月.

[95] 森川俊, 岡田圭介, 竹内澄高, 白川功, "映像伝送用高性能ディジタルフィルタの VLSI 化設計," 電子情報通信学会総合大会, A-4-29, 1997年3月.

[96] 藤田玄, Itthichai Arungsrisangchai, 尾上孝雄, 白川功, "H.263 向け動き検出器の VLSI 化設計," 電子情報通信学会総合大会, SC-11-2, 1997年3月.

[97] 中岡敏博, 山口雅之, 山田晃久, 神戸尚志, "評価システムを用いたプログ ラム方式専用プロセッサの設計支援," 情報処理学会 第53回全国大会, 2B-1, pages 21-22, 1996年9月.

[98] 吉田幸宏, 宋宝玉, 奥畑宏之, 尾上孝雄, 白川功, "組み込み用プロセッサの低消費電力化に対する一手法," 電子情報 通信学会ソサイアティ大会, SA-1-2, 1996年9月.

[99] 正城敏博, 中谷泰寛, 尾上孝雄, 村上孝三, "VCI 共有セルを用いた ATM 音声通信手法," 電子情報通信学会ソサイエティ大会, SB-10-2, 1996年9月.