尾上研究室 研究業績一覧: D. Alnajjar, Y. Ko, T. Imagawa, M. Hiromoto, Y. Mitsuyama, M. Hashimoto, H. Ochi, and T. Onoye, Soft Error Resilient Vlsi Architecture for Signal Processing, December 2009.
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D. Alnajjar, Y. Ko, T. Imagawa, M. Hiromoto, Y. Mitsuyama, M. Hashimoto, H. Ochi, and T. Onoye, "Soft Error Resilient Vlsi Architecture for Signal Processing," In Proceedings of IEEE International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), pp. 183--186, December 2009.
ID 598
分類 国際会議
タグ
表題 (title) Soft Error Resilient Vlsi Architecture for Signal Processing
表題 (英文)
著者名 (author) D. Alnajjar,Y. Ko,T. Imagawa,M. Hiromoto,Y. Mitsuyama,M. Hashimoto,H. Ochi,T. Onoye
英文著者名 (author)
編者名 (editor)
編者名 (英文)
キー (key)
書籍・会議録表題 (booktitle) Proceedings of IEEE International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS)
書籍・会議録表題(英文)
巻数 (volume)
号数 (number)
ページ範囲 (pages) 183--186
組織名 (organization)
出版元 (publisher)
出版元 (英文)
出版社住所 (address)
刊行月 (month) 12
出版年 (year) 2009
採択率 (acceptance)
URL
付加情報 (note)
注釈 (annote)
内容梗概 (abstract)
論文電子ファイル 利用できません.
BiBTeXエントリ
@inproceedings{id598,
         title = {Soft Error Resilient VLSI Architecture for Signal Processing},
        author = {D. Alnajjar and Y. Ko and T. Imagawa and M. Hiromoto and Y. Mitsuyama and M. Hashimoto and H. Ochi and T. Onoye},
     booktitle = {Proceedings of IEEE International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS)},
         pages = {183--186},
         month = {12},
          year = {2009},
}
  

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