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| Y. Uchida, M. Ise, T. Onoye, I. Shirakawa, and I. Arungsrisangchai, "VLSI Architecture of Digital Matched Filter and Prime Interleaver for W-CDMA," In Proc. IEEE International Symposium on Circuits and Systems (ISCAS2002), Phoenix, Arizona, III, pp. 269--272, May 2002. | |
| ID | 162 |
| 分類 | 国際会議 |
| タグ | |
| 表題 (title) |
VLSI Architecture of Digital Matched Filter and Prime Interleaver for W-CDMA |
| 表題 (英文) |
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| 著者名 (author) |
Y. Uchida,M. Ise,T. Onoye,I. Shirakawa,I. Arungsrisangchai |
| 英文著者名 (author) |
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| 編者名 (editor) |
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| 編者名 (英文) |
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| キー (key) |
Yoshihiro Uchida, Masanao Ise, Takao Onoye, Isao Shirakawa, Itthichai Arungsrisangchai |
| 書籍・会議録表題 (booktitle) |
Proc. IEEE International Symposium on Circuits and Systems (ISCAS2002), Phoenix, Arizona |
| 書籍・会議録表題(英文) |
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| 巻数 (volume) |
III |
| 号数 (number) |
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| ページ範囲 (pages) |
269--272 |
| 組織名 (organization) |
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| 出版元 (publisher) |
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| 出版元 (英文) |
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| 出版社住所 (address) |
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| 刊行月 (month) |
5 |
| 出版年 (year) |
2002 |
| 採択率 (acceptance) |
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| URL |
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| 付加情報 (note) |
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| 注釈 (annote) |
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| 内容梗概 (abstract) |
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| 論文電子ファイル | 利用できません． |
| BiBTeXエントリ |
@inproceedings{id162,
title = {{VLSI} Architecture of Digital Matched Filter and Prime Interleaver for W-{CDMA}},
author = {Y. Uchida and M. Ise and T. Onoye and I. Shirakawa and I. Arungsrisangchai},
booktitle = {Proc. IEEE International Symposium on Circuits and Systems (ISCAS2002), Phoenix, Arizona},
volume = {III},
pages = {269--272},
month = {5},
year = {2002},
}
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