尾上研究室 研究業績一覧: H. Mizuno, H. Kobayashi, T. Onoye, and I. Shirakawa, An Architecture Level Power Estimation Method for Embedded Systems, October 2001.
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H. Mizuno, H. Kobayashi, T. Onoye, and I. Shirakawa, "An Architecture Level Power Estimation Method for Embedded Systems," In in Proc. Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI 2001), Nara, Japan, pp. 78--85, October 2001.
ID 154
分類 国際会議
タグ
表題 (title) An Architecture Level Power Estimation Method for Embedded Systems
表題 (英文) An Architecture Level Power Estimation Method for Embedded Systems
著者名 (author) H. Mizuno, H. Kobayashi, T. Onoye, I. Shirakawa
英文著者名 (author) H. Mizuno, H. Kobayashi, T. Onoye, I. Shirakawa
編者名 (editor)
編者名 (英文)
キー (key) Hiroshi Mizuno, Hiroyuki Kobayashi, Takao Onoye, Isao Shirakawa
書籍・会議録表題 (booktitle) in Proc. Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI 2001), Nara, Japan
書籍・会議録表題(英文) in Proc. Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI 2001), Nara, Japan
巻数 (volume)
号数 (number)
ページ範囲 (pages) 78--85
組織名 (organization)
出版元 (publisher)
出版元 (英文)
出版社住所 (address)
刊行月 (month) 10
出版年 (year) 2001
採択率 (acceptance)
URL
付加情報 (note)
注釈 (annote)
内容梗概 (abstract)
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BiBTeXエントリ
@inproceedings{id154,
         title = {An Architecture Level Power Estimation Method for Embedded Systems},
        author = {H. Mizuno and  H. Kobayashi and  T. Onoye and  I. Shirakawa},
     booktitle = {in Proc. Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI 2001), Nara, Japan},
         pages = {78--85},
         month = {10},
          year = {2001},
}
  

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