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K. Miyanohana, G. Fujita, T. Onoye, and I. Shirakawa, "VLSI Implementation of Edge Detector and Vector Quantizer for Very Low Bitrate Video Encoding," In in Proc. IEEE Asia Pacific Conference on Circuits and Systems (APCCAS '96), pp. 480-483, November 1996. | |
ID | 75 |
分類 | 国際会議 |
タグ | |
表題 (title) |
VLSI Implementation of Edge Detector and Vector Quantizer for Very Low Bitrate Video Encoding |
表題 (英文) |
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著者名 (author) |
K. Miyanohana, G. Fujita, T. Onoye, I. Shirakawa |
英文著者名 (author) |
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編者名 (editor) |
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編者名 (英文) |
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キー (key) |
Koji Miyanohana, Gen Fujita, Takao Onoye, Isao Shirakawa |
書籍・会議録表題 (booktitle) |
in Proc. IEEE Asia Pacific Conference on Circuits and Systems (APCCAS '96) |
書籍・会議録表題(英文) |
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巻数 (volume) |
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号数 (number) |
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ページ範囲 (pages) |
480-483 |
組織名 (organization) |
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出版元 (publisher) |
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出版元 (英文) |
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出版社住所 (address) |
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刊行月 (month) |
11 |
出版年 (year) |
1996 |
採択率 (acceptance) |
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URL |
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付加情報 (note) |
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注釈 (annote) |
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内容梗概 (abstract) |
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論文電子ファイル | 利用できません. |
BiBTeXエントリ |
@inproceedings{id75, title = {{VLSI} Implementation of Edge Detector and Vector Quantizer for Very Low Bitrate Video Encoding}, author = {K. Miyanohana and G. Fujita and T. Onoye and I. Shirakawa}, booktitle = {in Proc. IEEE Asia Pacific Conference on Circuits and Systems (APCCAS '96)}, pages = {480-483}, month = {11}, year = {1996}, } |