尾上研究室 研究業績一覧: D. Alnajjar, Y. Mitsuyama, M. Hashimoto, and T. Onoye, Pvt-Induced Timing Error Detection Through Replica Circuits and Time Redundancy in Reconfigurable Devices, April 2013.
  • リスト
  •  表 
  • LaTeX
  • BibTeX
Detail of a work
Tweet
D. Alnajjar, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Pvt-Induced Timing Error Detection Through Replica Circuits and Time Redundancy in Reconfigurable Devices," IEICE Electronics Express (ELEX), 10(5), April 2013.
ID 725
分類 論文誌
タグ
表題 (title) Pvt-Induced Timing Error Detection Through Replica Circuits and Time Redundancy in Reconfigurable Devices
表題 (英文)
著者名 (author) D. Alnajjar,Y. Mitsuyama,M. Hashimoto,T. Onoye
英文著者名 (author)
キー (key)
定期刊行物名 (journal) IEICE Electronics Express (ELEX)
定期刊行物名 (英文)
巻数 (volume) 10
号数 (number) 5
ページ範囲 (pages)
刊行月 (month) 4
出版年 (year) 2013
Impact Factor (JCR)
URL
付加情報 (note)
注釈 (annote)
内容梗概 (abstract)
論文電子ファイル 利用できません.
BiBTeXエントリ
@article{id725,
         title = {PVT-induced Timing Error Detection through Replica Circuits and Time Redundancy in Reconfigurable Devices},
        author = {D. Alnajjar and Y. Mitsuyama and M. Hashimoto and T. Onoye},
       journal = {IEICE Electronics Express (ELEX)},
        volume = {10},
        number = {5},
         month = {4},
          year = {2013},
}
  

Search

Tags

1 件の該当がありました. : このページのURL : HTML

Language: 英語 | 日本語 || ログイン |

This site is maintained by Onoye Lab.
PMAN 3.2.10 build 20181029 - Paper MANagement system / (C) 2002-2016, Osamu Mizuno
Time to show this page: 0.023902 seconds.