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| A. Tsuchiya, M. Hashimoto, and H. Onodera, "Performance Limitation of On-Chip Global Interconnects for High-Speed Signaling," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Science, E88-A(4), pp. 885-891, April 2005. | |
| ID | 580 |
| 分類 | 論文誌 |
| タグ | |
| 表題 (title) |
Performance Limitation of On-Chip Global Interconnects for High-Speed Signaling |
| 表題 (英文) |
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| 著者名 (author) |
A. Tsuchiya,M. Hashimoto,H. Onodera |
| 英文著者名 (author) |
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| キー (key) |
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| 定期刊行物名 (journal) |
IEICE Trans. on Fundamentals of Electronics, Communications and Computer Science |
| 定期刊行物名 (英文) |
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| 巻数 (volume) |
E88-A |
| 号数 (number) |
4 |
| ページ範囲 (pages) |
885-891 |
| 刊行月 (month) |
4 |
| 出版年 (year) |
2005 |
| Impact Factor (JCR) |
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| URL |
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| 付加情報 (note) |
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| 注釈 (annote) |
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| 内容梗概 (abstract) |
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| 論文電子ファイル | 利用できません． |
| BiBTeXエントリ |
@article{id580,
title = {Performance Limitation of On-chip Global Interconnects for High-Speed Signaling},
author = {A. Tsuchiya and M. Hashimoto and H. Onodera},
journal = {IEICE Trans. on Fundamentals of Electronics, Communications and Computer Science},
volume = {E88-A},
number = {4},
pages = {885-891},
month = {4},
year = {2005},
}
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