尾上研究室 研究業績一覧: T. Sato, J. Ichimiya, N. Ono, K. Hachiya, and M. Hashimoto, On-Chip Thermal Gradient Analysis and Temperature Flattening for Soc Design, December 2005.
  • リスト
  •  表 
  • LaTeX
  • BibTeX
Detail of a work
Tweet
T. Sato, J. Ichimiya, N. Ono, K. Hachiya, and M. Hashimoto, "On-Chip Thermal Gradient Analysis and Temperature Flattening for Soc Design," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, E88-A(12), pp. 3382-3389, December 2005.
ID 578
分類 論文誌
タグ
表題 (title) On-Chip Thermal Gradient Analysis and Temperature Flattening for Soc Design
表題 (英文)
著者名 (author) T. Sato,J. Ichimiya,N. Ono,K. Hachiya,M. Hashimoto
英文著者名 (author)
キー (key)
定期刊行物名 (journal) IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences
定期刊行物名 (英文)
巻数 (volume) E88-A
号数 (number) 12
ページ範囲 (pages) 3382-3389
刊行月 (month) 12
出版年 (year) 2005
Impact Factor (JCR)
URL
付加情報 (note)
注釈 (annote)
内容梗概 (abstract)
論文電子ファイル 利用できません.
BiBTeXエントリ
@article{id578,
         title = {On-chip thermal gradient analysis and temperature flattening for SoC design},
        author = {T. Sato and J. Ichimiya and N. Ono and K. Hachiya and M. Hashimoto},
       journal = {IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences},
        volume = {E88-A},
        number = {12},
         pages = {3382-3389},
         month = {12},
          year = {2005},
}
  

Search

Tags

1 件の該当がありました. : このページのURL : HTML

Language: 英語 | 日本語 || ログイン |

This site is maintained by Onoye Lab.
PMAN 3.2.10 build 20181029 - Paper MANagement system / (C) 2002-2016, Osamu Mizuno
Time to show this page: 0.024657 seconds.