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| T. Watanabe and N. Ishiura, "Resister Constraint Analysis to Minimize Spill Code for Application Specific DSPs," IEICE Trans. Fundamentals of Electronics Communications and Computer Sciences, E84-A(6), pp. 1541--1544, June 2001. | |
| ID | 34 |
| 分類 | 論文誌 |
| タグ | |
| 表題 (title) |
Resister Constraint Analysis to Minimize Spill Code for Application Specific DSPs |
| 表題 (英文) |
Resister Constraint Analysis to Minimize Spill Code for Application Specific DSPs |
| 著者名 (author) |
T. Watanabe, N. Ishiura |
| 英文著者名 (author) |
T. Watanabe, N. Ishiura |
| キー (key) |
Tatsuo Watanabe, |
| 定期刊行物名 (journal) |
IEICE Trans. Fundamentals of Electronics Communications and Computer Sciences |
| 定期刊行物名 (英文) |
IEICE Trans. Fundamentals of Electronics Communications and Computer Sciences |
| 巻数 (volume) |
E84-A |
| 号数 (number) |
6 |
| ページ範囲 (pages) |
1541--1544 |
| 刊行月 (month) |
6 |
| 出版年 (year) |
2001 |
| Impact Factor (JCR) |
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| URL |
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| 付加情報 (note) |
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| 注釈 (annote) |
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| 内容梗概 (abstract) |
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| 論文電子ファイル | 利用できません． |
| BiBTeXエントリ |
@article{id34,
title = {Resister Constraint Analysis to Minimize Spill Code for Application Specific {DSPs}},
author = {T. Watanabe and N. Ishiura},
journal = {IEICE Trans. Fundamentals of Electronics Communications and Computer Sciences},
volume = {E84-A},
number = {6},
pages = {1541--1544},
month = {6},
year = {2001},
}
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