Tweet | |
Y. Mitsuyama, Z. Andales, T. Onoye, and I. Shirakawa, "VLSI Architecture of Dynamically Reconfigurable Hardware-Based Cipher," In in Proc. IEEE International Symposium on Circuits and Systems (ISCAS2001) , Sydney, Australia, IV, pp. 734--737, May 2001. | |
ID | 143 |
分類 | 国際会議 |
タグ | |
表題 (title) |
VLSI Architecture of Dynamically Reconfigurable Hardware-Based Cipher |
表題 (英文) |
VLSI Architecture of Dynamically Reconfigurable Hardware-Based Cipher |
著者名 (author) |
Y. Mitsuyama, Z. Andales, T. Onoye, I. Shirakawa |
英文著者名 (author) |
Y. Mitsuyama, Z. Andales, T. Onoye, I. Shirakawa |
編者名 (editor) |
|
編者名 (英文) |
|
キー (key) |
Yukio Mitsuyama, , Takao Onoye, Isao Shirakawa |
書籍・会議録表題 (booktitle) |
in Proc. IEEE International Symposium on Circuits and Systems (ISCAS2001) , Sydney, Australia |
書籍・会議録表題(英文) |
in Proc. IEEE International Symposium on Circuits and Systems (ISCAS2001) , Sydney, Australia |
巻数 (volume) |
IV |
号数 (number) |
|
ページ範囲 (pages) |
734--737 |
組織名 (organization) |
|
出版元 (publisher) |
|
出版元 (英文) |
|
出版社住所 (address) |
|
刊行月 (month) |
5 |
出版年 (year) |
2001 |
採択率 (acceptance) |
|
URL |
|
付加情報 (note) |
|
注釈 (annote) |
|
内容梗概 (abstract) |
|
論文電子ファイル | 利用できません. |
BiBTeXエントリ |
@inproceedings{id143, title = {{VLSI} Architecture of Dynamically Reconfigurable Hardware-Based Cipher}, author = {Y. Mitsuyama and Z. Andales and T. Onoye and I. Shirakawa}, booktitle = {in Proc. IEEE International Symposium on Circuits and Systems (ISCAS2001) , Sydney, Australia}, volume = {IV}, pages = {734--737}, month = {5}, year = {2001}, } |