尾上研究室 研究業績一覧: N. Ishiura, M. Yamaguchi, and N. Nitta, Field Partitioning Algorithms for Compression of Instruction Codes of Application Specific VLIW Processors, July 1998.
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N. Ishiura, M. Yamaguchi, and N. Nitta, "Field Partitioning Algorithms for Compression of Instruction Codes of Application Specific VLIW Processors," In in Proc. International Technical Conference on Circuits/Systems, Computers and Communications, pp. 1387--1390, July 1998.
ID 104
分類 国際会議
タグ
表題 (title) Field Partitioning Algorithms for Compression of Instruction Codes of Application Specific VLIW Processors
表題 (英文)
著者名 (author) N. Ishiura, M. Yamaguchi, N. Nitta
英文著者名 (author)
編者名 (editor)
編者名 (英文)
キー (key) , ,
書籍・会議録表題 (booktitle) in Proc. International Technical Conference on Circuits/Systems, Computers and Communications
書籍・会議録表題(英文)
巻数 (volume)
号数 (number)
ページ範囲 (pages) 1387--1390
組織名 (organization)
出版元 (publisher)
出版元 (英文)
出版社住所 (address)
刊行月 (month) 7
出版年 (year) 1998
採択率 (acceptance)
URL
付加情報 (note)
注釈 (annote)
内容梗概 (abstract)
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BiBTeXエントリ
@inproceedings{id104,
         title = {Field Partitioning Algorithms for Compression of Instruction Codes of Application Specific {VLIW} Processors},
        author = {N. Ishiura and  M. Yamaguchi and  N. Nitta},
     booktitle = {in Proc. International Technical Conference on Circuits/Systems, Computers and Communications},
         pages = {1387--1390},
         month = {7},
          year = {1998},
}
  

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