論文誌

[1] H. Konoura, D. Alnajjar, Y. Mitsuyama, H. Shimada, K. Kobayashi, H. Kanbara, H. Ochi, T. Imagawa, K. Wakabayashi, M. Hashimoto, T. Onoye, and H. Onodera, "Reliability-Configurable Mixed-Grained Reconfigurable Array Supporting C-Based Design and Its Irradiation Testing," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E97-A, number 12, pages 2518--2529, December 2014.

[2] H. Konoura, T. Imagawa, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Comparative Evaluation of Lifetime Enhancement with Fault Avoidance on Dynamically Reconfigurable Devices," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E97-A, number 7, pages 1468--1482, July 2014.

[3] H. Konoura, T. Kameda, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Nbti Mitigation Method by Inputting Random Scan-In Vectors in Standby Time," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E97-A, number 7, pages 1483--1491, July 2014.

[4] D. Alnajjar, H. Konoura, Y. Ko, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Implementing Flexible Reliability in a Coarse Grained Reconfigurable Architecture," IEEE Transactions on VLSI Systems, volume 21, number 12, 2165 -- 2178, December 2013.

[5] T.Kameda, H. Konoura, D. Alnajjar, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Field Slack Assessment for Predictive Fault Avoidance on Coarse-Grained Reconfigurable Devices," IEICE Trans. on Information and Systems , volume E96-D, number 8, pages 1624--1631, August 2013.

[6] I. Homjakovs, T. Hirose, Y. Osaki, M. Hashimoto, and T. Onoye, "A 0.8-V 110-Na Cmos Current Reference Circuit Using Subthreshold Operation," IEICE Electronics Express (ELEX), volume 10, number 4, March 2013.

[7] H. Konoura, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Stress Probability Computation for Estimating NBTI-Induced Delay Degradation," IEICE Trans. Fundamentals, volume E94-A, number 12, pages 2545-2553, December 2011.

[8] K. Tsujino, W. Kobayashi, T. Onoye, and Y. Nakamura, "Automatic Filter Design for 3-D Sound Movement in Embedded Applications," In Acoustical Science and Technology, volume 28, number 4, pages 219-229, July 2007.

[9] K. Tsujino, W. Kobayashi, T. Onoye, and Y. Nakamura, "Efficient 3-D Sound Movement with Time-Varying Iir Filters," In IEICE Trans. Fundamentals, volume E90-A, number 3, pages 618--625, March 2007.

[10] 小谷章夫, 種村嘉高, 密山幸男, 朝井宣実, 中村安久, 尾上孝雄, "ポテンシャルエネルギーを用いた文字重心位置取得手法," 画像電子学会誌, volume 35, number 4, pages 296--305, 2006年7月.

[11] K. Tsujino, K. Furuya, W. Kobayashi, T. Izumi, T. Onoye, and Y. Nakamura, "Design of Realtime 3-D Sound Processing System," In IEICE Trans. Fundamentals, volume E88-A, number 8, pages 2124--2130, August 2005.

[12] K. Kawamoto, K. Kohno, Y. Higuchi, S. Fujino, and I. Shirakawa, "A 25kV ESD Proof LDMOSFET with a Turn-On Discharge MOSFET," IEICE Trans. Electron, volume E84-C, number 6, pages 823--831, June 2001.

国際会議

[1] M. Hashimoto, D. Alnajjar, H. Konoura, Y. Mitsuyama, H. Shimada, K. Kobayashi, H. Kanbara, H. Ochi, T. Imagawa, K. Wakabayashi, T. Onoye, and H. Onodera, "Reliability-Configurable Mixed-Grained Reconfigurable Array Compatible with High-Level Synthesis," Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pages 14--15, January 2015.

[2] D. Alnajjar, H. Konoura, Y. Mitsuyama, H. Shimada, K. Kobayashi, H. Kanbara, H. Ochi, T. Imagawa, S. Noda, K. Wakabayashi, M. Hashimoto, T. Onoye, and H. Onodera, "Reliability-Configurable Mixed-Grained Reconfigurable Array Supporting C-To-Array Mapping and Its Radiation Testing," In Proceedings of IEEE Asian Solid-State Circuits Conference (A-SSCC), pages 313-316, November 2013.

[3] T. Kameda, H. Konoura, D. Alnajjar, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "A Predictive Delay Fault Avoidance Scheme for Coarse-Grained Reconfigurable Architecture," Proceedings of International Conference on Field Programmable Logic and Applications (FPL) , August 2012.

[4] H. Konoura, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Implications of Reliability Enhancement Achieved by Fault Avoidance on Dynamically Reconfigurable Architectures," In Proc. 21st International Conference on Field Programmable Logic and Applications (FPL2011), Chania, Crete, Greece, pages 189-194, September 2011.

[5] D. Alnajjar, H. Kounoura, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Mttf Measurement under Alpha Particle Radiation in a Coarse-Grained Reconfigurable Architecture with Flexible Reliability," In IEEE Workshop on Silicon Errors in Logic - System Effects, March 2011.

[6] H. Konoura, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Comparative Study on Delay Degrading Estimation Due to Nbti with Circuit/Instance/Transistor-Level Stress Probability Consideration," In Proc. International Symposium on Quality Electronic Design (ISQED), pages 646-651, March 2010.

[7] D. Alnajjar, Y. Ko, T. Imagawa, M. Hiromoto, Y. Mitsuyama, M. Hashimoto, H. Ochi, and T. Onoye, "Soft Error Resilient Vlsi Architecture for Signal Processing," In Proceedings of IEEE International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), pages 183--186, December 2009.

[8] D. Alnajjar, Y. Ko, T. Imagawa, H. Konoura, M. Hiromoto, Y. Mitsuyama, M. Hashimoto, H. Ochi, and T. Onoye, "Coarse-Grained Dynamically Reconfigurable Architecture with Flexible Reliability," In Proceedings of International Conference on Field Programmable Logic and Applications (FPL), pages 186--192, August 2009.

[9] Y. Ko, D. Alnajjar, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Coarse-Grained Dynamically Reconfigurable Architecture with Flexible Reliability," In Proceedings of Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI), pages 236--241, March 2009.

[10] D. Alnajjar, Y. Ko, T. Imagawa, M. Hiromoto, Y. Mitsuyama, M. Hashimoto, H. Ochi, and T. Onoye, "A Coarse-Grained Dynamically Reconfigurable Architecture Enabling Flexible Reliability," In Proceedings of IEEE Workshop on System Effects of Logic Soft Errors (SELSE), March 2009.

[11] K. Tsujino, W. Kobayashi, T. Onoye, and Y. Nakamura, "Automated Design of Digital Filters for 3-D Sound Localization in Embedded Applications," In Proc. International Conf. Audio, Speech, and Signal Processing (ICASSP2006), V.349--V.352, May 2006.

[12] A. Kotani, Y. Tanemura, Y. Mitsuyama, Y. Asai, Y. Nakamura, and T. Onoye, "Contour-Based Gravity Center Evaluation of Characters," In Proc. EUROMEDIA, pages 15--20, April 2006.

[13] K. Tsujino, W. Kobayashi, T. Izumi, T. Onoye, and Y. Nakamura, "Realtime Filter Redesign for Interactive 3-D Sound Systems," In Proc. IEEE Region 10 Conference, pages 124--127, November 2004.

[14] K. Tsujino, A. Shigiya, W. Kobayashi, T. Izumi, T. Onoye, and Y. Nakamura, "An Implementation of Moving 3-D Sound Synthesis System Based on Floating Point Dsp," In Proc. IEEE International Symposium on Signal Processing and Information Technology, WA4-8.1-WA4-8.4, December 2003.

[15] K. Tsujino, A. Shigiya, T. Izumi, T. Onoye, Y. Nakamura, and W. Kobayashi, "A Dsp-Based 3-D Sound Synthesis System for Moving Sound Images," In Proc. GAME-ON Conference, pages 23--25, November 2003.

[16] A. Kotani, Y. Asai, Y. Nakamura, S. Okada, N. Koyama, K. Yamane, Y.Okano, Y. Mitsuyama, and T. Onoye, "Visibility Font Technology on High Resolution Color LCD "LCFONT.C"," In in Proc. The 2003 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2003), Kang-Woo Do, Korea, volume 1, pages 535--538, July 2003.

[17] Y. Konno, K. Nakamura, T. Bitoh, K. Saga, and S. Yano, "A Consistent Scan Design System for Large-Scale ASICs," In in Proc. Fifth Asian Test Symposium, pages 82-87, November 1996.

[18] N. Shimizu, Y. Mizuta, H. Kondo, and H. Ono, "A New GPS Real-Time Monitoring System for Deformation Measurements and Its Application," In in Proc. 8th FIG Int. Symp. Deformation Measurements, Hong Kong, S1.5, pages 47-54, June 1996.

研究会等発表論文

[1] 亀田敏広, 郡浦宏明, 密山幸男, 橋本昌宜, 尾上孝雄, "スキャンパスを用いたＮＢＴＩ劣化抑制に関する研究," 情報処理学会DAシンポジウム, pages 201-206, 2011年8月.

[2] 郡浦宏明, 密山幸男, 橋本昌宜, 尾上孝雄, "NBTI による劣化予測におけるトランジスタ動作確率算出法の評価," 情報処理学会DAシンポジウム, pages 181-186, 2009年8月.

大会等発表論文

[1] Y. D. Handoko, 宋天, 藤田玄, 尾上孝雄, 白川功, "低演算量 H.264 向け動き検出アルゴリズム TS-ME の VLSI 化設計," 信学会 総合大会, A-4-10, 2004年3月.