論文誌

[1] H. Fuketa, R. Harada, M. Hashimoto, and T. Onoye, "Measurement and Analysis of Alpha-Particle-Induced Soft Errors and Multiple Cell Upsets in 10t Subthreshold Sram," IEEE Transactions on Device and Materials Reliability, volume 14, number 1, 463 -- 470, March 2014.

[2] R. Harada, S. Abe, H. Fuketa, T. Uemura, M. Hashimoto, and Y. Watanabe, "Angular Dependency of Neutron Induced Multiple Cell Upsets in 65-Nm 10t Subthreshold Sram," IEEE Transactions on Nuclear Science, volume 59, number 6, pages 2791--2795, December 2012.

[3] H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "Adaptive Performance Compensation with In-Situ Timing Error Predictive Sensors for Subthreshold Circuits," IEEE Transactions on VLSI Systems, volume 20, number 2, pages 333--343, February 2012.

[4] H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "Neutron-Induced Soft Errors and Multiple Cell Upsets in 65-Nm 10t Subthreshold Sram," IEEE Transactions on Nuclear Science, volume 58, number 4, pages 2097--2102, August 2011.

[5] H. Fuketa, D. Kuroda, M. Hashimoto, and T. Onoye, "An Average-Performance-Oriented Subthreshold Processor Self-Timed by Memory Read Completion," IEEE Transactions on Circuits and Systems II, volume 58, number 5, pages 299--303, May 2011.

[6] H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "Transistor Variability Modeling and Its Validation with Ring-Oscillation Frequencies for Body-Biased Subthreshold Circuits," IEEE Transactions on VLSI Systems, volume 18, number 7, pages 1118--1129, July 2010.

[7] H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "Trade-Off Analysis between Timing Error Rate and Power Dissipation for Adaptive Speed Control with Timing Error Prediction," IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, volume E92-A, number 12, pages 3094-3102, December 2009.

[8] K. Hamamoto, H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "An Experimental Study on Body-Biasing Layout Style Focusing on Area Efficiency and Speed Controllability," IEICE Trans. on Electronics, volume E92-C, number 2, pages 281-285, February 2009.

国際会議

[1] R. Harada, S. Abe, H. Fuketa, T. Uemura, M. Hashimoto, and Y. Watanabe, "Angular Dependency of Neutron Induced Multiple Cell Upsets in 65-Nm 10t Subthreshold Sram," IEEE Nuclear and Space Radiation Effects Conference, July 2012.

[2] M. Hashimoto and H. Fuketa, "Adaptive Performance Compensation with On-Chip Variation Monitoring (Invited)," In Proceedings of International Midwest Symposium on Circuits and Systems (MWSCAS), August 2011.

[3] H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "Alpha-Particle-Induced Soft Errors and Multiple Cell Upsets in 65-Nm 10t Subthreshold Sram," In Proceedings of International Reliability Physics Symposium (IRPS), pages 213--217, May 2010.

[4] D. Kuroda, H. Fuketa, M. Hashimoto, and T. Onoye, "A 16-Bit Risc Processor with 4.18pj/Cycle at 0.5v Operation," In Proceedings of IEEE COOL Chips, page 190, April 2010.

[5] H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "Adaptive Performance Control with Embedded Timing Error Predictive Sensors for Subthreshold Circuits," In Proc. Asia and South Pacific Design Automation Conference (ASP-DAC), pages 361-362, January 2010.

[6] H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "Adaptive Performance Compensation with In-Situ Timing Error Prediction for Subthreshold Circuits," In Proc. IEEE Custom Integrated Circuits Conference, pages 215-218, September 2009.

[7] H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "Trade-Off Analysis between Timing Error Rate and Power Dissipation for Adaptive Speed Control with Timing Error Prediction," In Proc. Asia and South Pacific Design Automation Conference (ASP-DAC), pages 266-271, January 2009.

[8] H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "Vth Variation Modeling and Its Validation with Ring Oscillation Frequencies for Body-Biased Circuits and Subthreshold Circuits," In ICCAD Colocated Workshop on Test Structure Design for Variability Characterization, November 2008.

[9] H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "Correlation Verification between Transistor Variability Model with Body Biasing and Ring Oscillation Frequency in 90nm Subthreshold Circuits," In Proc. IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), pages 3-8, August 2008.

[10] K. Hamamoto, H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "Experimental Study on Body-Biasing Layout Style - Negligible Area Overhead Enables Sufficient Speed Controllability -," In ACM Great Lakes Symposium on VLSI, pages 387-390, May 2008.

[11] K.Hamamoto, H.Fuketa, M.Hashimoto, Y.Mitsuyama, and T.Onoye, "A Study on Body-Biasing Layout Style Focusing on Area Efficiency and Speed Controllability," In Proc. Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI 2007), pages 233-237, October 2007.