国際会議

[1] M. Hashimoto, A. Tsuchiya, A. Shinmyo, and H. Onodera, "Performance Prediction of On-Chip High-Throughput Global Signaling," In Proceedings of IEEE 14th Topical Meeting on Electrical Performance of Electronic Packaging (EPEP), pages 79-82, October 2005.

[2] A. Shinmyo, M. Hashimoto, and H. Onodera, "Design and Measurement of 6.4 Gbps 8:1 Multiplexer in 0.18um Cmos Process," In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), D9-D10, January 2005.

[3] M. Hashimoto, A. Tsuchiya, A. Shinmyo, and H. Onodera, "Performance Prediction of On-Chip Global Signaling," In IEEE Electrical Design of Advanced Packaging and Systems (EDAPS) , pages 87-100, November 2004.

[4] A. Shinmyo, M. Hashimoto, and H. Onodera, "Design and Optimization of Cmos Current Mode Logic Dividers," In IEEE Asia-Pacific Conference on Advanced System Integrated Circuits , pages 434-435, August 2004.