論文誌

[1] A. Muramatsu, M. Hashimoto, and H. Onodera, "Effects of On-Chip Inductance on Power Distribution Grid," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E88-A, number 12, pages 3564-3572, December 2005.

国際会議

[1] A. Muramatsu, M. Hashimoto, and H. Onodera, "Effects of On-Chip Inductance on Power Distribution Grid," In Proceedings of International Symposium on Physical Design (ISPD), pages 63-69, April 2005.

[2] A. Muramatsu, M. Hashimoto, and H. Onodera, "Lsi Power Network Analysis with On-Chip Wire Inductance," In Proceedings of Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI), pages 55-60, October 2004.