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分類	国際会議
著者名 (author)	M. Hashimoto,H. Onodera,K. Tamaru
英文著者名 (author)
編者名 (editor)
編者名 (英文)
キー (key)
表題 (title)	Input Reordering for Power and Delay Optimization
表題 (英文)
書籍・会議録表題 (booktitle)	Proceedings of IEEE International ASIC Conference and Exhibit
書籍・会議録表題(英文)
巻数 (volume)
号数 (number)
ページ範囲 (pages)	194-198
組織名 (organization)
出版元 (publisher)
出版元 (英文)
出版社住所 (address)
刊行月 (month)	September
出版年 (year)	1997
採択率 (acceptance)
付加情報 (note)
注釈 (annote)
内容梗概 (abstract)
論文電子ファイル

[1-59]  M. Hashimoto, H. Onodera, and K. Tamaru, ``Input Reordering for Power and Delay Optimization,'' In Proceedings of IEEE International ASIC Conference and Exhibit, pp. 194-198, September 1997.

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    author = {M. Hashimoto and H. Onodera and K. Tamaru},
    author_e = {},
    editor = {},
    editor_e = {},
    title = {Input Reordering for Power and Delay Optimization},
    title_e = {},
    booktitle = {Proceedings of IEEE International ASIC Conference and Exhibit},
    
    booktitle_e = {},
    volume = {},
    number = {},
    pages = {194-198},
    organization = {},
    publisher = {},
    publisher_e = {},
    address = {},
    month = {September},
    year = {1997},
    acceptance = {},
    note = {},
    annote = {}
}