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分類	国際会議
著者名 (author)	M. Hashimoto,H. Onodera
英文著者名 (author)
編者名 (editor)
編者名 (英文)
キー (key)
表題 (title)	Post-Layout Transistor Sizing for Power Reduction in Cell-Based Design
表題 (英文)
書籍・会議録表題 (booktitle)	Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC)
書籍・会議録表題(英文)
巻数 (volume)
号数 (number)
ページ範囲 (pages)	359-365
組織名 (organization)
出版元 (publisher)
出版元 (英文)
出版社住所 (address)
刊行月 (month)	January
出版年 (year)	2001
採択率 (acceptance)
付加情報 (note)
注釈 (annote)
内容梗概 (abstract)
論文電子ファイル

[1-52]  M. Hashimoto and H. Onodera, ``Post-Layout Transistor Sizing for Power Reduction in Cell-Based Design,'' In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 359-365, January 2001.

@inproceedings{1_52,
    author = {M. Hashimoto and H. Onodera},
    author_e = {},
    editor = {},
    editor_e = {},
    title = {Post-Layout Transistor Sizing for Power Reduction in Cell-Based
    Design},
    title_e = {},
    booktitle = {Proceedings of Asia and South Pacific Design Automation
    Conference (ASP-DAC)},
    booktitle_e = {},
    volume = {},
    number = {},
    pages = {359-365},
    organization = {},
    publisher = {},
    publisher_e = {},
    address = {},
    month = {January},
    year = {2001},
    acceptance = {},
    note = {},
    annote = {}
}