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分類	論文誌
著者名 (author)	M. Hashimoto,H. Onodera
英文著者名 (author)
キー (key)
表題 (title)	A Performance Optimization Method by Gate Resizing Based on Statistical Static Timing Analysis
表題 (英文)
定期刊行物名 (journal)	IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences
定期刊行物名 (英文)
巻数 (volume)	E83-A
号数 (number)	12
ページ範囲 (pages)	2558-2568
刊行月 (month)	December
出版年 (year)	2000
Impact Factor (JCR)
付加情報 (note)
注釈 (annote)
内容梗概 (abstract)
論文電子ファイル

[0-25]  M. Hashimoto and H. Onodera, ``A Performance Optimization Method by Gate Resizing Based on Statistical Static Timing Analysis,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E83-A, no. 12, pp. 2558-2568, December 2000.

@article{0_25,
    author = {M. Hashimoto and H. Onodera},
    author_e = {},
    title = {A Performance Optimization Method by Gate Resizing Based on
    Statistical Static Timing Analysis},
    title_e = {},
    journal = {IEICE Trans. on Fundamentals of Electronics, Communications and
    Computer Sciences},
    journal_e = {},
    volume = {E83-A},
    number = {12},
    pages = {2558-2568},
    month = {December},
    year = {2000},
    impactfactor = {},
    note = {},
    annote = {}
}