著者名 (author) 表題 (title) 論文誌/会議名 巻数 (volume) 号数 (number) ページ範囲 (pages) 刊行月 (month) 出版年 (year) File
論文誌
H. Tsutsui, T. Masuzaki, Y. Hayashi, Y. Taki, T. Izumi, T. Onoye, Y. Nakamura
Design framework for {JPEG2000} system architecture
Journal of Intelligent Automation and Soft Computing
13
3
331--343
March
2006

論文誌
K. Tsujino, K. Furuya, W. Kobayashi, T. Izumi, T. Onoye, Y. Nakamura
Design of realtime 3-D sound processing system
IEICE Trans. Fundamentals
E88-A
8
2124--2130
August
2005

論文誌
T. Okamoto, T. Yuasa, T. Izumi, T. Onoye, Y. Nakamura
Design tools and trial design for PCA-Chip2
IEICE Trans. Information and Systems,
E86-D
5
868--871
May
2003

論文誌
Hiroshi Tsutsui, Akihiko Tomita, Shigenori Sugimoto, Kazuhisa Sakai, Tomonori Izumi, Takao Onoye, Yukihiro Nakamura
LUT-Array-Based PLD and Synthesis Approach Based on Sum of Generalized Complex Terms Expression
IEICE Trans. Fundamentals
E84-A
11
2681-2689
November
2001

国際会議
K. Tsujino, W. Kobayashi, T. Izumi, T. Onoye, Y. Nakamura
Realtime filter redesign for interactive 3-D sound systems
Proc. IEEE Region 10 Conference


124--127
November
2004

国際会議
H. Tsutsui, T. Masuzaki, Y. Hayashi, Y. Taki, T. Izumi, T. Onoye, Y. Nakamura
Scalable design framework for {JPEG2000} system architecture
Proc. Asia-Pacific Computer Systems Architecture Conference


6--11
September
2004

国際会議
H. Sugita, Q.-M. Vu, T. Masuzaki, H. Tsutsui, T. Izumi, T. Onoye, Y. Nakamura
{JPEG2000} high-speed progressive decoding scheme
Proc. IEEE International Symposium on Circuits and Systems


873--876
May
2004

国際会議
K. Tsujino, A. Shigiya, W. Kobayashi, T. Izumi, T. Onoye, Y. Nakamura
An implementation of moving 3-D sound synthesis system based on floating point DSP
Proc. IEEE International Symposium on Signal Processing and Information Technology


WA4-8.1-WA4-8.4
December
2003

国際会議
K. Tsujino, A. Shigiya, T. Izumi, T. Onoye, Y. Nakamura, W. Kobayashi
A DSP-based 3-D sound synthesis system for moving sound images
Proc. GAME-ON Conference


23--25
November
2003

国際会議
Y. Hayashi, H. Tsutsui, T. Masuzaki, T. Izumi, T. Onoye, Y. Nakamura
Design framework for {JPEG2000} encoding system architecture
Proc. International Symposium on Circuits and Systems


740--743
May
2003

国際会議
T. Yuasa, A. Tomita, T. Izumi, T. Onoye, Y. Nakamura
An approach for circuit size reduction by variable reordering for PCA-chip2
Proc. Workshop on Synthesis and System Integration of Mixed Information Technologies


217--221
April
2003

国際会議
Y. Hayashi, H. Tsutsui, T. Masuzaki, T. Izumi, T. Onoye, Y. Nakamura
Scalable design framework for {JPEG2000} encoder architecture
Proc. Workshop on Synthesis and System Integration of Mixed Information Technologies


372--376
April
2003

国際会議
T. Yuasa, Y. Soga, T. Izumi, T. Onoye, Y. Nakamura
An improved communication channel in dynamic reconfigurable device for multimedia applications
Proc. EUROMEDIA


152--157
April
2003


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