論文誌

[1] H. Mizuno, H. Kobayashi, T. Onoye, and I. Shirakawa, "Performance Estimation at Architecture Level for Embedded Systems," IEEE Transaction on Fundamentals of Electronics, Communications and Computer Sciences, volume E85-A, number 12, pages 2636--2644, December 2002.

[2] K. Kawamoto, S. Mizuno, H. Abe, Y. Higuchi, H. Ishihara, H. Fukumoto, T. Watanabe, S. Fujino, and I. Shirakawa, "A Single Chip Automotive Control LSI Using SOI Bipolar Complimentary MOS Double-Diffused MOS," The Japan Society of Applied Physics, volume 40, number 4B, pages 2891--2896, April 2001.

国際会議

[1] H. Mizuno, H. Kobayashi, T. Onoye, and I. Shirakawa, "Power Estimation at Architecture Level for Embedded Systems," In ibid, volume II, pages 476--479, May 2002.

[2] H. Mizuno, H. Kobayashi, T. Onoye, and I. Shirakawa, "An Architecture Level Power Estimation Method for Embedded Systems," In in Proc. Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI 2001), Nara, Japan, pages 78--85, October 2001.

[3] K. Kawamoto, S. Mizuno, H. Abe, Y. Higuchi, S. Fujino, and I. Shirakawa, "A Shingle Chip Automotive Control LSI Using SOI BiCDMOS," In in Proc. of 2000 International Conference on Solid State Device and Materials, pages 486-487, August 2000.