- Academic Journal
- [1]
T. Minamikawa, D. Nagai, T. Kaneko, I. Taniguchi, M. Ando, R. Akama, and K. Takenaka, ``Analytical Imaging of Colour Pigments Used in Japanese Woodblock Prints Using Raman Microspectroscopy,'' Journal of Raman Spectroscopy, vol. 48, no. 12, pp. 1887-1895, December 2017.
- [2]
Takemi Tsuzuki, Yuischi Itoh, Masahiro Ando, Toshiki Hosoi, Kazuki Takashima, Takao Onoye, Yoshifumi Kitamura, ``Stackblock: a Block-Shaped Interface for 3d Model Reconstruction of Stacked Blocks,'' ¾ðÊó½èÍý³Ø²ñÏÀʸ»ï, vol. 57, no. 12, pp. 2565-2576, December 2016.
- [3]
Yuki Tsujimoto, Yuichi Itoh, Takao Onoye, ``Ketsuro-Graffiti: an Interactive Display with Water Condensation,'' ÆüËܥС¼¥Á¥ã¥ë¥ê¥¢¥ê¥Æ¥£³Ø²ñÏÀʸ»ï, vol. 21, no. 3, pp. 513-520, September 2016.
- [4]
C. Siriteanu, A. Takemura, C. Koutschan, S. Kuriki, D. Richards, and H. Shin, ``Exact Zf Analysis and Computer-Algebra-Aided Evaluation in Rank-1 Los Rician Fading,'' IEEE Transactions on Wireless Communications, accepted, April 2016.
- [5]
Constantin Siriteanu, Satoshi Kuriki, Donald Richards, and Akimichi Takemura, ``Chi-Square Mixture Representations for the Distribution of the Scalar Schur Complement in a Noncentral Wishart Matrix,'' Statistics and Probability Letters, accepted, February 2016.
- [6]
S. Iizuka, Y. Higuchi, M. Hashimoto, and T. Onoye, ``Device-Parameter Estimation with Sensitivity-Configurable Ring Oscillator,'' IEICE Trans. Fundamentals of Electronics Communications and Computer Sciences, vol. E98-A, no. 12, pp. 2607--2613, December 2015.
- [7]
Kosuke TOMITA, Masahide HATANAKA, and Takao ONOYE, ``Implementation of Viterbi Decoder Toward GPU-Based SDR Receiver,'' IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, vol. E98-A, no. 11, pp. 2246-2253, November 2015.
- [8]
T.T. Oo, T. Onoye, and K. Shin, ``Partial Encryption Method That Enhances MP3 Security,'' IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, vol. E98-A, no. 8, pp. 1760-1768, August 2015.
- [9]
D. Fukuda, K. Watanabe, Y. Kanazawa, and M. Hashimoto, ``Modeling the Effect of Global Layout Pattern on Wire Width Variation for On-The-Fly Etching Process Modification,'' IEICE Trans. Fundamentals of Electronics Communications and Computer Sciences, vol. E98-A, no. 7, pp. 1467--1474, July 2015.
- [10]
T. Shinada, M. Hashimoto, and T. Onoye, ``Proximity Distance Estimation Based on Electric Field Communication between 1mm³ Sensor Nodes,'' Analog Integrated Circuits and Signal Processing, May 2015.
- [11]
C.Siriteanu, A.Takemura, S.Kuriki, and H.Shin, ``Mimo Zero-Forcing Performance Evaluation Using the Holonomic Gradient Method,'' IEEE Transactions on Wireless Communications, vol. 14, no. 4, p. 2322 - 2335, April 2015.
- [12]
C.Siriteanu, A.Takemura, S.Kuriki, D.Richards, and H.Shin, ``Schur Complement Based Analysis of Mimo Zero-Forcing for Rician Fading,'' IEEE Transactions on Wireless Communications, vol. 14, no. 4, pp. 1757-1771, April 2015.
- [13]
S. Hirokawa, R. Harada, M. Hashimoto, and T. Onoye, ``Characterizing Alpha- and Neutron-Induced Seu and Mcu on Sotb and Bulk 0.4-V Srams,'' IEEE Transactions on Nuclear Science, April 2015.
- [14]
H. Konoura, D. Alnajjar, Y. Mitsuyama, H. Shimada, K. Kobayashi, H. Kanbara, H. Ochi, T. Imagawa, K. Wakabayashi, M. Hashimoto, T. Onoye, and H. Onodera, ``Reliability-Configurable Mixed-Grained Reconfigurable Array Supporting C-Based Design and Its Irradiation Testing,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E97-A, no. 12, pp. 2518--2529, December 2014.
- [15]
T. Amaki, M. Hashimoto, and T. Onoye, ``A Process and Temperature Tolerant Oscillator-Based True Random Number Generator,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E97-A, no. 12, pp. 2393--2399, December 2014.
- [16]
D. Fukuda, K. Watanabe, N. Idani, Y. Kanazawa, and M. Hashimoto, ``Edge-Over-Erosion Error Prediction Method Based on Multi-Level Machine Learning Algorithm,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E97-A, no. 12, pp. 2373--2382, December 2014.
- [17]
T. Uemura, T. Kato, R. Tanabe, H. Iwata, J. Ariyoshi, H. Matsuyama, and M. Hashimoto, ``Exploring Well-Configurations for Minimizing Single Event Latchup,'' IEEE Transactions on Nuclear Science, vol. 61, no. 6, pp. 3282--3289, December 2014.
- [18]
H. Konoura, T. Imagawa, Y. Mitsuyama, M. Hashimoto, and T. Onoye, ``Comparative Evaluation of Lifetime Enhancement with Fault Avoidance on Dynamically Reconfigurable Devices,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E97-A, no. 7, pp. 1468--1482, July 2014.
- [19]
H. Konoura, T. Kameda, Y. Mitsuyama, M. Hashimoto, and T. Onoye, ``Nbti Mitigation Method by Inputting Random Scan-In Vectors in Standby Time,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E97-A, no. 7, pp. 1483--1491, July 2014.
- [20]
R. Harada, Y. Mitsuyama, M. Hashimoto, and T. Onoye, ``Set Pulse-Width Measurement Suppressing Pulse-Width Modulation and Within-Die Process Variation Effects,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E97-A, no. 7, pp. 1461--1467, July 2014.
- [21]
±óƣδ²ð, °Ëƣͺ°ì, ÃæÅ繯ʹ, ´ßÌîʸϺ, ``¥Þ¥ë¥Á¥¿¥Ã¥Á¥Ç¥£¥¹¥×¥ì¥¤¤òÍѤ¤¤¿Ê£¿ô¿Í¤Ë¤è¤ë¥×¥é¥ó¥Ë¥ó¥°¤¬¤Ç¤¤ë¥Ç¥¸¥¿¥ë¥µ¥¤¥Í¡¼¥¸¥·¥¹¥Æ¥à¤ÎÄó°Æ,'' ¾ðÊó½èÍý³Ø²ñÏÀʸ»ï, vol. 55, no. 4, April 2014.
- [22]
H. Fuketa, R. Harada, M. Hashimoto, and T. Onoye, ``Measurement and Analysis of Alpha-Particle-Induced Soft Errors and Multiple Cell Upsets in 10t Subthreshold Sram,'' IEEE Transactions on Device and Materials Reliability, vol. 14, no. 1, p. 463 -- 470, March 2014.
- [23]
C.Siriteanu, S.D. Blostein, A.Takemura, H.Shin, S.Yousefi, and S.Kuriki, ``Exact Mimo Zero-Forcing Detection Analysis for Transmit-Correlated Rician Fading,'' IEEE Transactions on Wireless Communications, vol. 13, no. 3, pp. 1514-1527, March 2014.
- [24]
Sho Tsugawa, Hiroyuki Ohsaki, Yuichi Itoh, Naonori Ono, Keiichiro Kagawa, and Kazuki Takashima, ``Dynamic Social Network Analysis with Heterogeneous Sensors in Ambient Environment,'' Social Networking, vol. 3, no. 1, pp. 9-18, January 2014.
- [25]
D. Alnajjar, H. Konoura, Y. Ko, Y. Mitsuyama, M. Hashimoto, and T. Onoye, ``Implementing Flexible Reliability in a Coarse Grained Reconfigurable Architecture,'' IEEE Transactions on VLSI Systems, vol. 21, no. 12, p. 2165 -- 2178, December 2013.
- [26]
T. Uemura, T. Kato, H. Matsuyama, and M. Hashimoto, ``Mitigating Multi-Bit-Upset with Well-Slits in 28 Nm Multi-Bit-Latch,'' IEEE Transactions on Nuclear Science, vol. 60, no. 6, pp. 4362--4367, December 2013.
- [27]
T. Uemura, T. Kato, H. Matsuyama, and M. Hashimoto, ``Soft-Error in Sram at Ultra-Low Voltage and Impact of Secondary Proton in Terrestrial Environment,'' IEEE Transactions on Nuclear Science, vol. 60, no. 6, pp. 4232--4237, December 2013.
- [28]
M. Okada, M. Hatanaka, K. Kagawa, and S. Miyamoto, ``Realization of Secure Ambient Wireless Network System Based on Spatially Distributed Ciphering Function,'' IEICE Trans. on Fundamentals of Electronics, vol. E96-A, no. 11, November 2013.
- [29]
ÃæÅ繯ʹ, °Ëƣͺ°ì, ÎÓͦ²ð, ÃÓÅÄϾÏ, Æ£ÅÄÏÂÇ·, Èø¾å¹§Íº, ``Emoballoon: ¥½¡¼¥·¥ã¥ë¥¿¥Ã¥Á¥¤¥ó¥¿¥é¥¯¥·¥ç¥ó¤Î¤¿¤á¤Î½À¤é¤«¤ÊÉ÷Á¥·¿¥¤¥ó¥¿¥Õ¥§¡¼¥¹,'' ÆüËܥС¼¥Á¥ã ¥ë¥ê¥¢¥ê¥Æ¥£³Ø²ñÏÀʸ»ï, vol. 18, no. 3, pp. 255-265, September 2013.
- [30]
K. Shinkai, M. Hashimoto, and T. Onoye, ``A Gate-Delay Model Focusing on Current Fluctuation Over Wide Range of Process-Voltage-Temperature Variations,'' Integration, the VLSI Journal, vol. 46, no. 4, pp. 345--358, September 2013.
- [31]
R. Harada, Y. Mitsuyama, M. Hashimoto, and T. Onoye, ``Impact of NBTI-Induced Pulse-Width Modulation on SET Pulse-Width Measurement,'' IEEE Transactions on Nuclear Science, vol. 60, no. 4, pp. 2630--2634, August 2013.
- [32]
T.Kameda, H. Konoura, D. Alnajjar, Y. Mitsuyama, M. Hashimoto, and T. Onoye, ``Field Slack Assessment for Predictive Fault Avoidance on Coarse-Grained Reconfigurable Devices,'' IEICE Trans. on Information and Systems , vol. E96-D, no. 8, pp. 1624--1631, August 2013.
- [33]
T. Amaki, M. Hashimoto, Y. Mitsuyama, and T. Onoye, ``A Worst-Case-Aware Design Methodology for Noise-Tolerant Oscillator-Based True Random Number Generator with Stochastic Behavior Modeling,'' IEEE Transactions on Information Forensics and Security, vol. 8, no. 8, pp. 1331--1342, August 2013.
- [34]
Y. Ogasahara, M. Hashimoto, T. Kanamoto, and T. Onoye, ``Supply Noise Suppression by Triple-Well Structure,'' IEEE Transactions on VLSI Systems, vol. 21, no. 4, pp. 781--785, April 2013.
- [35]
D. Alnajjar, Y. Mitsuyama, M. Hashimoto, and T. Onoye, ``Pvt-Induced Timing Error Detection Through Replica Circuits and Time Redundancy in Reconfigurable Devices,'' IEICE Electronics Express (ELEX), vol. 10, no. 5, April 2013.
- [36]
I. Homjakovs, T. Hirose, Y. Osaki, M. Hashimoto, and T. Onoye, ``A 0.8-V 110-Na Cmos Current Reference Circuit Using Subthreshold Operation,'' IEICE Electronics Express (ELEX), vol. 10, no. 4, March 2013.
- [37]
T. Amaki, M. Hashimoto, and T. Onoye, ``Jitter Amplifier for Oscillator-Based True Random Number Generator,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E96-A, no. 3, pp. 684--696, March 2013.
- [38]
I. Homjakovs, M. Hashimoto, T. Hirose, and T. Onoye, ``Signal-Dependent Analog-To-Digital Conversion Based on Minimax Sampling,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E96-A, no. 2, pp. 459--468, February 2013.
- [39]
Æ£ÅÄÏÂÇ·, ¹âÅèϵ£, °Ëƣͺ°ì, ÂçºêÇîÇ·, ¾®Ìîľμ, ¹áÀî·Ê°ìϺ, ÄÅÀîæÆ, ÃæÅ繯ʹ, ÎÓͦ²ð, ´ßÌîʸϺ, ``Ambient Suite¤òÍѤ¤¤¿¥Ñ¡¼¥Æ¥£¾ìÌ̤ˤª¤±¤ëÉô²°·¿²ñÏûٱ祷¥¹¥Æ¥à¤Î¼ÂÁõ¤Èɾ²Á,'' ÅŻҾðÊóÄÌ¿®³Ø²ñÏÀʸ»ï, vol. J96-D, no. 1, pp. 120-132, January 2013.
- [40]
Yusuke Hayashi, Yuichi Itoh, Kazuki Takashima, Kazuyuki Fujita, Kosuke Nakajima, and Takao Onoye, ``Cup-Le: Cup-Shaped Tool for Subtly Collecting Information during Conversational Experiment,'' The International Journal of Advanced Computer Science, vol. 3, no. 1, pp. 44-50, January 2013.
- [41]
Jaehoon Yu, Ryusuke Miyamoto, Takao Onoye, ``Speed-Up of Cohog-Based Pedestrian Detection by Stochastic Sampling,'' ²èÁüÅŻҳزñ»ï, vol. 42, no. 1, pp. 30-40, January 2013.
- [42]
Masahiro Nakanishi, Masahide Hatanaka, Takao Onoye, ``User Interface Management System for Home Appliance,'' ²èÁüÅŻҳزñ»ï, vol. 42, no. 1, pp. 81-88, January 2013.
- [43]
M. Hatanaka, T. Homemoto, and T. Onoye, ``Architecture and Implementation of Fading Compensation for Dynamic Spectrum Access Wireless Communication Systems,'' VLSI Design, vol. vol. 2013, Article ID 967370, 9 pages, 2013.
- [44]
T. Enami, T. Sato, and M. Hashimoto, ``Power Distribution Network Optimization for Timing Improvement with Statistical Noise Model and Timing Analysis,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E95-A, no. 12, pp. 2261--2271, December 2012.
- [45]
Y. Takai, M. Hashimoto, and T. Onoye, ``Power Gating Implementation for Supply Noise Mitigation with Body-Tied Triple-Well Structure,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E95-A, no. 12, pp. 2220--2225, December 2012.
- [46]
S. Kimura, M. Hashimoto, and T. Onoye, ``A Body Bias Clustering Method for Low Test-Cost Post-Silicon Tuning,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E95-A, no. 12, pp. 2292--2300, December 2012.
- [47]
R. Harada, S. Abe, H. Fuketa, T. Uemura, M. Hashimoto, and Y. Watanabe, ``Angular Dependency of Neutron Induced Multiple Cell Upsets in 65-Nm 10t Subthreshold Sram,'' IEEE Transactions on Nuclear Science, vol. 59, no. 6, pp. 2791--2795, December 2012.
- [48]
Ryusuke Endo, Yuichi Itoh, Kosuke Nakajima, Kazuyuki Fujita, Fumio Kishino, ``Digital Signage Supporting Collaborative Route Planning in Real Commercial Establishment,'' ICIC Express Letters, vol. 6, no. 12, pp. 2967-2972, December 2012.
- [49]
M. Okada, T. Onoye, and W. Kobayashi, ``A Ray Tracing Simulation of Sound Diffraction Based on the Analytic Secondary Source Model,'' IEEE Trans. Audio, Speech and Language Processing , vol. 20, no. 9, pp. 2448-2460 , November 2012.
- [50]
ÃæÅ繯ʹ, °Ëƣͺ°ì, ÃÛ붬Ƿ, Æ£ÅÄÏÂÇ·, ¹âÅèϵ£, ´ßÌîʸϺ, ``FuSA2 Touch Display: Âç²èÌÌÌÓ¾õ¥Þ¥ë¥Á¥¿¥Ã¥Á¥Ç¥£¥¹¥×¥ì¥¤,'' ¾ðÊó½èÍý³Ø²ñÏÀʸ»ï, vol. 53, no. 3, pp. 1069-1081, March 2012.
- [51]
H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, ``Adaptive Performance Compensation with In-Situ Timing Error Predictive Sensors for Subthreshold Circuits,'' IEEE Transactions on VLSI Systems, vol. 20, no. 2, pp. 333--343, February 2012.
- [52]
H. Konoura, Y. Mitsuyama, M. Hashimoto, and T. Onoye, ``Stress Probability Computation for Estimating NBTI-Induced Delay Degradation,'' IEICE Trans. Fundamentals, vol. E94-A, no. 12, pp. 2545-2553, December 2011.
- [53]
K. Shinkai, M. Hashimoto, and T. Onoye, ``Extracting Device-Parameter Variations with Ro-Based Sensors,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E94-A, no. 12, pp. 2537--2544, December 2011.
- [54]
T. Okumura and M. Hashimoto, ``Setup Time, Hold Time and Clock-To-Q Delay Computation under Dynamic Supply Noise,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E94-A, no. 10, pp. 1948--1953, October 2011.
- [55]
H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, ``Neutron-Induced Soft Errors and Multiple Cell Upsets in 65-Nm 10t Subthreshold Sram,'' IEEE Transactions on Nuclear Science, vol. 58, no. 4, pp. 2097--2102, August 2011.
- [56]
H. Fuketa, D. Kuroda, M. Hashimoto, and T. Onoye, ``An Average-Performance-Oriented Subthreshold Processor Self-Timed by Memory Read Completion,'' IEEE Transactions on Circuits and Systems II, vol. 58, no. 5, pp. 299--303, May 2011.
- [57]
T. Enami, S. Ninomiya, K. Shinkai, S. Abe, and M. Hashimoto, ``Statistical Timing Analysis Considering Clock Jitter and Skew Due to Power Supply Noise and Process Variation,'' IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, vol. 93-A, no. 12, pp. 2399-2408, December 2010.
- [58]
R. Harada, Y. Mitsuyama, M. Hashimoto, and T. Onoye, ``Measurement Circuits for Acquiring SET Pulse Width Distribution with Sub-FO1-Inverter-Delay Resolution,'' IEICE Transaction on Fundamentals of Electronics, Communications and Computer Sciences, vol. E93-A, no. 12, pp. 2417-2423, December 2010.
- [59]
S. Ninomiya and M. Hashimoto, ``Accuracy Enhancement of Grid-Based Ssta by Coefficient Interpolation,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E93-A, no. 12, pp. 2441--2446, December 2010.
- [60]
T. Okumura, F. Minami, K. Shimazaki, K. Kuwada, and M. Hashimoto, ``Gate Delay Estimation in Sta under Dynamic Power Supply Noise,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E93-A, no. 12, pp. 2447--2455, December 2010.
- [61]
M. Okada, N. Iwanaga, T. Matsumura, T. Onoye, and W. Kobayashi, ``3D Sound Rendering for Multiple Sound Sources Based on Fuzzy Clustering,'' IEICE Trans. Fundamentals, vol. E93-A, no. 11, pp. 2163-2172, November 2010.
- [62]
H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, ``Transistor Variability Modeling and Its Validation with Ring-Oscillation Frequencies for Body-Biased Subthreshold Circuits,'' IEEE Transactions on VLSI Systems, vol. 18, no. 7, pp. 1118--1129, July 2010.
- [63]
Y. Mitsuyama, K. Takahashi, R. Imai, M. Hashimoto, T. Onoye, I. Shirakawa, ``Application Design of Multi-Standard Decoder on Media-Centric Reconfigurable Architecture,'' IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, vol. J93-A, no. 6, pp. 397-413, June 2010.
- [64]
Kenji WATANABE, Toshimitsu TATSUKA, Masahide HATANAKA, Takao ONOYE, ``A Room Layout Estimation Method for Indoor Localization System,'' Journal of Signal Processing, vol. 14, no. 3, pp. 231-242, May 2010.
- [65]
K. Shinkai, M. Hashimoto, and T. Onoye, ``Prediction of Self-Heating in Short Intra-Block Wires,'' IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, vol. E93-A, no. 3, pp. 583-594, March 2010.
- [66]
T. Kanamoto, T. Okumura, K. Furukawa, H. Takafuji, A. Kurokawa, K. Hachiya, T. Sakata, M. Tanaka, H. Nakashima, H. Masuda, T. Sato, and M. Hashimoto, ``Impact of Self-Heating in Wire Interconnection on Timing,'' IEICE Trans. on Electronics, vol. E93-C, no. 3, pp. 388--392, March 2010.
- [67]
Z. Huang, A. Kurokawa, M. Hashimoto, T. Sato, M. Jiang, and Y. Inoue, ``Modeling the Overshooting Effect for Cmos Inverter Delay Analysis in Nanometer Technologies,'' IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems , vol. 29, no. 2, pp. 250--260, February 2010.
- [68]
H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, ``Trade-Off Analysis between Timing Error Rate and Power Dissipation for Adaptive Speed Control with Timing Error Prediction,'' IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, vol. E92-A, no. 12, pp. 3094-3102, December 2009.
- [69]
T. Sakata, T. Okumura, A. Kurokawa, H. Nakashima, H. Masuda, T. Sato, M. Hashimoto, K. Hachiya, K. Furukawa, M. Tanaka, H. Takafuji, and T. Kanamoto, ``An Approach for Reducing Leakage Current Variation Due to Manufacturing Variability,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E92-A, no. 12, pp. 3016--3023, December 2009.
- [70]
×¢ËÜ ÀµÇ·, Åû°æ ¹°, ±ÛÃÒ ÍµÇ·, ¾®º´Ìî ÃÒÇ·, ÀÐÀî ·ûÍÎ, ÃæÂ¼ ¹Ô¹¨, ``Media Streaming System with Dynamic Rate Control for High Speed Mobile Networks,'' ¾ðÊó½èÍý³Ø²ñÏÀʸ»ï, vol. 50, no. 10, pp. 2532-2542, October 2009.
- [71]
A. Kurokawa, T. Sato, T. Kanamoto, and M. Hashimoto, ``Interconnect Modeling: a Physical Design Perspective (Invited),'' IEEE Transactions on Electron Devices, vol. 56, no. 9, pp. 1840--1851, September 2009.
- [72]
M. Hatanaka, T. Tatsuka, K. Watanabe, T. Onoye, ``Location Estimation with Transmission Attenuation in Home Network,'' IPSJ Journal, vol. 50, no. 8, p. 1835–1844, August 2009.
- [73]
Hiroki Sugano, Takahiko Masuzaki, Hiroshi Tsutsui, Takao Onoye, Hiroyuki Ochi, and Yukihiro Nakamura, ``Efficient Memory Organization Framework for Jpeg2000 Entropy Codec,'' IEICE Trans. Fundamentals, vol. E92-A, no. 8, pp. 1970-1977, August 2009.
- [74]
Y. Ogasahara, M. Hashimoto, and T. Onoye, ``All Digital Ring-Oscillator Based Macro for Sensing Dynamic Supply Noise Waveform,'' IEEE Journal of Solid-State Circuits, vol. 44, no. 6, pp. 1745--1755, June 2009.
- [75]
Áýºê δɧ, Åû°æ ¹°, Èø¾å ¹§Íº, ¿åÌî ͺ²ð, º´¡¹ÌÚ ¸µ, ÃæÂ¼ ¹Ô¹¨, ``A Jpeg2000 Codec System Architecture for Single Tile Processing,'' Journal of IIEEJ, vol. 38, no. 3, pp. 296-304, May 2009.
- [76]
T. Enami, S. Ninomiya, and M. Hashimoto, ``Statistical Timing Analysis Considering Spatially and Temporally Correlated Dynamic Power Supply Noise,'' IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 28, no. 4, pp. 541-553, April 2009.
- [77]
T. Okumura, A. Kurokawa, H. Masuda, T. Kanamoto, M. Hashimoto, H. Takafuji, H. Nakashima, N. Ono, T. Sakata, and T. Sato, ``Improvement in Computational Accuracy of Output Transition Time Variation Considering Threshold Voltage Variations,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. 92-A, no. 4, pp. 990--997, April 2009.
- [78]
K. Hamamoto, H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, ``An Experimental Study on Body-Biasing Layout Style Focusing on Area Efficiency and Speed Controllability,'' IEICE Trans. on Electronics, vol. E92-C, no. 2, pp. 281-285, February 2009.
- [79]
Takahiko Masuzaki, Hiroshi Tsutsui, Quang Minh Vu, Takao Onoye, and Yukihiro Nakamura, ``JPEG2000 High-Speed SNR Progressive Decoding Scheme,'' International Journal of Computer Science and Network Security, vol. 9, no. 1, pp. 62-68, January 2009.
- [80]
Y. Mitsuyama, K. Takahashi, R. Imai, M. Hashimoto, T. Onoye, I. Shirakawa, ``Area-Efficient Reconfigurable Architecture for Media Processin,'' IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, vol. E91-A, no. 12, pp. 3651-3662, December 2008.
- [81]
T. Kanamoto, Y. Ogasahara, K. Natsume, K. Yamaguchi, H. Amishiro, T. Watanabe, and M. Hashimoto, ``Impact of Well Edge Proximity Effect on Timing,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E91-A, no. 12, pp. 3461-3464, December 2008.
- [82]
S. Abe, M. Hashimoto, and T. Onoye, ``Clock Skew Evaluation Considering Manufacturing Variability in Mesh-Style Clock Distribution,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E91-A, no. 12, pp. 3481-3487, December 2008.
- [83]
M. Hashimoto, J. Siriporn, A. Tsuchiya, H. Zhu, and C.-K. Cheng, ``Analytical Eye-Diagram Model for On-Chip Distortionless Transmission Lines and Its Application to Design Space Exploration,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E91-A, no. 12, pp. 3474-3480, December 2008.
- [84]
R. Hashimoto, T. Matsumura, Y. Nozato, K. Watanabe, and T. Onoye, ``Implementation of Multi-Agent Object Attention System Based on Biologically Inspired Attractor Selection,'' IEICE Trans. Fundamentals, vol. E91-A, no. 10, October 2008.
- [85]
ÅÏÊÕ ¿µ¸ã, ¶¶ËÜ ¾»µ¹, º´Æ£¼÷ÎÑ, ``¥¿¥¤¥ß¥ó¥°Êâα¤Þ¤ê²þÁ±¤òÌÜŪ¤È¤¹¤ë±é»»´ï¥«¥¹¥±¡¼¥Ç¥£¥ó¥°,'' ¾ðÊó½èÍý³Ø²ñÏÀʸ»ï¥³¥ó¥Ô¥å¡¼¥Æ¥£¥ó¥°¥·¥¹¥Æ¥à, vol. 1, no. 2, pp. 12--21, August 2008.
- [86]
Nobuyuki Iwanaga, Tomoya Matsumura, Akihiro Yoshida, Wataru Kobayashi, and Takao Onoye, ``Embedded System Implementation of Sound Localization in Proximal Region,'' IEICE Trans. Fundamentals, vol. E91-A, no. 3, pp. 763-771, March 2008.
- [87]
Y. Ogasahara, M. Hashimoto, and T. Onoye, ``Measurement and Analysis of Inductive Coupling Noise in 90nm Global Interconnects,'' IEEE Journal of Solid-State Circuits, vol. 43, no. 3, pp. 718-728, March 2008.
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K. Watanabe, M. Ise, T. Onoye, H. Niwamoto, and I. Keshi, ``An Energy-Efficient Architecture of Wireless Home Network Based on Mac Broadcast and Transmission Power Control,'' In IEEE Trans. Consumer Electronics, vol. 53, no. 1, pp. 124--130, February 2007.
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M. Hashimoto and H. Onodera, ``Crosstalk Noise Optimization by Post-Layout Transistor Sizing,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E87-A, no. 12, pp. 3251-3257, December 2004.
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A. Kotani, N. Koyama, Y. Mitsuyama, T. Onoye, ``Center of Gravity and Readability on "LCFONT" for Low Resolution Display,'' The Journal of the Institute of Image Electronics of Japan, vol. 32, no. 5, pp. 621--628, September 2003.
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T. Okamoto, T. Yuasa, T. Izumi, T. Onoye, and Y. Nakamura, ``Design Tools and Trial Design for Pca-Chip2,'' In IEICE Trans. Information and Systems,, vol. E86-D, no. 5, pp. 868--871, May 2003.
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K. Nakagawa, M. Kawakita, K. Sato, M. Minakuchi, T. Onoye, T. Chiba, and I. Shirakawa, ``Object Sharing Scheme for Heterogeneous Environment,'' in IEICE Transaction on Fundamentals of Electronics, Communications and Computer Sciences, vol. E86-A, no. 4, pp. 813--821, April 2003.
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Y. Ohtani, N. Kawahara, H. Nakaoka, T. Tomaru K. Maruyama, T. Chiba, T. Onoye, and I. Shirakawa, ``Wireless Digital Video Transmission System Using IEEE802.11b PHY with Error Correction Block Based ARQ Protocol,'' IEICE (Institute of Electronics, Information and Communication Engineers) Transaction on Communications, vol. E85-B, no. 10, pp. 2032--2043, October 2002.
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T. Watanabe and N. Ishiura, ``Resister Constraint Analysis to Minimize Spill Code for Application Specific DSPs,'' IEICE Trans. Fundamentals of Electronics Communications and Computer Sciences, vol. E84-A, no. 6, pp. 1541--1544, June 2001.
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K. Kawamoto, K. Kohno, Y. Higuchi, S. Fujino, and I. Shirakawa, ``A 25kV ESD Proof LDMOSFET with a Turn-On Discharge MOSFET,'' IEICE Trans. Electron, vol. E84-C, no. 6, pp. 823--831, June 2001.
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K. Kawamoto, S. Mizuno, H. Abe, Y. Higuchi, H. Ishihara, H. Fukumoto, T. Watanabe, S. Fujino, and I. Shirakawa, ``A Single Chip Automotive Control LSI Using SOI Bipolar Complimentary MOS Double-Diffused MOS,'' The Japan Society of Applied Physics, vol. 40, no. 4B, pp. 2891--2896, April 2001.
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K. Kawamoto, H. Yamaguchi, H. Himi, S. Fujino, and I. Shirakawa, ``A 200 V CMOS SOI IC with Field-Plate Trench Isolation for EL Displays,'' IEICE Trans. Electron, vol. E84-C, no. 2, pp. 260--266, February 2001.
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A. Nagao, I. Shirakawa, and T. Kambe, ``A Layout Approach to Monolithic Microwave IC,'' IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 17, no. 12, pp. 1262--1272, December 1998.
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Y. Shigehiro, T. Nagata, I. Shirakawa, I. Arungsrisangchai, and H. Takahashi, ``Automatic Layout Recycling Based on Layout Description and Linear Programming,'' in Proc. IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 15, no. 8, pp. 959-967, August 1996.
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T. Onoye, G. Fujita, M. Takatsu, I. Shirakawa, and N. Yamai, ``Single Chip Implementation of Motion Estimator Dedicated to MPEG2 MP@{hl},'' in Proc. IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, vol. E79-A, no. 8, pp. 1210-1216, August 1996.
- International Conference
- [1]
Qiaochu Zhao, Ittetsu Taniguchi, Makoto Nakamura, and Takao Onoye, ``{An Efficient Parts Counting Method Based on Intensity Distribution Analysis for Industrial Vision Systems},'' In The 21st Workshop on Synthesis And System Integration of Mixed Information techologies, March 2018. (Kunibiki Messe, Matsue, Japan)
- [2]
S. Negoro, K. Maekawa, D. Sukezane, A. Shibata, I. Taniguchi, and H. Tomiyama, ``Measurement and Modeling of Quadcopter Energy with Ros,'' In Proc. The 21st Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2018), pp. 169--173, March 2018. (Matsue, Japan)
- [3]
R. Shirai, Y. Itoh, T. Fukamachi, M. Yamashita, and T. Onoye, ``Optrod: Operating Multiple Various Actuators Simultaneously by Projected Images,'' In SIGGRAPH Asia 2017 Emerging Technologies, no. 11, pp. 1-2, November 2017.
- [4]
K. Maekawa, S. Negoro, I. Taniguchi, and H. Tomiyama, ``Power Measurement and Modeling of Quadcopters on Horizontal Flight,'' In International Workshop on Computer Systems and Architectures (CSA) in conjunction with International Symposium on Computing and Networking (CANDAR), p. xxx--xxx (4 pages), November 2017. (Aomori, Japan)
- [5]
R. Shirai, T. Hirose, and M. Hashimoto, ``{Dedicated Antenna Less Power Efficient Ook Transmitter for Mm-Cubic Iot Nodes},'' Proceedings of the 47th European Microwave Conference (EuMC), pp. 101--104, October 2017.
- [6]
M. Hashimoto, R. Shirai, Y. Itoh, and T. Hirose, ``Toward Real-Time 3d Modeling System with Cubic-Millimeters Wireless Sensor Nodes (Invited),'' Proceedings of IEEE International Conference on ASIC, pp. 1087--1091, October 2017.
- [7]
T. Yamamoto, H. Tomiyama, I. Taniguchi, S. Yamashita, and Y. Hara-Azumi, ``Systematic Design of Approximate Array Multipliers with Different Accuracy,'' In International Workshop on Highly Efficient Neural Networks Design (HENND) in conjunction with ESWEEK, p. xxx--xxx (4 pages), October 2017. (Seoul, Korea)
- [8]
Yusuke Sakumoto and Ittetsu Taniguchi, ``Evaluation of MCMC-Based Autonomous Decentralized Mechanism of Energy Interchange in Practical Scenario with Generation Fluctuation,'' In 22nd IEEE International Conference on Emerging Technologies & Factory Automation (ETFA2017), p. xxx--xxx (5 pages), September 2017. (Limassol, Cyprus)
- [9]
R. Shirai, J. Kono, T. Hirose, and M. Hashimoto, ``Near-Field Dual-Use Antenna for Magnetic-Field Based Communication and Electrical-Field Based Distance Sensing in Mm^3-Class Sensor Node,'' Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS), pp. 124--127, May 2017.
- [10]
Kazuki Hirosue, Shohei Ukawa, Yuichi Itoh, Takao Onoye, and Masanori Hashimoto, ``Gpgpu-Based Highly Parallelized 3d Node Localization for Real-Time 3d Model Reproduction,'' In Proceedings of the 22nd International Conference on Intelligent User Interfaces 2017 (IUI '17), pp. 173-178, March 2017.
- [11]
Yuki Tsujimoto, Yuichi Itoh, and Takao Onoye, ``Ketsuro-Graffiti: an Interactive Dislplay with Water Condensation,'' In Proceedings of ACM International Conference on Interactive Surfaces and Spaces 2016 (ISS 2016), pp. 49-55, November 2016.
- [12]
Y. Masuda, M. Hashimoto, and T. Onoye, ``Measurement of Timing Error Detection Performance of Software-Based Error Detection Mechanisms and Its Correlation with Simulation,'' In ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), pp. 28-35, March 2016.
- [13]
R. Doi, J. Hotate, T. Kishimoto, T. Higashi, H. Ochi, M. Tada, T. Sugibayashi, K. Wakabayashi, H. Onodera, Y. Mitsuyama, and M. Hashimoto, ``Highly-Dense Mixed Grained Reconfigurable Architecture with Via-Switch,'' ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), March 2016.
- [14]
U. Schlichtmann, M. Hashimoto, I. H.-R. Jiang, and B. Li, ``Reliability, Adaptability and Flexibility in Timing: Buy a Life Insurance for Your Circuits (Invited),'' Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 705--711, January 2016.
- [15]
N. Banno, M.Tada, K. Okamoto, N. Iguchi, T. Sakamoto, M. Miyamura, Y. Tsuji, H. Hada, H. Ochi, H. Onodera, M. Hashimoto, and T. Sugibayashi Author(s) in English , ``A Novel Two-Varistors (A-Si/Sin/A-Si) Selected Complementary Atom Switch (2v-1cas) for Nonvolatile Crossbar Switch with Multiple Fan-Outs,'' Technical Digest of IEEE International Electron Devices Meeting (IEDM), pp. 32--35, December 2015.
- [16]
Y. Masuda, M. Hashimoto, and T. Onoye, ``Performance Evaluation of Software-Based Error Detection Mechanisms for Localizing Electrical Timing Failures under Dynamic Supply Noise,'' In Proceedings of International Conference on Computer-Aided Design (ICCAD), pp. 315-322, November 2015.
- [17]
R. Doi, M. Hashimoto, and T. Onoye, ``An Analytic Evaluation on Soft Error Immunity Enhancement Due to Temporal Triplication,'' IEEE Pacific Rim International Symposium on Dependable Computing (PRDC), November 2015.
- [18]
E. Aliwarga, J. Yu, M. Hatanaka, and T. Onoye, ``Design of Generic Hardware for Soft Cascade-Based Linear Svm Classification,'' In International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), pp. 257-262, November 2015.
- [19]
S. Iizuka, Y. Masuda, M. Hashimoto, and T. Onoye, ``Stochastic Timing Error Rate Estimation under Process and Temporal Variations,'' In Proceedings of International Test Conference (ITC), October 2015.
- [20]
Y. Akihara, T. Hirose, Y. Tanaka, N. Kuroki, M. Numa, and M. Hashimoto, ``A Wireless Power Transfer System for Small-Sized Sensor Applications,'' Proceedings of International Conference on Solid State Devices and Materials (SSDM), pp. 154--155, September 2015.
- [21]
S. Hirokawa, R. Harada, M. Hashimoto, K. Sakuta, and Y. Watanabe, ``Neutron-Induced Seu and Mcu Rate Characterization and Analysis of Sotb and Bulk Srams at 0.3v Operation,'' IEEE Nuclear and Space Radiation Effects Conference (NSREC), July 2015.
- [22]
M. Ueno, M. Hashimoto, and T. Onoye, ``Real-Time On-Chip Supply Voltage Sensor and Its Application to Trace-Based Timing Error Localization,'' Proceedings of International On-Line Testing Symposium (IOLTS), pp. 188--193, July 2015.
- [23]
M. Hashimoto, ``Run-Time Performance Adaptation: Opportunities and Challenges (Invited),'' Proceedings of IEEE Conference on Electron Devices and Solid-State Circuits (EDSSC), June 2015.
- [24]
T. Uemura, T. Kato, S. Okano, H. Matsuyama, and M. Hashimoto, ``Impact of Package on Neutron Induced Single Event Upset in 20 Nm Sram,'' Proceedings of International Symposium on Reliability Physics (IRPS), April 2015.
- [25]
T. Uemura and M. Hashimoto, ``Investigation of Single Event Upset and Total Ionizing Dose in Feram for Medical Electronic Tag,'' Proceedings of International Symposium on Reliability Physics (IRPS), April 2015.
- [26]
T. Uemura, S. Okano, T. Kato, H. Matsuyama, and M. Hashimoto, ``Soft Error Immune Latch Design for 20 Nm Bulk Cmos,'' Proceedings of International Reliability Physics Symposium (IRPS), April 2015.
- [27]
S. Ukawa, T. Shinada, M. Hashimoto, Y. Itoh, and T. Onoye, ``3d Node Localization from Node-To-Node Distance Information Using Cross-Entropy Method,'' Proceedings of Virtual Reality Conference (VR), March 2015.
- [28]
S. Iizuka, Y. Higuchi, M. Hashimoto, and T. Onoye, ``Area Efficient Device-Parameter Estimation Using Sensitivity-Configurable Ring Oscillator,'' Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 731--736, January 2015.
- [29]
M. Hashimoto, D. Alnajjar, H. Konoura, Y. Mitsuyama, H. Shimada, K. Kobayashi, H. Kanbara, H. Ochi, T. Imagawa, K. Wakabayashi, T. Onoye, and H. Onodera, ``Reliability-Configurable Mixed-Grained Reconfigurable Array Compatible with High-Level Synthesis,'' Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 14--15, January 2015.
- [30]
T. Amaki, M. Hashimoto, and T. Onoye, ``An Oscillator-Based True Random Number Generator with Process and Temperature Tolerance,'' Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 4--5, January 2015.
- [31]
Yuki Tsujimoto, Yuichi Itoh, and Takao Onoye, ``Ketsuro-Graffiti: a Canvas with Computer Generated Water Condensation,'' In SIGGRAPH Asia 2015 Emerging Technologies, pp. 15:1--15:2, 2015.
- [32]
M. Hashimoto, ``Stochastic Verification of Run-Time Performance Adaptation with Field Delay Testing (Invited),'' Proceedings of Asia Pacific Conference on Circuits and Systems (APCCAS), pp. 751--754, November 2014.
- [33]
M. Hashimoto, ``Opportunities and Verification Challenges of Run-Time Performance Adaptation (Invited),'' Proceedings of Asian Test Symposium (ATS), pp. 248--253, November 2014.
- [34]
Yohei Miyazaki, Yuichi Itoh, Yuki Tsujimoto, Masahiro Ando, and Takao Onoye, ``Ketsuro-Graffiti: Water Condensation Display,'' In ACE '14 Proceedings of the 11th Conference on Advances in Computer Entertainment Technology, November 2014.
- [35]
Kosuke Tomita, Masahide Hatanaka, and Takao Onoye, ``An Approach to GPU Implementation of OFDM Transceiver Using Dynamic Spectrum Access,'' In 2014 International Workshop on Smart Info-Media Systems in Asia, SISA 2014, October 2014.
- [36]
M. Hashimoto, ``Toward Robust Subthreshold Circuit Design: Variability and Soft Error Perspective (Invited),'' Proceedings of SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), October 2014.
- [37]
A. Iokibe, M. Hashimoto, and T. Onoye, ``Feasibility Evaluation on an Instant Invader Detection System with Ultrasonic Sensors Scattered on the Ground,'' Proceedings of International Conference on Sensing Technology (ICST), pp. 188--193, September 2014.
- [38]
T. Uemura, T. Kato, R. Tanabe, H. Iwata, J. Ariyoshi, H. Matsuyama, and M. Hashimoto, ``Optimizing Well-Configuration for Minimizing Single Event Latchup,'' IEEE Nuclear and Space Radiation Effects Conference (NSREC), July 2014.
- [39]
R. Harada, S. Hirokawa, and M. Hashimoto, ``Measurement of Alpha- and Neutron-Induced Seu and Mcu on Sotb and Bulk 0.4 V Srams,'' IEEE Nuclear and Space Radiation Effects Conference (NSREC), July 2014.
- [40]
T. Uemura, T. Kato, R. Tanabe, H. Iwata, H. Matsuyama, M. Hashimoto, K. Takahisa, M. Fukuda, and K. Hatanaka, ``Preventing Single Event Latchup with Deep P-Well on P-Substrate,'' Proceedings of International Reliability Physics Symposium (IRPS), June 2014.
- [41]
M. Ueno, M. Hashimoto, and T. Onoye, ``Trace-Based Fault Localization with Supply Voltage Sensor,'' ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), March 2014.
- [42]
C.Siriteanu, A.Takemura, S.D. Blostein, S.Kuriki, and H.Shin, ``Convergence Analysis of Performance-Measure Expressions for Mimo Zf under Rician Fading,'' Australian Communications Theory Workshop, AUSCTW'14, Sydney, Australia, pp. 114-119 , February 2014.
- [43]
Masahiro Ando, Yuichi Itoh, Toshiki Hosoi, Kazuki Takashima, Kosuke Nakajima, and Yoshifumi Kitamura, ``Stackblock: Block-Shaped Interface for Flexible Stacking,'' In Proc. of UIST, pp. 41-42, 2014.
- [44]
Hiroaki Konoura, Dawood Alnajjar, Yukio Mitsuyama, Hiroyuki Ochi, Takashi Imagawa, Shinichi Noda, Kazutoshi Wakabayashi, Masanori Hashimoto, and Takao Onoye, ``Mixed-Grained Reconfigurable Architecture Supporting Flexible Reliability and C-Based Design,'' In ReConFig, December 2013.
- [45]
D. Alnajjar, H. Konoura, Y. Mitsuyama, H. Shimada, K. Kobayashi, H. Kanbara, H. Ochi, T. Imagawa, S. Noda, K. Wakabayashi, M. Hashimoto, T. Onoye, and H. Onodera, ``Reliability-Configurable Mixed-Grained Reconfigurable Array Supporting C-To-Array Mapping and Its Radiation Testing,'' In Proceedings of IEEE Asian Solid-State Circuits Conference (A-SSCC), pp. 313-316, November 2013.
- [46]
T. Amaki, M. Hashimoto, and T. Onoye, ``A Process and Temperature Tolerant Oscillator-Based True Random Number Generator with Dynamic 0/1 Bias Correction,'' In Proceedings of Asian Solid-State Circuits Conference (A-SSCC), pp. 133-136, November 2013.
- [47]
S. Iizuka, M. Mizuno, D. Kuroda, M. Hashimoto, and T. Onoye, ``Stochastic Error Rate Estimation for Adaptive Speed Control with Field Delay Testing,'' In Proc. International Conference on Computer-Aided Design (ICCAD), pp. 107-114, November 2013. (San Jose)
- [48]
Kosuke Nakajima, Yuichi Itoh, Yusuke Hayashi, Kazuaki Ikeda, Kazuyuki Fujita, and Takao Onoye, ``Emoballoon: a Balloon-Shaped Interface Recognizing Social Touch Interactions,'' In Proceedings of 10th International Conference on Advances in Computer Entertainment Technology, pp. 182-197, November 2013.
- [49]
J. Kono, M. Hashimoto, and T. Onoye, ``Feasibility Evaluation of Near-Field Communication in Clay with 1-Mm^3 Antenna,'' Proceedings of Asia-Pacific Microwave Conference (APMC), pp. 1121--1123, November 2013.
- [50]
R. Harada, M. Hashimoto, and T. Onoye, ``Nbti Characterization Using Pulse-Width Modulation,'' IEEE/ACM Workshop on Variability Modeling and Characterization, November 2013.
- [51]
Simon Voelker, Kosuke Nakajima, Christian Thoresen, Yuichi Itoh, Kjell Ivar Øvergård, and Jan Borchers, ``Pucs: Detecting Transparent, Passive Untouched Capacitive Widgets on UnmodifiEd Multi-Touch Displays,'' In Adjunct Publication of the 26th Annual ACM Symposium on User Interface Software and Technology, pp. 1-2, October 2013.
- [52]
Simon Voelker, Kosuke Nakajima, Christian Thoresen, Yuichi Itoh, Kjell Ivar Øvergård, and Jan Borchers, ``Pucs Demo: Detecting Transparent, Passive Untouched Capacitive Widgets,'' In Proceedings of the 2013 ACM International Conference on Interactive Tabletops and Surfaces, pp. 325-328, October 2013.
- [53]
Simon Voelker, Kosuke Nakajima, Christian Thoresen, Yuichi Itoh, Kjell Ivar Øvergård, and Jan Borchers, ``Pucs: Detecting Transparent, Passive Untouched Capacitive Widgets on UnmodifiEd Multi-Touch Displays,'' In Proceedings of the 2013 ACM International Conference on Interactive Tabletops and Surfaces, pp. 101-104, October 2013.
- [54]
M. Hashimoto, ``Soft Error Immunity of Subthreshold Sram (Invited),'' Proceedings of IEEE International Conference on ASIC, pp. 91--94, October 2013.
- [55]
Y.Fukuhara, A.Yamada, and T.Onoye, ``An Image Compression Method for Frame Memory Size Reduction Using Local Feature of Images,'' In The 18th Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2013), pp. 288-289, October 2013.
- [56]
Yohei Kojima, Kazuma Aoyama, Yuichi Itoh, Kazuyuki Fujita, Taku Fujimoto, and Kosuke Nakajima, ``Polka Dot: the Garden of Water Spirits,'' In ACM SIGGRAPH 2013 Posters, July 2013. (Article No. 47)
- [57]
T. Uemura, T. Kato, H. Matsuyama, and M. Hashimoto, ``Scaling Trend of Sram and Ff of Soft-Error Rate and Their Contribution to Processor Reliability on Bulk Cmos Technology,'' IEEE Nuclear and Space Radiation Effects Conference (NSREC), July 2013.
- [58]
T. Uemura, T. Kato, H. Matsuyama, and M. Hashimoto, ``Soft-Error in Sram at Ultra Low Voltage and Impact of Secondary Proton in Terrestrial Environment,'' IEEE Nuclear and Space Radiation Effects Conference (NSREC), July 2013.
- [59]
T. Uemura, T. Kato, H. Matsuyama, and M. Hashimoto, ``Mitigating Multi-Cell-Upset with Well-Slits in 28nm Multi-Bit-Latch,'' IEEE Nuclear and Space Radiation Effects Conference (NSREC), July 2013.
- [60]
T. Shinada, M. Hashimoto, and T. Onoye, ``Proximity Distance Estimation Based on Capacitive Coupling between 1mm^3 Sensor Nodes,'' Proceedings of International NEWCAS Conference, June 2013.
- [61]
M. Ueno, M. Hashimoto, and T. Onoye, ``Real-Time Supply Voltage Sensor for Detecting/Debugging Electrical Timing Failures,'' Proceedings of Reconfigurable Architectures Workshop (RAW), pp. 301--305, May 2013.
- [62]
Y. Higuchi, K. Shinkai, M. Hashimoto, R. Rao, and S. Nassif, ``Extracting Device-Parameter Variations Using a Single Sensitivity-Configurable Ring Oscillator,'' Proceedings of IEEE European Test Symposium (ETS), pp. 106--111, May 2013.
- [63]
Kazuyuki Fujita, Yuichi Itoh, Kazuki Takashima, Kosuke Nakajima, Yusuke Hayashi, and Fumio Kishino, ``Ambient Party Room: a Room-Shaped System Enhancing Communication for Parties Or Gatherings,'' In Proceedings of the 2nd International Workshop on Ambient Information Technologies, pp. 1-4, March 2013.
- [64]
Kosuke Nakajima, Yuichi Itoh, Yusuke Hayashi, Kazuaki Ikeda, Kazuyuki Fujita, and Takao Onoye, ``Emoballoon: a Balloon-Shaped Interface Recognizing Social Touch Interactions,'' In Proceedings of the 2nd International Workshop on Ambient Information Technologies, pp. 13-16, March 2013.
- [65]
M. Hashimoto, ``Robust Subthreshold Circuit Design to Manufacturing and Environmental Variability (Invited),'' China Semiconductor Technology International Conference (CSTIC), pp. 1079--1084, March 2013.
- [66]
Jin Kono, Masanori Hashimoto, Takao Onoye, ``Feasibility Evaluation of Near-Field Communication in Clay with 1-Mm3 Antenna,'' Microwave Conference Proceedings (APMC), 2013 Asia-Pacific, pp. 1121-1123, 2013.
- [67]
Yohei Kojima, Yuichi Itoh, Taku Fujimoto, and Kosuke Nakajima, ``Polka Dot – the Garden of Water Spirits,'' In SIGGRAPH Asia 2013 Emerging Technologies, p. 15, 2013.
- [68]
D. Alnajjar, Y. Mitsuyama, M. Hashimoto, and T. Onoye, ``Static Voltage Over-Scaling and Dynamic Voltage Variation Tolerance with Replica Circuits and Time Redundancy in Reconfigurable Devices,'' Proceedings of International Conference on ReConFigurable Computing and FPGAs (ReConFig), December 2012.
- [69]
Yuya Iwasaki, Masahide Hatanaka, and Takao Onoye, ``Performance Improvement of Channel Estimation for Ofdm Baseband Transceiver with Dynamic Subcarrier Selection,'' In The First Asian Conference on Information Systems,ACIS 2012, December 2012.
- [70]
Kazutaka Takeuchi, Ryusuke Miyamoto, and Takao Onoye, ``High-Speed Multiview Video Decoding for Embedded System,'' In The First Asian Conference on Information Systems, ACIS 2012, December 2012.
- [71]
I. Homjakovs, M. Hashimoto, T. Hirose, and T. Onoye, ``Signal-Dependent Analog-To-Digital Converter Based on Minimax Sampling,'' Proceedings of International SoC Design Conference (ISOCC), p. 120 -- 123 , November 2012.
- [72]
Kazuki Takashima, Yusuke Hayashi, Kosuke Nakajima, and Yuichi Itoh, ``Cup-Embedded Information Device for Supporting Interpersonal Communication,'' In Proceedings of Joint Virtual Reality Conference of ICAT, EGVE and EuroVR, pp. 19-20, October 2012.
- [73]
R. Harada, Y. Mitsuyama, M. Hashimoto, and T. Onoye, ``Impact of Nbti-Induced Pulse-Width Modulation on Set Pulse-Width Measurement,'' Proceedings of European Conference on Radiation and Its Effects on Components and Systems (RADECS), September 2012.
- [74]
T. Kameda, H. Konoura, D. Alnajjar, Y. Mitsuyama, M. Hashimoto, and T. Onoye, ``A Predictive Delay Fault Avoidance Scheme for Coarse-Grained Reconfigurable Architecture,'' Proceedings of International Conference on Field Programmable Logic and Applications (FPL) , August 2012.
- [75]
Ryusuke Endo, Yuichi Itoh, Kosuke Nakajima, Kazuyuki Fujita, and Fumio Kishino, ``Planning-Capable Digital Signage System Using Multi-Touch Display,'' In Proceedings of The 10th Asia Pacific Conference on Computer Human Interaction (APCHI2012), vol. 2, pp. 545-554, August 2012.
- [76]
Kosuke Nakajima, Yuichi Itoh, Yusuke Hayashi, Kazuaki Ikeda, Kazuyuki Fujita, and Takao Onoye, ``Emoballoon,'' In Proceedings of The 10th Asia Pacific Conference on Computer Human Interaction (APCHI2012), vol. 2, pp. 681-682, August 2012.
- [77]
R. Harada, S. Abe, H. Fuketa, T. Uemura, M. Hashimoto, and Y. Watanabe, ``Angular Dependency of Neutron Induced Multiple Cell Upsets in 65-Nm 10t Subthreshold Sram,'' IEEE Nuclear and Space Radiation Effects Conference, July 2012.
- [78]
R. Harada, Y. Mitsuyama, M. Hashimoto, and T. Onoye, ``Set Pulse-Width Measurement Eliminating Pulse-Width Modulation and Within-Die Process Variation Effects,'' Proceedings of International Reliability Physics Symposium (IRPS), April 2012.
- [79]
K. Kiyokawa, M. Hatanaka, K. Hosoda, M. Okada, H. Shigeta, Y. Ishihara, F. Ooshita, H. Kakugawa, S. Kurihara, and K. Moriyama, ``Owens Luis - a Context-Aware Multi-Modal Smart Office Chair in an Ambient Environment,'' In The 1st International Workshop on Ambient Information Technologies (AMBIT-2012), Orange County, CA, USA, March 2012.
- [80]
H. Shigeta, J. Nakase, Y. Tsunematsu, K. Kiyokawa, M. Hatanaka, K. Hosoda, M. Okada, Y. Ishihara, F. Ooshita, H. Kakugawa, S. Kurihara, and K. Moriyama, ``Implementation of a Smart Office System in an Ambient Environment,'' In The 1st International Workshop on Ambient Information Technologies (AMBIT-2012), Orange County, CA, USA, March 2012.
- [81]
K. Watanabe, G. Fujita, T. Homemoto, and R. Hashimoto, ``A High-Speed H.264/AVC CABAC Decoder for 4K Video Utilizing Residual Data Accelerator,'' The 17th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2012), pp. 6-10, March 2012.
- [82]
Kosuke Nakajima, Yuichi Itoh, Takayuki Tsukitani, Kazuyuki Fujita, Kazuki Takashima, Yoshifumi Kitamura, and Fumio Kishino, ``Fusa2 Touch Display: Furry and Scalable Multi-Touch Display,'' In Proceedings of The 1st International Workshop on Ambient Information Technologies, pp. 35-36, March 2012.
- [83]
Yusuke Hayashi, Yuichi Itoh, Kazuki Takashima, Kazuyuki Fujita, Kosuke Nakajima, Ikuo Daibo, and Takao Onoye, ``Cup-Le: a Cup-Shaped Device for Conversational Experiment,'' In Proceedings of the 1st International Workshop on Ambient Information Technologies, pp. 36-37, March 2012.
- [84]
Kazuyuki Fujita, Yuichi Itoh, Hiroyuki Ohsaki, Naoaki Ono, Keiichiro Kagawa, Kazuki Takashima, Sho Tsugawa, and Kosuke Nakajima, ``Ambient Suite: Room- Shaped Information Environment for Interpersonal Communication,'' In Proceedings of the 1st International Workshop on Ambient Information Technologies, pp. 18-21, March 2012.
- [85]
S. Kimura, M. Hashimoto, and T. Onoye, ``Body Bias Clustering for Low Test-Cost Post-Silicon Tuning,'' In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 283--289, February 2012.
- [86]
Takashi Nakamae, Akihisa Yamada, Masayuki Yamaguchi, and Takao Onoye, ``A Near-Lossless Image Compression Method Using Adaptive Variable Length Coding,'' In International Conference on Embedded Systems and Intelligent Technology, January 2012.
- [87]
K. Kiyokawa, M. Hatanaka, K. Hosoda, M. Okada, H. Shigeta, Y. Ishihara, F. Ooshita, H. Kakugawa, S. Kurihara, and K. Moriyama, ``Owens Luis - a Proposal of a Smart Office Chair in an Ambient Environment,'' In The 21st International Conference on Artificial Reality and Telexistence (ICAT 2011), Osaka, Japan, November 2011.
- [88]
Kazuyuki Fujita, Yuichi Itoh, Hiroyuki Ohsaki, Naoaki Ono, Keiichiro Kagawa, Kazuki Takashima, Sho Tsugawa, Kosuke Nakajima, Yusuke Hayashi, and Fumio Kishino, ``Ambient Suite: Enhancing Communication among Multiple Participants,'' In Proceedings of the International Conference on Advances in Computer Entertainment Technology , pp. 25:1-25:8, November 2011.
- [89]
Kosuke Nakajima, Yuichi Itoh, Takayuki Tsukitani, Kazuyuki Fujita, Kazuki Takashima, Yoshifumi Kitamura, and Fumio Kishino, ``Fusa2 Touch Display: Furry and Scalable Multi-Touch Display,'' In Proceedings of ACM International Conference on Interactive Tabletops and Surfaces 2011, pp. 35-44, November 2011.
- [90]
Kosuke Nakajima, Yuichi Itoh, Takayuki Tsukitani, Kazuyuki Fujita, Kazuki Takashima, Yoshifumi Kitamura, and Fumio Kishino, ``Fusa2 Touch Display,'' In Proceedings of ACM International Conference on Interactive Tabletops and Surfaces 2011, November 2011.
- [91]
H. Konoura, Y. Mitsuyama, M. Hashimoto, and T. Onoye, ``Implications of Reliability Enhancement Achieved by Fault Avoidance on Dynamically Reconfigurable Architectures,'' In Proc. 21st International Conference on Field Programmable Logic and Applications (FPL2011), Chania, Crete, Greece, pp. 189-194, September 2011.
- [92]
Toshihiro Kameda, Hiroaki Konoura, Yukio Mitsuyama, Masanori Hashimoto, and Takao Onoye, ``Nbti Mitigation by Giving Random Scan-In Vectors during Standby Mode,'' In PATMOS2011, September 2011.
- [93]
Y. Takai, M. Hashimoto, and T. Onoye, ``Power Gating Implementation for Noise Mitigation with Body-Tied Triple-Well Structure,'' In Proceedings of IEEE Custom Integrated Circuits Conference (CICC), September 2011.
- [94]
M. Okada, T. Onoye, and W. Kobayashi, ``A Ray Tracing Simulation of Sound Diffraction Based on Analytic Secondary Source Model,'' In 19th European Signal Processing Conference (EUSIPCO-2011), Barcelona, Spain, pp. 1653-1657, August 2011.
- [95]
M. Hashimoto and H. Fuketa, ``Adaptive Performance Compensation with On-Chip Variation Monitoring (Invited),'' In Proceedings of International Midwest Symposium on Circuits and Systems (MWSCAS), August 2011.
- [96]
I. Homjakovs, M. Hashimoto, T. Hirose, and T. Onoye, ``Signal-Dependent Analog-To-Digital Conversion Based on Minimax Sampling,'' In Proceedings of International Midwest Symposium on Circuits and Systems (MWSCAS), August 2011.
- [97]
T. Amaki, M. Hashimoto, and T. Onoye, ``An Oscillator-Based True Random Number Generator with Jitter Amplifier,'' In Proc. IEEE International Symposium on Circuits and Systems (ISCAS 2011), pp. 725-728, May 2011.
- [98]
R. Harada, Y. Mitsuyama, M. Hashimoto, and T. Onoye, ``Neutron Induced Single Event Multiple Transients with Voltage Scaling and Body Biasing,'' In Proc. International Reliability Physics Symposium (IRPS), April 2011.
- [99]
S. Kimura, M. Hashimoto, and T. Onoye, ``Body Bias Clustering for Low Test-Cost Post-Silicon Tuning,'' In ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), pp. 46--51, April 2011.
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K. Shinkai, M. Hashimoto, and T. Onoye, ``Extracting Device-Parameter Variations with Ro-Based Sensors,'' In ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), pp. 13--18, March 2011.
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D. Alnajjar, H. Kounoura, Y. Mitsuyama, M. Hashimoto, and T. Onoye, ``Mttf Measurement under Alpha Particle Radiation in a Coarse-Grained Reconfigurable Architecture with Flexible Reliability,'' In IEEE Workshop on Silicon Errors in Logic - System Effects, March 2011.
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Tatsuo Maeno, Hiroshi Tsutsui, and Takao Onoye, ``Hardware Implementation of Real-Time Motion Adaptive Deinterlacing Based on Inpainting,'' In International Conference on Embedded Systems and Intelligent Technology, February 2011.
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T. Amaki, M. Hashimoto, Y. Mitsuyama, and T. Onoye, ``A Design Procedure for Oscillator-Based Hardware Random Number Generator with Stochastic Behavior Modeling,'' In Proc. International Workshop on Information Security Applications (WISA 2010), pp. 107-121, January 2011.
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T. Amaki, M. Hashimoto, and T. Onoye, ``Jitter Amplifier for Oscillator-Based True Random Number Generator,'' In Proc. Asia and South Pacific Design Automation Conference (ASP-DAC 2011), pp. 81-82, January 2011.
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K. Shinkai and M. Hashimoto, ``Device-Parameter Estimation with On-Chip Variation Sensors Considering Random Variability,'' In Proceedings of IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 683-688, January 2011.
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M. Hashimoto, ``Run-Time Adaptive Performance Compensation Using On-Chip Sensors (Invited),'' In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 285--290, January 2011.
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M. Hatanaka, R. Hashimoto, T. Tatsuka, T. Onoye, H. Hatamoto, S. Ibi, S. Miyamoto, and S. Sampei, ``VLSI Design of OFDM Baseband Transceiver with Dynamic Spectrum Access,'' In Proc. of the 18th International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS2010), pp. 329-332, December 2010.
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Y. Takai, M. Hashimoto, and T. Onoye, ``Evaluation of Power Gating Structures Focusing on Power Supply Noise with Measurement and Simulation,'' In Proceedings of IEEE Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS), pp. 213--216, October 2010.
- [109]
Hideyuki Nakamura, Hiroshi Tsutsui, and Takao Onoye, ``Motion-Compensated Frame Interpolation Using Feature Tracking and Motion Segmentation,'' In International Workshop on Smart Info-Media Systems in Asia, September 2010.
- [110]
T. Okumura and M. Hashimoto, ``Setup Time, Hold Time and Clock-To-Q Delay Computation under Dynamic Supply Noise,'' In Proceedings of IEEE Custom Integrated Circuits Conference (CICC), September 2010.
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L. M. Handaya, M. Okada, T. Onoye, and W. Kobayashi, ``Improvement of Frontal Localization with Complement of Multiple Delayed Sounds,'' 2010 International Workshop on Information Communication Technology, August 2010.
- [112]
K. Shinkai and M. Hashimoto, ``Self-Heating in Nano-Scale Vlsi Interconnects,'' In Proceedings of International Workshop on Information Communication Technology (ICT), pp. S-1-6, August 2010.
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S. Abe, K. Shinkai, M. Hashimoto, and T. Onoye, ``Clock Skew Reduction by Self-Compensating Manufacturing Variability with On-Chip Sensors,'' In Proc. Great Lakes Symposium on VLSI (GLSVLSI), May 2010.
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H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, ``Alpha-Particle-Induced Soft Errors and Multiple Cell Upsets in 65-Nm 10t Subthreshold Sram,'' In Proceedings of International Reliability Physics Symposium (IRPS), pp. 213--217, May 2010.
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Y. Takai, Y. Ogasahara, M. Hashimoto, and T. Onoye, ``Measurement of On-Chip I/O Power Supply Noise and Correlation Verification between Noise Magnitude and Delay Increase Due to Sso,'' In Proceedings of IEEE Workshop on Signal Propagation on Interconnects (SPI), pp. 19--20, May 2010.
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D. Kuroda, H. Fuketa, M. Hashimoto, and T. Onoye, ``A 16-Bit Risc Processor with 4.18pj/Cycle at 0.5v Operation,'' In Proceedings of IEEE COOL Chips, p. 190, April 2010.
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Yuki Kawamura, Yasutake Manabe, Takao Onoye, Kazuto Ohara, Hiroyuki Okada, and Ikuo Keshi, ``Implementation of Simultaneous Video Decoding on Multicore Processor,'' In Proc. of International Symposium on Communications, Control and Signal Processing (ISCCSP 2010), March 2010.
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H. Konoura, Y. Mitsuyama, M. Hashimoto, and T. Onoye, ``Comparative Study on Delay Degrading Estimation Due to Nbti with Circuit/Instance/Transistor-Level Stress Probability Consideration,'' In Proc. International Symposium on Quality Electronic Design (ISQED), pp. 646-651, March 2010.
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R. Harada, Y. Mitsuyama, M. Hashimoto, and T. Onoye, ``Measurement Circuits for Acquiring SET Pulse Width Distribution with Sub-FO1-Inverter-Delay Resolution,'' In Proc. International Symposium on Quality Electronic Design (ISQED), March 2010.
- [120]
T. Enami, S. Ninomiya, K. Shinkai, S. Abe, and M. Hashimoto, ``Statistical Timing Analysis Considering Clock Jitter and Skew Due to Power Supply Noise and Process Variation,'' In Proc. International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), pp. 41-46, March 2010.
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S. Abe, K. Shinkai, M. Hashimoto, and T. Onoye, ``Clock Skew Reduction by Self-Compensating Manufacturing Variability with On-Chip Sensors,'' In Proc. International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), March 2010.
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H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, ``Adaptive Performance Control with Embedded Timing Error Predictive Sensors for Subthreshold Circuits,'' In Proc. Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 361-362, January 2010.
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T. Okumura, F. Minami, K. Shimazaki, K. Kuwada, and M. Hashimoto, ``Gate Delay Estimation in Sta under Dynamic Power Supply Noise,'' In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), p. 775 -- 780, January 2010.
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D. Alnajjar, Y. Ko, T. Imagawa, M. Hiromoto, Y. Mitsuyama, M. Hashimoto, H. Ochi, and T. Onoye, ``Soft Error Resilient Vlsi Architecture for Signal Processing,'' In Proceedings of IEEE International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), pp. 183--186, December 2009.
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Koichi Hattori, Hiroshi Tsutsui, Hiroyuki Ochi, and Yukihiro Nakamura, ``A High-Throughput Pipelined Architecture for JPEG XR Encoding,'' In Proc. of 7th IEEE Workshop on Embedded Systems for Real-Time Multimedia (ESTIMedia2009) , pp. 9-17, October 2009. (Best Paper Award)
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H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, ``Adaptive Performance Compensation with In-Situ Timing Error Prediction for Subthreshold Circuits,'' In Proc. IEEE Custom Integrated Circuits Conference, pp. 215-218, September 2009.
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R. Hashimoto, T. Tatsuka, M. Hatanaka, T. Onoye, H. Hatamoto, S. Ibi, S. Miyamoto, and S. Sampei, ``Implementation of Ofdm Baseband Transceiver with Dynamic Spectrum Access for Cognitive Radio Systems,'' In Proc. of 9th International Symposium on Communication and Information Technology (ISCIT2009), pp. 658-663, September 2009.
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S. Ninomiya and M. Hashimoto, ``Enhancement of Grid-Based Spatially-Correlated Variability Modeling for Improving Ssta Accuracy,'' In Proceedings of IEEE International SOC Conference (SOCC), pp. 337--340, September 2009.
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K. Hamamoto, M. Hashimoto, Y. Mitsuyama, and T. Onoye, ``Tuning-Friendly Body Bias Clustering for Compensating Random Variability in Subthreshold Circuits,'' In Proceedings of IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), pp. 51--56, August 2009.
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D. Alnajjar, Y. Ko, T. Imagawa, H. Konoura, M. Hiromoto, Y. Mitsuyama, M. Hashimoto, H. Ochi, and T. Onoye, ``Coarse-Grained Dynamically Reconfigurable Architecture with Flexible Reliability,'' In Proceedings of International Conference on Field Programmable Logic and Applications (FPL), pp. 186--192, August 2009.
- [131]
Masayuki Hiromoto, Hiroshi Tsutsui, Hiroyuki Ochi, Tomoyuki Osano, Norihiro Ishikawa, and Yukihiro Nakamura, ``Dynamic Rate Control for Media Streaming in High-Speed Mobile Networks,'' In Proc. of IEEE Wireless Communications and Networking Conference (WCNC 2009), April 2009.
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M. Okada, N. Iwanaga, T. Matsumura, T. Onoye, and W. Kobayashi, ``An Embedded Sound Localization System for Multiple Sources by Fuzzy Clustering with Spatial Constraints,'' In 2009 International Workshop on Nonlinear Circuits and Signal Processing (NCSP '09), Waikiki, Hawaii, pp. 257-260, March 2009.
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S. Watanabe, M. Hashimoto, and T. Sato, ``A Case for Exploiting Complex Arithmetic Circuits Towards Performance Yield Enhancement,'' In Proceedings of International Symposium on Quality Electronic Design (ISQED), pp. 401--407, March 2009.
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Y. Ko, D. Alnajjar, Y. Mitsuyama, M. Hashimoto, and T. Onoye, ``Coarse-Grained Dynamically Reconfigurable Architecture with Flexible Reliability,'' In Proceedings of Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI), pp. 236--241, March 2009.
- [135]
D. Alnajjar, Y. Ko, T. Imagawa, M. Hiromoto, Y. Mitsuyama, M. Hashimoto, H. Ochi, and T. Onoye, ``A Coarse-Grained Dynamically Reconfigurable Architecture Enabling Flexible Reliability,'' In Proceedings of IEEE Workshop on System Effects of Logic Soft Errors (SELSE), March 2009.
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K. Shinkai and M. Hashimoto, ``A Gate Delay Model Focusing on Current Fluctuation Over Wide-Range of Process and Environmental Variability,'' In Proc. International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), pp. 79-84, February 2009.
- [137]
H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, ``Trade-Off Analysis between Timing Error Rate and Power Dissipation for Adaptive Speed Control with Timing Error Prediction,'' In Proc. Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 266-271, January 2009.
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L. Zhang, Y. Zhang, A. Tsuchiya, M. Hashimoto, E. Kuh, and C-K Cheng, ``High Performance On-Chip Differential Signaling Using Passive Compensation for Global Communication,'' In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 385--390, January 2009.
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M. Okada, N. Iwanaga, T. Matsumura, T. Onoye, and W. Kobayashi, ``A 3D Sound Localization Method for Multiple Sound Sources Based on Fuzzy Clustering,'' In 2008 International Workshop on Smart Info-Media Systems in Bangkok (SISB 2008), pp. 133-138, December 2008.
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T. Enami, M. Hashimoto, and T. Sato, ``Decoupling Capacitance Allocation for Timing with Statistical Noise Model and Timing Analysis,'' In Proc. IEEE/ACM International Conference on Computer-Aided Design, pp. 420-425, November 2008.
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H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, ``Vth Variation Modeling and Its Validation with Ring Oscillation Frequencies for Body-Biased Circuits and Subthreshold Circuits,'' In ICCAD Colocated Workshop on Test Structure Design for Variability Characterization, November 2008.
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Koichi Hattori, Hiroshi Tsutsui, Hiroyuki Ochi, and Yukihiro Nakamura, ``An Architecture of Photo Core Transform in HD Photo Coding System for Embedded Systems of Various Bandwidths,'' In Proc. of 2008 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS2008), pp. 1592-1595, November 2008.
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Y. Ogasahara, M. Hashimoto, T. Kanamoto, and T. Onoye, ``Measurement of Supply Noise Suppression by Substrate and Deep N-Well in 90nm Process,'' In Proceedings of IEEE Asian Solid-State Circuits Conference (A-SSCC), pp. 397--400, November 2008.
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Y. Zhang, L. Zhang, A. Tsuchiya, M. Hashimoto, and C.-K. Cheng, ``On-Chip High Performance Signaling Using Passive Compensation,'' In Proceedings of IEEE International Conference on Computer Design (ICCD), pp. 182-187, October 2008.
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H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, ``Correlation Verification between Transistor Variability Model with Body Biasing and Ring Oscillation Frequency in 90nm Subthreshold Circuits,'' In Proc. IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), pp. 3-8, August 2008.
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S. Watanabe, M. Hashimoto, and T. Sato, ``Cascading Dependent Operations for Mitigating Timing Variability,'' In Proceedings. of Workshop on Quality-Aware Design (W-QUAD), June 2008.
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S. Takahashi, S. Tsukiyama, M. Hashimoto, and I. Shirakawa, ``A Design Method of Finding Optimal Sampling Pulse and Transistor Size in a Sampling Circuit for Liquid Crystal Displays,'' In In Proceedings of International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), June 2008.
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K. Hamamoto, H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, ``Experimental Study on Body-Biasing Layout Style - Negligible Area Overhead Enables Sufficient Speed Controllability -,'' In ACM Great Lakes Symposium on VLSI, pp. 387-390, May 2008.
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T. Enami, S. Ninomiya, and M. Hashimoto, ``Statistical Timing Analysis Considering Spatially and Temporally Correlated Dynamic Power Supply Noise,'' In Proc. ACM International Symposium on Physical Design, pp. 160-167, April 2008.
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S. Abe, M. Hashimoto, and T. Onoye, ``Clock Skew Evaluation Considering Manufacturing Variability in Mesh-Style Clock Distribution,'' In Proc. International Symposium on Quality Electronic Design (ISQED), pp. 520-525, March 2008.
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H. Okuhata, K. Takahashi, Y. Nozato, T. Onoye, and I. Shirakawa, ``Video Image Enhancement Scheme for High Resolution Consumer Devices,'' In Proc. of International Symposium on Communications, Control and Signal Processing (ISCCSP2008), pp. 639-644, March 2008.
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Y. Ogasahara, M. Hashimoto, and T. Onoye, ``Dynamic Supply Noise Measurement Circuit Composed of Standard Cells Suitable for In-Site Soc Power Integrity Verification,'' In Proc. IEEE/ACM Asia and South Pacific Design Automation Conference, pp. 107-108, January 2008.
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L. Zhang, J. Liu, H. Zhu, C-K Cheng, and M. Hashimoto, ``High Performance Current-Mode Differential Logic,'' In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 720--725, January 2008.
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R. Hashimoto, K. Kato, G. Fujta, and T. Onoye, ``VLSI Architecture of H.264 RDO-Based Block Size Decision for 1080 HD,'' In Proc. PCS, November 2007.
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R. Hashimoto, T. Matsumura, Y. Nozato, K. Watanabe, and T. Onoye, ``Implementation of Object Attention Based on Multi-Agent Attractor Selection,'' In Proc. SISB, November 2007.
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Yasutake Manabe, Junichi Hara, and Takao Onoye, ``Jpm-Based Differential Image Storage Scheme for Image Revision Management System,'' In IIEEJ Image Electronics and Visual Computing Workshop 2007, November 2007.
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K. Takahashi, Y. Nozato, H. Okuhata, and T. Onoye, ``VLSI Architecture for Real-Time Retinex Video Image Enhancement,'' In Proc. Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI 2007), pp. 81--86, October 2007.
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K.Hamamoto, H.Fuketa, M.Hashimoto, Y.Mitsuyama, and T.Onoye, ``A Study on Body-Biasing Layout Style Focusing on Area Efficiency and Speed Controllability,'' In Proc. Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI 2007), pp. 233-237, October 2007.
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Y. Ogasahara, M. Hashimoto, and T. Onoye, ``Dynamic Supply Noise Measurement with All Digital Gated Oscillator for Evaluating Decoupling Capacitance Effect,'' In Proc. IEEE Custom Integrated Circuits Conference, pp. 783-786, September 2007.
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T. Kanamoto, Y. Ogasahara, K. Natsume, K. Yamaguchi, H. Amishiro, T. Watanabe, and M. Hashimoto, ``Impact of Well Edge Proximity Effect on Timing,'' In Proc. IEEE European Solid-State Device Research Conference, pp. 115-118, September 2007.
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M. Hashimoto, J. Siriporn, A. Tsuchiya, H. Zhu, and C.-K. Cheng, ``Analytical Eye-Diagram Model for On-Chip Distortionless Transmission Lines and Its Application to Design Space Exploration,'' In Proc. IEEE Custom Integrated Circuits Conference, pp. 869-872, September 2007.
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Mohd Nadzrul Bin Mohd Nor, T. Matsumura, and T. Onoye, ``Direction of Arrival Estimation Improvement of Speech on a Two-Microphone Array,'' In IASTED International Conference on Signal and Image Processing, pp. 576-115, August 2007. (Honolulu, Hawaii, USA)
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K. Shinkai, M. Hashimoto, and T. Onoye, ``Future Prediction of Self-Heating in Short Intra-Block Wires,'' In Proc. International Symposium on Quality Electronic Design (ISQED), pp. 660-665, March 2007.
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K. Watanabe, M. Ise, T. Onoye, H. Niwamoto, and I. Keshi, ``An Energy-Efficient Architecture of Wireless Home Network Based on Mac Broadcast and Transmission Power Control,'' In International Conference on Consumer Electronics Digest of Technical Papers, P1-20, January 2007.
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R. Hashimoto, K. Kato, G. Fujta, and T. Onoye, ``VLSI Architecture of H.264 Block Size Decision Based on Rate-Distortion Optimization,'' In Proc. ISPACS, pp. 618--621, December 2006.
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K. Shinkai, M. Hashimoto, A. Kurokawa, and T. Onoye, ``A Gate Delay Model Focusing on Current Fluctuation Over Wide-Range of Process and Environmental Variability,'' In Proc. International Conference on Computer-Aided Design (ICCAD), pp. 47-53, November 2006.
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Y. Ogasahara, M. Hashimoto, and T. Onoye, ``Quantitative Prediction of On-Chip Capacitive and Inductive Crosstalk Noise and Discussion on Wire Cross-Sectional Area Toward Inductive Crosstalk Free Interconnects,'' Proc. IEEE International Conference on Computer Design, pp. 70--75, October 2006.
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J. Ashida, R. Miyamoto, H. Tsutsui, T. Onoye, and Y. Nakamura, ``Probabilistic Pedestrian Tracking Based on a Skeleton Model,'' In Proc. International Conference on Image Processing, pp. 2825--2828, October 2006.
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Y. Ogasahara, M. Hashimoto, and T. Onoye, ``Measurement of Inductive Coupling Effect on Timing in 90nm Global Interconnects,'' In Proc. IEEE Custom Integrated Circuits Conference, pp. 721--724, September 2006.
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Y. Ogasahara, T. Enami, M. Hashimoto, T. Sato, and T. Onoye, ``Measurement Results of Delay Degradation Due to Power Supply Noise Well Correlated with Full-Chip Simulation,'' In Proc.~IEEE Custom Integrated Circuits Conference, pp. 861--864, September 2006.
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T. Ijichi, M. Hashimoto, S. Takahashi, S. Tsukiyama, and I. Shirakawa, ``Transistor Sizing of Lcd Driver Circuit for Technology Migration,'' In Proceedings of International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), vol. 1, p. I25--I28, July 2006.
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A. Kosaka and T. Onoye, ``Pipeline Processing of Continuous Speech Recognition Algorithm for Embedded System Implementation,'' In Proc. International Technical Conference on Circuits/Systems, Computers and Communication, vol. ¶, pp. 373--376, July 2006.
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F. Hyuga, T. Masuzaki, H. Tsutsui, T. Onoye, and Y. Nakamura, ``A JPEG Coding Scheme for High Fidelity Images by Halftoning Less Signification Extra Bits,'' In Proc. International Technical Conference on Circuits/Systems, Computers and Communication, vol. ·, pp. 97--100, July 2006.
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T. Kanamoto, T. Ikeda, A. Tsuchiya, H. Onodera, and M. Hashimoto, ``Si-Substrate Modeling Toward Substrate-Aware Interconnect Resistance and Inductance Extraction in Soc Design,'' In Proceedings of IEEE Wrokshop on Signal Propagation on Interconnects (SPI), pp. 227--230, May 2006.
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K. Tsujino, W. Kobayashi, T. Onoye, and Y. Nakamura, ``Automated Design of Digital Filters for 3-D Sound Localization in Embedded Applications,'' In Proc. International Conf. Audio, Speech, and Signal Processing (ICASSP2006), p. V.349--V.352, May 2006.
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H. Sugano, H. Tsutsui, T. Masuzaki, T. Onoye, H. Ochi, and Y. Nakamura, ``Efficient Memory Architecture for JPEG2000 Entropy Codec,'' In Proc. International Symposium on Circuits and Systems, pp. 2881--2884, May 2006.
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Y. Mitsuyama, R. Imai, K. Takahashi, T. Onoye, and I. Shirakawa, ``Domain-Specific Reconfigurable Architecture for Media Processing,'' In Proc. Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI 2006), pp. 322--327, April 2006.
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A. Kotani, Y. Tanemura, Y. Mitsuyama, Y. Asai, Y. Nakamura, and T. Onoye, ``Contour-Based Gravity Center Evaluation of Characters,'' In Proc. EUROMEDIA, pp. 15--20, April 2006.
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K. Shinkai, M. Hashimoto, A. Kurokawa, and T. Onoye, ``A Gate Delay Model Focusing on Current Fluctuation Over Wide-Range of Process and Environmental Variability,'' In Proc. International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), pp. 59-64, February 2006.
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Z. Guo, Y. Nishikawa, R. Y. Omaki, T. Onoye, and I. Shirakawa, ``A Low-Complexity FEC Assignment Scheme for Motion JPEG2000 Over Wireless Network,'' In International Conference on Consumer Electronics(ICCE2006), digest of technical papers, Las Vegas, Nevada, USA, pp. 391--392, January 2006.
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T. Kanamoto, T. Ikeda, A. Tsuchiya, H. Onodera, and M. Hashimoto, ``Effective Si-Substrate Modeling for Frequency-Dependent Interconnect Resistance and Inductance Extraction,'' In The 3rd International Workshop on Compact Modeling, pp. 51--56, January 2006.
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A. Tsuchiya, M. Hashimoto, and H. Onodera, ``Interconnect Rl Extraction at a Single Representative Frequency,'' In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 515-520, January 2006.
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S. Takahashi, A. Taji, S. Tsukiyama, M. Hashimoto, and I. Shirakawa, ``A Sampling Switch Design for Liquid Crystal Displays,'' In Proceedings of IEEE International Region 10 Conference, November 2005.
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T. Kouno, M. Hashimoto, and H. Onodera, ``Input Capacitance Modeling of Logic Gates for Accurate Static Timing Analysis,'' In Proceedings of IEEE Asian Solid-State Circuits Conference (A-SSCC), pp. 453-456, November 2005.
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M. Hashimoto, A. Tsuchiya, A. Shinmyo, and H. Onodera, ``Performance Prediction of On-Chip High-Throughput Global Signaling,'' In Proceedings of IEEE 14th Topical Meeting on Electrical Performance of Electronic Packaging (EPEP), pp. 79-82, October 2005.
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79-82, ``Estimation of Maximum Oscillation Frequency for Cmos Lcvcos,'' In Estimation of Maximum Oscillation Frequency for CMOS LCVCOs, October 2005.
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Y. Ogasahara, M. Hashimoto, and T. Onoye, ``Measurement and Analysis of Delay Variation Due to Inductive Coupling,'' In Proc. IEEE Custom Integrated Circuits Conference, pp. 305--308, September 2005.
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A. Tsuchiya, M. Hashimoto, and H. Onodera, ``Design Guideline for Resistive Termination of On-Chip High-Speed Interconnects,'' In Proceedings of IEEE Custom Integrated Circuits Conference (CICC), pp. 613-616, September 2005.
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S. Takahashi, A. Taji, S. Tsukiyama, M. Hashimoto, and I. Shirakawa, ``A Design Scheme for Sampling Switch in Active Matrix Lcd,'' In A Design Scheme for Sampling Switch in Active Matrix LCD, August 2005.
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Huynh Van Nhat, T. Imanaka, G. Fujita, T. Onoye, and I. Shirakawa, ``Real-Time Human Object Extraction for Mobile Terminal,'' In in Proc.The 20th Commemorative International Technical Conference on Circuits/Systems, Computers and Communications(ITC-CSCC2005), Jeju, Korea, vol. 3, pp. 1015-1016, July 2005.
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Y. Mitsuyama, R. Imai, K. Takahashi, T. Onoye, and I. Shirakawa, ``An Approach for Area-Efficient Coarse-Grained Reconfigurable Architecture Dedicated to Media Processing,'' In Proc. International Technical Conference of Circuits/Systems, Computers and Communications (ITC-CSCC2005), pp. 131--132, July 2005.
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T. Matsumura, N. Iwanaga, T. Onoye, W. Kobayashi, I. Shirakawa, and I. Arungsrisangchai, ``3D Sound Movement System for Embedded Applications,'' In in Proc. IEEE International Symposium on Circuits and Systems (ISCAS2005), Kobe, Japan, pp. 5345-5348, May 2005.
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R. Miyamoto, H. Sugita, Y. Hayashi, H. Tsutsui, T. Masuzaki, T. Onoye, and Y. Nakamura, ``High Quality Motion JPEG2000 Coding Scheme Based on the Human Visual System,'' In Proc. IEEE Int¡Çl Symp. Circuits and Systems, pp. 2096--2099, May 2005.
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A. Tsuchiya, M. Hashimoto, and H. Onodera, ``Substrate Loss of On-Chip Transmission-Lines with Power/Ground Wires in Lower Layer,'' In Proceedings of IEEE Workshop on Signal Propagation on Interconnects (SPI), Proceedings of IEEE Workshop on Signal Propagation on Interconnects (SPI), May 2005.
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Y. Uchida, S. Tani, M. Hashimoto, S. Tsukiyama, and I. Shirakawa, ``Interconnect Capacitance Extraction for System LCD Circuits,'' In in Proc. IEEE/ACM Great Lake Symposium on Very Large Scale Integrated circuits (GLSVLSI 2005), pp. 160--163, April 2005.
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A. Tsuchiya, M. Hashimoto, and H. Onodera, ``Effects of Orthogonal Power/Ground Wires on On-Chip Interconnect Characteristics,'' In Proceedings of International Meeting for Future of Electron Devices, Kansai, pp. 33-34, April 2005.
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A. Muramatsu, M. Hashimoto, and H. Onodera, ``Effects of On-Chip Inductance on Power Distribution Grid,'' In Proceedings of International Symposium on Physical Design (ISPD), pp. 63-69, April 2005.
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M. Hashimoto, T. Yamamoto, and H. Onodera, ``Statistical Analysis of Clock Skew Variation in H-Tree Structure,'' In Proceedings of International Symposium on Quality Electronic Design (ISQED), pp. 402-407, March 2005.
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T. Matsumura, N. Iwanaga, W. Kobayashi, T. Onoye, and I. Shirakawa, ``Embedded 3D Sound Movement System Based on Feature Extraction of Head-Related Transfer Function,'' In in Proc.~International Conference on Consumer Electronics (ICCE2005), digest of technical papers, Las Vegas, Nevada, USA, 7.1-2, January 2005.
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T. Sato, M. Hashimoto, and H. Onodera, ``Successive Pad Assignment Algorithm to Optimize Number and Location of Power Supply Pad Using Incremental Matrix Inversion,'' In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 723-728, January 2005.
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M. Hashimoto, J. Yamaguchi, T. Sato, and H. Onodera, ``Timing Analysis Considering Temporal Supply Voltage Fluctuation,'' In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 1098-1101, January 2005.
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A. Tsuchiya, M. Hashimoto, and H. Onodera, ``Return Path Selection for Loop Rl Extraction,'' In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 1078-1081, January 2005.
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T. Sato, N. Ono, J. Ichimiya, K. Hachiya, and M. Hashimoto, ``On-Chip Thermal Gradient Analysis and Temperature Flattening for Soc Design,'' In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 1074-1077, January 2005.
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A. Shinmyo, M. Hashimoto, and H. Onodera, ``Design and Measurement of 6.4 Gbps 8:1 Multiplexer in 0.18um Cmos Process,'' In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), p. D9-D10, January 2005.
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S. Takahashi, A. Taji, S. Tsukiyama, M. Hashimoto, and I. Shirakawa, ``A Sampling Switch Design for Liquid Crystal Displays,'' In Proceedings of IEEE International Region 10 Conference, 1C-03.3, 2005.
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S. Takahashi, A. Taji, S. Tsukiyama, M. Hashimoto, and I. Shirakawa, ``A Design Scheme for Sampling Switch in Active Matrix LCD,'' In Proceedings of European Conference on Circuit Theory and Design, 3e-212, 2005.
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R. Miyamoto, Y. Hayashi, H. Tsutsui, T. Masuzaki, T. Onoye, and Y. Nakamura, ``Video Quality Enhancement for Motion JPEG2000 Encoding Based on the Human Visual System,'' In Proc. IEEE Asia Pacific Conference on Circuits and Systems, pp. 1161--1164, December 2004.
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N. Iwanaga, W. Kobayashi, K. Furuya, T. Onoye, and I. Shirakawa, ``VLSI Implementation of 3D Sound Image Movement for Embedded Systems,'' In in Proc. IEEE Region 10 Conference (TENCON) 2004, A--021, November 2004.
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K. Tsujino, W. Kobayashi, T. Izumi, T. Onoye, and Y. Nakamura, ``Realtime Filter Redesign for Interactive 3-D Sound Systems,'' In Proc. IEEE Region 10 Conference, pp. 124--127, November 2004.
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M. Hashimoto, A. Tsuchiya, A. Shinmyo, and H. Onodera, ``Performance Prediction of On-Chip Global Signaling,'' In IEEE Electrical Design of Advanced Packaging and Systems (EDAPS) , pp. 87-100, November 2004.
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M. Hashimoto, J. Yamaguchi, and H. Onodera, ``Timing Analysis Considering Spatial Power/Ground Level Variation,'' In Proceedings of ACM/IEEE International Conference on Computer-Aided Design (ICCAD), pp. 814-820, November 2004.
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N. Iwanaga, W. Kobayashi, K. Furuya, T. Onoye, and I. Shirakawa, ``VLSI Implementation of a 3D Sound Movement System,'' In in Proc. The 12th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI) 2004, pp. 121-125, October 2004.
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M. Hashimoto, A. Tsuchiya, and H. Onodera, ``On-Chip Global Signaling by Wave Pipelining,'' In IEEE 13th Topical Meeting on Electrical Performance of Electronic Packaging (EPEP), pp. 311-314, October 2004.
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A. Muramatsu, M. Hashimoto, and H. Onodera, ``Lsi Power Network Analysis with On-Chip Wire Inductance,'' In Proceedings of Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI), pp. 55-60, October 2004.
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T. Sato, M. Hashimoto, and H. Onodera, ``An Ir-Drop Minimization by Optimizing Number and Location of Power Supply Pads,'' In Proceedings of Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI), pp. 66-72, October 2004.
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M. Hashimoto, T. Yamamoto, and H. Onodera, ``Statistical Analysis of Clock Skew Variation,'' In Proceedings of Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI), pp. 214-219, October 2004.
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T. Miyazaki, M. Hashimoto, and H. Onodera, ``A Performance Prediction of Clock Generation Plls: a Ring Oscillator Based Pll and an Lc Oscillator Based Pll,'' In IEEJ International Analog VLSI Workshop, pp. 45-50, October 2004.
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Y. Mitsuyama, M. Kimura, T. Onoye, and I. Shirakawa, ``Embedded Architecture of IEEE802.11i Cipher Algorithms,'' In in Proc. 2004 IEEE International Symposium on Consumer Electronics (ISCE2004), pp. 241--246, September 2004.
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S. Maeta, A. Kosaka, A. Yamada, T. Onoye, T. Chiba, and I. Shirakawa, ``C-Based Hardware Design of IMDCT Accelerator for Ogg Vorbis Decoder,'' In in Proc.12th European Signal Processing Conference (EUSIPCO 2004), pp. 1361--1364, September 2004.
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H. Tsutsui, T. Masuzaki, Y. Hayashi, Y. Taki, T. Izumi, T. Onoye, and Y. Nakamura, ``Scalable Design Framework for JPEG2000 System Architecture,'' In Proc. Asia-Pacific Computer Systems Architecture Conference, pp. 6--11, September 2004.
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J. Ashida, R. Miyamoto, H. Tsutsui, T. Onoye, and Y. Nakamura, ``A Scalable Approach for Estimation of Focus of Expansion,'' In Proc. IASTED International Conference on Visualization, Imaging, and Image Processing, pp. 6--11, September 2004.
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A. Tsuchiya, M. Hashimoto, and H. Onodera, ``Performance Limitation of On-Chip Global Interconnects for High-Speed Signaling,'' In Proceedings of IEEE Custom Integrated Circuits Conference (CICC), pp. 489-492, September 2004.
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A. Shinmyo, M. Hashimoto, and H. Onodera, ``Design and Optimization of Cmos Current Mode Logic Dividers,'' In IEEE Asia-Pacific Conference on Advanced System Integrated Circuits , pp. 434-435, August 2004.
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Y. Ogasahara, M. Ise, T. Onoye, and I. Shirakawa, ``Architecture of Turbo Decoder for W-CDMA by Configurable Processor,'' In Proc.The 2004 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC2004), Sendai, Japan, F2P-27-1--7F2P-27-4, p. 7, July 2004.
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T. Onoye, H. Tsutsui, G. Fujita, Y. Nakamura, and I. Shirakawa, ``Embedded System Implementation of Scalable and Object-Based Video Coding,'' In in Proc. of World Automation Congress (WAC) , International Forum on Multimedia and Image Processing (IFMIP), IFMIP076, June 2004.
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H. Sugita, Q.-M. Vu, T. Masuzaki, H. Tsutsui, T. Izumi, T. Onoye, and Y. Nakamura, ``JPEG2000 High-Speed Progressive Decoding Scheme,'' In Proc. IEEE International Symposium on Circuits and Systems, pp. 873--876, May 2004.
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A. Kosaka, S. Yamaguchi, H. Okuhata, T. Onoye, and I. Shirakawa, ``SoC Design of Ogg Vorbis Decoder Using Embedded Processor,'' In in Proc. 2004 Computing Frontier Conference, pp. 481--487, April 2004.
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K. Tsujino, A. Shigiya, W. Kobayashi, T. Izumi, T. Onoye, and Y. Nakamura, ``An Implementation of Moving 3-D Sound Synthesis System Based on Floating Point Dsp,'' In Proc. IEEE International Symposium on Signal Processing and Information Technology, pp. WA4-8.1-WA4-8.4, December 2003.
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K. Tsujino, A. Shigiya, T. Izumi, T. Onoye, Y. Nakamura, and W. Kobayashi, ``A Dsp-Based 3-D Sound Synthesis System for Moving Sound Images,'' In Proc. GAME-ON Conference, pp. 23--25, November 2003.
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K. Hontani, T. Imanaka, G. Fujita, T. Onoye, and I. Shirakawa, ``Modified Snake: Real-Time Face Object Extraction for Video Phone,'' In in Proc. IEEE International Conference on Image Processing(ICIP2003), Barcelona, Spain, vol. III, pp. 873--876, September 2003.
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M. Ise, Y. Ogasahara, T. Onoye, and I. Shirakawa, ``Implementation of W-CDMA Channel Codec by Configurable Processors,'' In Proc. Sixth Baiona Workshop on Signal Processing in Communications, pp. 205--210, September 2003.
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Y. Uchida, S. Tani, S. Tsukiyama, and I. Shirakawa, ``Parasitic Capacitance Modeling for TFT Liquid Crystal Displays,'' In in Proc. The European Solid-State Device Research Conference (ESSDERC2003), Estoril, Portugul, pp. 453--456, September 2003.
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H.-S. Song, H. Okada, G. Fujita, T. Onoye, and I. Shirakawa, ``Efficient Error Recovery Scheme for MPEG-4 Video Coding,'' In in Proc. The 2003 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC2003), Kang-Woo Do, Korea, vol. 2, pp. 1328--1331, July 2003.
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Y. Uchida, S. Tani, S. Tsukiyama, and I. Shirakawa, ``Parasitic Capacitance Modeling for On-Chip Interconnects,'' In in Proc. The 2003 International Technical Conference on Circuits/Systems, Computers and ommunications (ITC-CSCC2003) , Kang-Woo Do, Korea, vol. 3, pp. 1638--1641, July 2003.
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A. Kotani, Y. Asai, Y. Nakamura, S. Okada, N. Koyama, K. Yamane, Y.Okano, Y. Mitsuyama, and T. Onoye, ``Visibility Font Technology on High Resolution Color LCD "LCFONT.c",'' In in Proc. The 2003 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2003), Kang-Woo Do, Korea, vol. 1, pp. 535--538, July 2003.
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S. Yamaguchi, A. Kosaka, H. Okuhata, T. Onoye, and I. Shirakawa, ``Low Power Ogg Vorbis Decoder by Embedded Processor,'' In in Proc. The 2003 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC2003), Kang-Woo Do, Korea, vol. 1, pp. 565--568, July 2003.
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T. Matsumura, N. Iwanaga, W. Kobayashi, T. Onoye, and I. Shirakawa, ``Feature Extraction of Head-Related Transfer Function for 3D Sound Movement,'' In in Proc. The 2003 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC2003), Kang-Woo Do, Korea, vol. 1, pp. 685--688, July 2003.
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N. Iwanaga, W. Kobayashi, K. Furuya, T. Onoye, and I. Shirakawa, ``Embedded Implementation of Acoustic Field Enhancement for Stereo Sound Sources,'' In in IEEE 29th International Conference on Consumer Electronics (ICCE2003), digest of technical papers, Los Angeles, Carifornia, USA, pp. 256--257, June 2003.
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T. Okada, T. Uchida, T. Onoye, and I. Shirakawa, ``A Novel Signal Processing Scheme for Next Generation GNSS Receiver,'' In in Proc. the 8th ISU International Symposium, Strasbourg, France, May 2003.
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M. Hatanaka, T. Masaki, M. Okada, and K. Murakami, ``Implementation of PSK Demodulator for Digital BS/{cs} Broadcasting System,'' In in Proc. IEEE International Symposium on Circuits and Systems (ISCAS2003) , Bankok, Thailand, vol. II, pp. 764--767, May 2003.
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S. Komata, A. Pal, N. Sakamoto, W. Kobayashi, T. Onoye, and I. Shirakawa, ``Interactive Interface of Realtime 3D Sound Movement for Embedded Applications,'' In in Proc. IEEE International Symposium on Circuits and Systems (ISCAS2003) , Bankok, Thailand, vol. II, pp. 520--523, May 2003.
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Y. Hayashi, H. Tsutsui, T. Masuzaki, T. Izumi, T. Onoye, and Y. Nakamura, ``Design Framework for JPEG2000 Encoding System Architecture,'' In Proc. International Symposium on Circuits and Systems, pp. 740--743, May 2003.
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T. Okada, T. Uchida, T. Onoye, and I. Shirakawa, ``A Novel Signal Processing Scheme for Next Generation GNSS Receiver and Its VLSI Implementation,'' In in Proc. International Signal Processing Conference , Dallas, no. 357, April 2003.
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N. Iwanaga, W. Kobayashi, K. Furuya, N. Sakamoto, T. Onoye, and I.Shirakawa, ``Low Cost Approach to Acoustic Field Enhancement for Stereo Headphones,'' In in Proc. Euromedia 2003, Plymouth, United Kingdom, pp. 32--36, April 2003.
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S. Tani, Y. Uchida, M. Furuie, S. Tsukiyama, B. Lee, S. Nishi, Y. Kubota, I. Shirakawa, and S. Imai, ``A Parasitic Capacitance Modeling Method for Non-Planar Interconnects,'' In in Proc. the Workshop on Synthesis and System Integration of Mixed Information Technologies (SASIMI 2003), pp. 294--299, April 2003.
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T. Yuasa, A. Tomita, T. Izumi, T. Onoye, and Y. Nakamura, ``An Approach for Circuit Size Reduction by Variable Reordering for Pca-Chip2,'' In Proc. Workshop on Synthesis and System Integration of Mixed Information Technologies, pp. 217--221, April 2003.
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T. Nakagawa, G. Fujita, T. Onoye, and I. Shirakawa, ``Vlsi Architecture for Mpeg-4 Core Profile Codec Core,'' In Proc. Workshop on Synthesis and System Integration of Mixed Information Technologies, pp. 365--371, April 2003.
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Y. Hayashi, H. Tsutsui, T. Masuzaki, T. Izumi, T. Onoye, and Y. Nakamura, ``Scalable Design Framework for JPEG2000 Encoder Architecture,'' In Proc. Workshop on Synthesis and System Integration of Mixed Information Technologies, pp. 372--376, April 2003.
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T. Yuasa, Y. Soga, T. Izumi, T. Onoye, and Y. Nakamura, ``An Improved Communication Channel in Dynamic Reconfigurable Device for Multimedia Applications,'' In Proc. EUROMEDIA, pp. 152--157, April 2003.
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K. Hontani, T. Imanaka, G. Fujita, T. Onoye, and I. Shirakawa, ``Realtime Face Object Extraction Algorithm for Video Phone,'' In in Proc. IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2002), Orchard Road, Singapore, vol. 1, pp. 35--38, December 2002.
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