Journal

[1] 岩瀬大輝, 伊藤雄一, 秦秀彦, 尾上孝雄, " SenseSurface：アクティブ音響センシングによる物体識別と位置推定," 情報処理学会論文誌, volume 60, number 10, pages 1869-1880, October 2019.

[2] 中村淳之, 伊藤雄一, 尾上孝雄, "磁気センサシートを用いた軸型オブジェクトに対するインタラクション取得手法," 日本バーチャルリアリティ学会論文誌, volume 24, number 3, pages 271-281, September 2019. [2.pdf]

[3] 井上佑貴, 伊藤雄一, 尾上孝雄, "TuVe：チューブを用いたフレキシブルなディスプレイ," 日本バーチャルリアリティ学会論文誌, volume 24, number 3, pages 293-301, September 2019. [2.pdf]

[4] Masaki Masuyama, Yuichi Itoh, Kosuke Fukushima, Takao Onoye, "Sitting Posture Classification with Chair Caster-Shaped Device," ヒューマンインタフェース学会論文誌, volume 21, number 1, pages 47-60, February 2019. [2.pdf]

[5] T. Minamikawa, D. Nagai, T. Kaneko, I. Taniguchi, M. Ando, R. Akama, and K. Takenaka, "Analytical Imaging of Colour Pigments Used in Japanese Woodblock Prints Using Raman Microspectroscopy," Journal of Raman Spectroscopy, volume 48, number 12, pages 1887-1895, December 2017.

[6] Takemi Tsuzuki, Yuischi Itoh, Masahiro Ando, Toshiki Hosoi, Kazuki Takashima, Takao Onoye, Yoshifumi Kitamura, "Stackblock: a Block-Shaped Interface for 3d Model Reconstruction of Stacked Blocks," 情報処理学会論文誌, volume 57, number 12, pages 2565-2576, December 2016.

[7] Yuki Tsujimoto, Yuichi Itoh, Takao Onoye, "Ketsuro-Graffiti: an Interactive Display with Water Condensation," 日本バーチャルリアリティ学会論文誌, volume 21, number 3, pages 513-520, September 2016.

[8] C. Siriteanu, A. Takemura, C. Koutschan, S. Kuriki, D. Richards, and H. Shin, "Exact Zf Analysis and Computer-Algebra-Aided Evaluation in Rank-1 Los Rician Fading," IEEE Transactions on Wireless Communications, accepted, April 2016. [2.pdf]

[9] Constantin Siriteanu, Satoshi Kuriki, Donald Richards, and Akimichi Takemura, "Chi-Square Mixture Representations for the Distribution of the Scalar Schur Complement in a Noncentral Wishart Matrix," Statistics and Probability Letters, accepted, February 2016. [2.pdf]

[10] S. Iizuka, Y. Higuchi, M. Hashimoto, and T. Onoye, "Device-Parameter Estimation with Sensitivity-Configurable Ring Oscillator," IEICE Trans. Fundamentals of Electronics Communications and Computer Sciences, volume E98-A, number 12, pages 2607--2613, December 2015.

[11] Kosuke TOMITA, Masahide HATANAKA, and Takao ONOYE, "Implementation of Viterbi Decoder Toward GPU-based SDR Receiver," IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, volume E98-A, number 11, pages 2246-2253, November 2015.

[12] T.T. Oo, T. Onoye, and K. Shin, "Partial Encryption Method That Enhances MP3 Security," IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, volume E98-A, number 8, pages 1760-1768, August 2015. [2.pdf]

[13] D. Fukuda, K. Watanabe, Y. Kanazawa, and M. Hashimoto, "Modeling the Effect of Global Layout Pattern on Wire Width Variation for On-The-Fly Etching Process Modification," IEICE Trans. Fundamentals of Electronics Communications and Computer Sciences, volume E98-A, number 7, pages 1467--1474, July 2015.

[14] T. Shinada, M. Hashimoto, and T. Onoye, "Proximity Distance Estimation Based on Electric Field Communication between 1mm³ Sensor Nodes," Analog Integrated Circuits and Signal Processing, May 2015.

[15] C.Siriteanu, A.Takemura, S.Kuriki, D.Richards, and H.Shin, "Schur Complement Based Analysis of Mimo Zero-Forcing for Rician Fading," IEEE Transactions on Wireless Communications, volume 14, number 4, pages 1757-1771, April 2015.

[16] C.Siriteanu, A.Takemura, S.Kuriki, and H.Shin, "Mimo Zero-Forcing Performance Evaluation Using the Holonomic Gradient Method," IEEE Transactions on Wireless Communications, volume 14, number 4, 2322 - 2335, April 2015.

[17] S. Hirokawa, R. Harada, M. Hashimoto, and T. Onoye, "Characterizing Alpha- and Neutron-Induced Seu and Mcu on Sotb and Bulk 0.4-V Srams," IEEE Transactions on Nuclear Science, April 2015.

[18] T. Uemura, T. Kato, R. Tanabe, H. Iwata, J. Ariyoshi, H. Matsuyama, and M. Hashimoto, "Exploring Well-Configurations for Minimizing Single Event Latchup," IEEE Transactions on Nuclear Science, volume 61, number 6, pages 3282--3289, December 2014.

[19] D. Fukuda, K. Watanabe, N. Idani, Y. Kanazawa, and M. Hashimoto, "Edge-Over-Erosion Error Prediction Method Based on Multi-Level Machine Learning Algorithm," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E97-A, number 12, pages 2373--2382, December 2014.

[20] H. Konoura, D. Alnajjar, Y. Mitsuyama, H. Shimada, K. Kobayashi, H. Kanbara, H. Ochi, T. Imagawa, K. Wakabayashi, M. Hashimoto, T. Onoye, and H. Onodera, "Reliability-Configurable Mixed-Grained Reconfigurable Array Supporting C-Based Design and Its Irradiation Testing," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E97-A, number 12, pages 2518--2529, December 2014.

[21] T. Amaki, M. Hashimoto, and T. Onoye, "A Process and Temperature Tolerant Oscillator-Based True Random Number Generator," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E97-A, number 12, pages 2393--2399, December 2014.

[22] H. Konoura, T. Imagawa, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Comparative Evaluation of Lifetime Enhancement with Fault Avoidance on Dynamically Reconfigurable Devices," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E97-A, number 7, pages 1468--1482, July 2014.

[23] H. Konoura, T. Kameda, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Nbti Mitigation Method by Inputting Random Scan-In Vectors in Standby Time," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E97-A, number 7, pages 1483--1491, July 2014.

[24] R. Harada, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Set Pulse-Width Measurement Suppressing Pulse-Width Modulation and Within-Die Process Variation Effects," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E97-A, number 7, pages 1461--1467, July 2014.

[25] Ryusuke Endo, Yuichi Itoh, Kosuke Nakajima, Fumio Kishino, "マルチタッチディスプレイを用いた複数人によるプランニングができるデジタルサイネージシステムの提案," 情報処理学会論文誌, volume 55, number 4, April 2014. [2.pdf]

[26] C.Siriteanu, S.D. Blostein, A.Takemura, H.Shin, S.Yousefi, and S.Kuriki, "Exact Mimo Zero-Forcing Detection Analysis for Transmit-Correlated Rician Fading," IEEE Transactions on Wireless Communications, volume 13, number 3, pages 1514-1527, March 2014.

[27] H. Fuketa, R. Harada, M. Hashimoto, and T. Onoye, "Measurement and Analysis of Alpha-Particle-Induced Soft Errors and Multiple Cell Upsets in 10t Subthreshold Sram," IEEE Transactions on Device and Materials Reliability, volume 14, number 1, 463 -- 470, March 2014.

[28] Sho Tsugawa, Hiroyuki Ohsaki, Yuichi Itoh, Naonori Ono, Keiichiro Kagawa, and Kazuki Takashima, "Dynamic Social Network Analysis with Heterogeneous Sensors in Ambient Environment," Social Networking, volume 3, number 1, pages 9-18, January 2014.

[29] T. Uemura, T. Kato, H. Matsuyama, and M. Hashimoto, "Mitigating Multi-Bit-Upset with Well-Slits in 28 Nm Multi-Bit-Latch," IEEE Transactions on Nuclear Science, volume 60, number 6, pages 4362--4367, December 2013.

[30] T. Uemura, T. Kato, H. Matsuyama, and M. Hashimoto, "Soft-Error in Sram at Ultra-Low Voltage and Impact of Secondary Proton in Terrestrial Environment," IEEE Transactions on Nuclear Science, volume 60, number 6, pages 4232--4237, December 2013.

[31] D. Alnajjar, H. Konoura, Y. Ko, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Implementing Flexible Reliability in a Coarse Grained Reconfigurable Architecture," IEEE Transactions on VLSI Systems, volume 21, number 12, 2165 -- 2178, December 2013.

[32] M. Okada, M. Hatanaka, K. Kagawa, and S. Miyamoto, "Realization of Secure Ambient Wireless Network System Based on Spatially Distributed Ciphering Function," IEICE Trans. on Fundamentals of Electronics, volume E96-A, number 11, November 2013.

[33] K. Shinkai, M. Hashimoto, and T. Onoye, "A Gate-Delay Model Focusing on Current Fluctuation Over Wide Range of Process-Voltage-Temperature Variations," Integration, the VLSI Journal, volume 46, number 4, pages 345--358, September 2013.

[34] Kosuke Nakajima, Yuichi Itoh, Yusuke Hayashi, Kazuaki Ikeda, Kazuyuki Fujita, Takao Onoye, "Emoballoon: ソーシャルタッチインタラクションのための柔らかな風船型インタフェース," 日本バーチャ ルリアリティ学会論文誌, volume 18, number 3, pages 255-265, September 2013. [2.pdf]

[35] T. Amaki, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "A Worst-Case-Aware Design Methodology for Noise-Tolerant Oscillator-Based True Random Number Generator with Stochastic Behavior Modeling," IEEE Transactions on Information Forensics and Security, volume 8, number 8, pages 1331--1342, August 2013.

[36] T.Kameda, H. Konoura, D. Alnajjar, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Field Slack Assessment for Predictive Fault Avoidance on Coarse-Grained Reconfigurable Devices," IEICE Trans. on Information and Systems , volume E96-D, number 8, pages 1624--1631, August 2013.

[37] R. Harada, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Impact of NBTI-Induced Pulse-Width Modulation on SET Pulse-Width Measurement," IEEE Transactions on Nuclear Science, volume 60, number 4, pages 2630--2634, August 2013.

[38] D. Alnajjar, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Pvt-Induced Timing Error Detection Through Replica Circuits and Time Redundancy in Reconfigurable Devices," IEICE Electronics Express (ELEX), volume 10, number 5, April 2013.

[39] Y. Ogasahara, M. Hashimoto, T. Kanamoto, and T. Onoye, "Supply Noise Suppression by Triple-Well Structure," IEEE Transactions on VLSI Systems, volume 21, number 4, pages 781--785, April 2013.

[40] I. Homjakovs, T. Hirose, Y. Osaki, M. Hashimoto, and T. Onoye, "A 0.8-V 110-Na Cmos Current Reference Circuit Using Subthreshold Operation," IEICE Electronics Express (ELEX), volume 10, number 4, March 2013.

[41] T. Amaki, M. Hashimoto, and T. Onoye, "Jitter Amplifier for Oscillator-Based True Random Number Generator," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E96-A, number 3, pages 684--696, March 2013.

[42] I. Homjakovs, M. Hashimoto, T. Hirose, and T. Onoye, "Signal-Dependent Analog-To-Digital Conversion Based on Minimax Sampling," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E96-A, number 2, pages 459--468, February 2013.

[43] Yusuke Hayashi, Yuichi Itoh, Kazuki Takashima, Kazuyuki Fujita, Kosuke Nakajima, and Takao Onoye, "Cup-Le: Cup-Shaped Tool for Subtly Collecting Information During Conversational Experiment," The International Journal of Advanced Computer Science, volume 3, number 1, pages 44-50, January 2013. [2.pdf]

[44] Masahiro Nakanishi, Masahide Hatanaka, Takao Onoye, "User Interface Management System for Home Appliance," 画像電子学会誌, volume 42, number 1, pages 81-88, January 2013.

[45] Jaehoon Yu, Ryusuke Miyamoto, Takao Onoye, "Speed-Up of Cohog-Based Pedestrian Detection by Stochastic Sampling," 画像電子学会誌, volume 42, number 1, pages 30-40, January 2013.

[46] Kazuyuki Fujita, Kazuki Takashima, Yuichi Itoh, Hiroyuki Ohsaki, Naoaki Ono, Keiichiro Kagawa, Sho Tsugawa, Kosuke Nakajima, Yusuke Hayashi, Fumio Kishino, "Ambient Suiteを用いたパーティ場面における部屋型会話支援システムの実装と評価," 電子情報通信学会論文誌, volume J96-D, number 1, pages 120-132, January 2013. [2.pdf]

[47] M. Hatanaka, T. Homemoto, and T. Onoye, "Architecture and Implementation of Fading Compensation for Dynamic Spectrum Access Wireless Communication Systems," VLSI Design, volume vol. 2013, Article ID 967370, 9 pages, 2013.

[48] R. Harada, S. Abe, H. Fuketa, T. Uemura, M. Hashimoto, and Y. Watanabe, "Angular Dependency of Neutron Induced Multiple Cell Upsets in 65-Nm 10t Subthreshold Sram," IEEE Transactions on Nuclear Science, volume 59, number 6, pages 2791--2795, December 2012.

[49] S. Kimura, M. Hashimoto, and T. Onoye, "A Body Bias Clustering Method for Low Test-Cost Post-Silicon Tuning," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E95-A, number 12, pages 2292--2300, December 2012.

[50] T. Enami, T. Sato, and M. Hashimoto, "Power Distribution Network Optimization for Timing Improvement with Statistical Noise Model and Timing Analysis," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E95-A, number 12, pages 2261--2271, December 2012.

[51] Y. Takai, M. Hashimoto, and T. Onoye, "Power Gating Implementation for Supply Noise Mitigation with Body-Tied Triple-Well Structure," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E95-A, number 12, pages 2220--2225, December 2012.

[52] Ryusuke Endo, Yuichi Itoh, Kosuke Nakajima, Kazuyuki Fujita, Fumio Kishino, "Digital Signage Supporting Collaborative Route Planning in Real Commercial Establishment," ICIC Express Letters, volume 6, number 12, pages 2967-2972, December 2012. [2.pdf]

[53] M. Okada, T. Onoye, and W. Kobayashi, "A Ray Tracing Simulation of Sound Diffraction Based on the Analytic Secondary Source Model," IEEE Trans. Audio, Speech and Language Processing , volume 20, number 9, 2448-2460 , November 2012.

[54] Kosuke Nakajima, Yuichi Itoh, Takayuki Tsukitani, Kazuyuki Fujita, Kazuki Takashima, Fumio Kishino, "FuSA2 Touch Display: 大画面毛状マルチタッチディスプレイ," 情報処理学会論文誌, volume 53, number 3, pages 1069-1081, March 2012. [2.pdf]

[55] H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "Adaptive Performance Compensation with In-Situ Timing Error Predictive Sensors for Subthreshold Circuits," IEEE Transactions on VLSI Systems, volume 20, number 2, pages 333--343, February 2012.

[56] H. Konoura, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Stress Probability Computation for Estimating NBTI-Induced Delay Degradation," IEICE Trans. Fundamentals, volume E94-A, number 12, pages 2545-2553, December 2011.

[57] K. Shinkai, M. Hashimoto, and T. Onoye, "Extracting Device-Parameter Variations with Ro-Based Sensors," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E94-A, number 12, pages 2537--2544, December 2011.

[58] T. Okumura and M. Hashimoto, "Setup Time, Hold Time and Clock-To-Q Delay Computation under Dynamic Supply Noise," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E94-A, number 10, pages 1948--1953, October 2011.

[59] H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "Neutron-Induced Soft Errors and Multiple Cell Upsets in 65-Nm 10t Subthreshold Sram," IEEE Transactions on Nuclear Science, volume 58, number 4, pages 2097--2102, August 2011.

[60] H. Fuketa, D. Kuroda, M. Hashimoto, and T. Onoye, "An Average-Performance-Oriented Subthreshold Processor Self-Timed by Memory Read Completion," IEEE Transactions on Circuits and Systems II, volume 58, number 5, pages 299--303, May 2011.

[61] R. Harada, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Measurement Circuits for Acquiring SET Pulse Width Distribution with Sub-FO1-inverter-delay Resolution," IEICE Transaction on Fundamentals of Electronics, Communications and Computer Sciences, volume E93-A, number 12, pages 2417-2423, December 2010. [2.pdf]

[62] S. Ninomiya and M. Hashimoto, "Accuracy Enhancement of Grid-Based Ssta by Coefficient Interpolation," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E93-A, number 12, pages 2441--2446, December 2010.

[63] T. Enami, S. Ninomiya, K. Shinkai, S. Abe, and M. Hashimoto, "Statistical Timing Analysis Considering Clock Jitter and Skew Due to Power Supply Noise and Process Variation," IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, volume 93-A, number 12, pages 2399-2408, December 2010.

[64] T. Okumura, F. Minami, K. Shimazaki, K. Kuwada, and M. Hashimoto, "Gate Delay Estimation in Sta under Dynamic Power Supply Noise," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E93-A, number 12, pages 2447--2455, December 2010.

[65] M. Okada, N. Iwanaga, T. Matsumura, T. Onoye, and W. Kobayashi, "3D Sound Rendering for Multiple Sound Sources Based on Fuzzy Clustering," IEICE Trans. Fundamentals, volume E93-A, number 11, pages 2163-2172, November 2010.

[66] H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "Transistor Variability Modeling and Its Validation with Ring-Oscillation Frequencies for Body-Biased Subthreshold Circuits," IEEE Transactions on VLSI Systems, volume 18, number 7, pages 1118--1129, July 2010.

[67] Yukio Mitsuyama, Kazuma Takahashi, Rintaro Imai, Masanori Hashimoto, Takao Onoye, Isao Shirakawa, "Application Design of Multi-Standard Decoder on Media-Centric Reconfigurable Architecture," IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, volume J93-A, number 6, pages 397-413, June 2010.

[68] Kenji Watanabe, Toshimitsu Tatsuka, Masahide Hatanaka, Takao Onoye, "A Room Layout Estimation Method for Indoor Localization System," Journal of Signal Processing, volume 14, number 3, pages 231-242, May 2010.

[69] K. Shinkai, M. Hashimoto, and T. Onoye, "Prediction of Self-Heating in Short Intra-Block Wires," IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, volume E93-A, number 3, pages 583-594, March 2010. [2.pdf]

[70] T. Kanamoto, T. Okumura, K. Furukawa, H. Takafuji, A. Kurokawa, K. Hachiya, T. Sakata, M. Tanaka, H. Nakashima, H. Masuda, T. Sato, and M. Hashimoto, "Impact of Self-Heating in Wire Interconnection on Timing," IEICE Trans. on Electronics, volume E93-C, number 3, pages 388--392, March 2010.

[71] Z. Huang, A. Kurokawa, M. Hashimoto, T. Sato, M. Jiang, and Y. Inoue, "Modeling the Overshooting Effect for Cmos Inverter Delay Analysis in Nanometer Technologies," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems , volume 29, number 2, pages 250--260, February 2010.

[72] H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "Trade-Off Analysis between Timing Error Rate and Power Dissipation for Adaptive Speed Control with Timing Error Prediction," IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, volume E92-A, number 12, pages 3094-3102, December 2009.

[73] T. Sakata, T. Okumura, A. Kurokawa, H. Nakashima, H. Masuda, T. Sato, M. Hashimoto, K. Hachiya, K. Furukawa, M. Tanaka, H. Takafuji, and T. Kanamoto, "An Approach for Reducing Leakage Current Variation Due to Manufacturing Variability," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E92-A, number 12, pages 3016--3023, December 2009.

[74] Masayuki Hiromoto, Hiroshi Tsutsui, Hiroyuki Ochi, 小佐野智之, 石川憲洋, Yukihiro Nakamura, "Media Streaming System with Dynamic Rate Control for High Speed Mobile Networks," 情報処理学会論文誌, volume 50, number 10, pages 2532-2542, October 2009.

[75] A. Kurokawa, T. Sato, T. Kanamoto, and M. Hashimoto, "Interconnect Modeling: a Physical Design Perspective (Invited)," IEEE Transactions on Electron Devices, volume 56, number 9, pages 1840--1851, September 2009.

[76] Hiroki Sugano, Takahiko Masuzaki, Hiroshi Tsutsui, Takao Onoye, Hiroyuki Ochi, and Yukihiro Nakamura, "Efficient Memory Organization Framework for Jpeg2000 Entropy Codec," IEICE Trans. Fundamentals, volume E92-A, number 8, pages 1970-1977, August 2009.

[77] Masahide Hatanaka, Toshimitsu Tatsuka, Kenji Watanabe, Takao Onoye, "Location Estimation with Transmission Attenuation in Home Network," IPSJ Journal, volume 50, number 8, 1835–1844, August 2009.

[78] Y. Ogasahara, M. Hashimoto, and T. Onoye, "All Digital Ring-Oscillator Based Macro for Sensing Dynamic Supply Noise Waveform," IEEE Journal of Solid-State Circuits, volume 44, number 6, pages 1745--1755, June 2009.

[79] Takahiko Masuzaki, Hiroshi Tsutsui, Takao Onoye, 水野雄介, 佐々木元, Yukihiro Nakamura, "A Jpeg2000 Codec System Architecture for Single Tile Processing," Journal of IIEEJ, volume 38, number 3, pages 296-304, May 2009.

[80] T. Enami, S. Ninomiya, and M. Hashimoto, "Statistical Timing Analysis Considering Spatially and Temporally Correlated Dynamic Power Supply Noise," IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, volume 28, number 4, pages 541-553, April 2009.

[81] T. Okumura, A. Kurokawa, H. Masuda, T. Kanamoto, M. Hashimoto, H. Takafuji, H. Nakashima, N. Ono, T. Sakata, and T. Sato, "Improvement in Computational Accuracy of Output Transition Time Variation Considering Threshold Voltage Variations," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume 92-A, number 4, pages 990--997, April 2009.

[82] K. Hamamoto, H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "An Experimental Study on Body-Biasing Layout Style Focusing on Area Efficiency and Speed Controllability," IEICE Trans. on Electronics, volume E92-C, number 2, pages 281-285, February 2009.

[83] Takahiko Masuzaki, Hiroshi Tsutsui, Quang Minh Vu, Takao Onoye, and Yukihiro Nakamura, "JPEG2000 High-Speed SNR Progressive Decoding Scheme," International Journal of Computer Science and Network Security, volume 9, number 1, pages 62-68, January 2009.

[84] M. Hashimoto, J. Siriporn, A. Tsuchiya, H. Zhu, and C.-K. Cheng, "Analytical Eye-Diagram Model for On-Chip Distortionless Transmission Lines and Its Application to Design Space Exploration," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E91-A, number 12, pages 3474-3480, December 2008.

[85] S. Abe, M. Hashimoto, and T. Onoye, "Clock Skew Evaluation Considering Manufacturing Variability in Mesh-Style Clock Distribution," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E91-A, number 12, pages 3481-3487, December 2008.

[86] T. Kanamoto, Y. Ogasahara, K. Natsume, K. Yamaguchi, H. Amishiro, T. Watanabe, and M. Hashimoto, "Impact of Well Edge Proximity Effect on Timing," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E91-A, number 12, pages 3461-3464, December 2008.

[87] Yukio Mitsuyama, Kazuma Takahashi, Rintaro Imai, Masanori Hashimoto, Takao Onoye, Isao Shirakawa, "Area-Efficient Reconfigurable Architecture for Media Processin," IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, volume E91-A, number 12, pages 3651-3662, December 2008.

[88] R. Hashimoto, T. Matsumura, Y. Nozato, K. Watanabe, and T. Onoye, "Implementation of Multi-Agent Object Attention System Based on Biologically Inspired Attractor Selection," IEICE Trans. Fundamentals, volume E91-A, number 10, October 2008.

[89] 渡辺慎吾, 橋本昌宜, 佐藤寿倫, "タイミング歩留まり改善を目的とする演算器カスケーディング," 情報処理学会論文誌コンピューティングシステム, volume 1, number 2, pages 12--21, August 2008.

[90] M. Hashimoto, J. Yamaguchi, T. Sato, and H. Onodera, "Timing Analysis Considering Temporal Supply Voltage Fluctuation," IEICE Trans. on Information and Systems , volume E91-D, number 3, pages 655--660, March 2008.

[91] Y. Ogasahara, M. Hashimoto, and T. Onoye, "Measurement and Analysis of Inductive Coupling Noise in 90nm Global Interconnects," IEEE Journal of Solid-State Circuits, volume 43, number 3, pages 718-728, March 2008.

[92] 高橋真吾, 築山修治, 橋本昌宜, 白川功, "液晶ディスプレイ用サンプリング回路におけるサンプリングパルスとトランジスタサイズの最適設計手法," 電子情報通信学会論文誌A, volume J91-A, number 3, pages 373-382, March 2008.

[93] Nobuyuki Iwanaga, Tomoya Matsumura, Akihiro Yoshida, Wataru Kobayashi, and Takao Onoye, "Embedded System Implementation of Sound Localization in Proximal Region," IEICE Trans. Fundamentals, volume E91-A, number 3, pages 763-771, March 2008.

[94] M. Hashimoto, J. Yamaguchi, and H. Onodera, "Timing Analysis Considering Spatial Power/Ground Level Variation," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E90-A, number 12, pages 2661-2668, December 2007.

[95] M. Hashimoto, T. Ijichi, S. Takahashi, S. Tsukiyama, and I. Shirakawa, "Transistor Sizing of LCD Driver Circuit for Technology Migration," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E90-A, number 12, pages 2712--2717, December 2007.

[96] Y. Ogasahara, T. Enami, M. Hashimoto, T. Sato, and T. Onoye, "Validation of a Full-Chip Simulation Model for Supply Noise and Delay Dependence on Average Voltage Drop with On-Chip Delay Measurement," IEEE Trans. on Circuits and Systems—II: Express Briefs, volume 54, number 10, pages 868-872, October 2007.

[97] M. Ise, Y. Ogasahara, K. Watanabe, M. Hatanaka, T. Onoye, H. Niwamoto, I. Keshi, and I. Shirakawa, "Design and Implementation of Home Network Protocol for Appliance Control Based on IEEE 802.15.4," International Journal of Computer Science and Network Security, volume 7, number 7, pages 20-30, July 2007.

[98] K. Tsujino, W. Kobayashi, T. Onoye, and Y. Nakamura, "Automatic Filter Design for 3-D Sound Movement in Embedded Applications," In Acoustical Science and Technology, volume 28, number 4, pages 219-229, July 2007.

[99] A. Tsuchiya, M. Hashimoto, and H. Onodera, "Optimal Termination of On-Chip Transmission-Lines for High-Speed Signaling," IEICE Trans. on Electronics, volume E90-C, number 6, pages 1267-1273, June 2007.

[100] Ryusuke Miyamoto, Jaehoon Yu, Hiroshi Tsutsui, Yukihiro Nakamura, "Highly Accurate Stereo Matching Processor Based on Variable Window Approach," Journal of IIEEJ, volume 36, number 3, pages 210-218, May 2007.

[101] Y. Ogasahara, M. Hashimoto, and T. Onoye, "Quantitative Prediction of On-Chip Capacitive and Inductive Crosstalk Noise　and Tradeoff between Wire Cross Sectional Area and Inductive Crosstalk Effect," In IEICE Trans. on Fundamentals of Electronics,　Communications and Computer Sciences, volume E90-A, number 4, pages 724--731, April 2007.

[102] K. Tsujino, W. Kobayashi, T. Onoye, and Y. Nakamura, "Efficient 3-D Sound Movement with Time-Varying Iir Filters," In IEICE Trans. Fundamentals, volume E90-A, number 3, pages 618--625, March 2007.

[103] K. Watanabe, M. Ise, T. Onoye, H. Niwamoto, and I. Keshi, "An Energy-Efficient Architecture of Wireless Home Network Based on Mac Broadcast and Transmission Power Control," In IEEE Trans. Consumer Electronics, volume 53, number 1, pages 124--130, February 2007.

[104] S. Takahashi, S. Tsukiyama, M. Hashimoto, and I. Shirakawa, "A Sampling Switch Design Procedure for Active Matrix Liquid Crystal Displays," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E89-A, number 12, pages 3538-3545, December 2006.

[105] S. Takahashi, S. Tsukiyama, M. Hashimoto, and I. Shirakawa, "A Sampling Switch Design Procedure for Active Matrix Liquid Crystal Displays," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E89-A, number 12, pages 3538--3545, December 2006.

[106] T. Kanamoto, T. Ikeda, A. Tsuchiya, H. Onodera, and M. Hashimoto, "Si-Substrate Modeling Toward Substrate-Aware Interconnect Resistance and Inductance Extraction in Soc Design," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E89-A, number 12, pages 3560-3568, December 2006.

[107] T. Kanamoto, S. Akutsu, T. Nakabayashi, T. Ichinomiya, K. Hachiya, A. Kurokawa, H. Ishikawa, S. Muromoto, H. Kobayashi, and M Hashimoto, "Impact of Intrinsic Parasitic Extraction Errors on Timing and Noise Estimation," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E89-A, number 12, pages 3666-3670, December 2006.

[108] T. Kanamoto, T. Ikeda, A. Tsuchiya, H. Onodera, and M. Hashimoto, "Si-Substrate Modeling Toward Substrate-Aware Interconnect Resistance and Inductance Extraction in Soc Design," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E89-A, number 12, pages 3560-3568, December 2006.

[109] T. Kanamoto, T. Ikeda, A. Tsuchiya, H. Onodera, and M. Hashimoto, "Si-Substrate Modeling Toward Substrate-Aware Interconnect Resistance and Inductance Extraction in Soc Design," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E89-A, number 12, pages 3560--3568, December 2006.

[110] T. Sato, J. Ichimiya, N. Ono, and M. Hashimoto, "On-Chip Thermal Gradient Analysis Considering Interdependence between Leakage Power and Temperature," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E89-A, number 12, pages 3491-3499, December 2006.

[111] Akio Kotani, Yoshitaka Tanemura, Yukio Mitsuyama, Y. Asai, Yasuhisa Nakamura, Takao Onoye, "Potential Energy-Based Center of Gravity Evaluation of　Characters," Journal of the Institute of Image Elecgtronics　Engineerings of Japan, volume 35, number 4, pages 296--305, July 2006.

[112] Yoshihiro Uchida, Sadahiro Tani, Masanori Hashimoto, Shuji Tukiyama, Isao Shirakawa, "Effectiveness of Ground Plane and Shield Wires for Reduction of Coupling Capacitance and Simplification of Capacitance Estimation in System on Panel Circuits," IPSJ Trans., volume 47, number 6, pages 1665--1673, June 2006.

[113] G. Fujita, T. Imanaka, H. V. Nhat, T. Onoye, and I. Shirakawa, "Real-Time Human Object Extraction Method for Mobile Systems Based on Color Space Segmentation," In IEICE Trans. Fundamentals, volume E89-A, number 4, pages 941--949, April 2006.

[114] H. Tsutsui, T. Masuzaki, Y. Hayashi, Y. Taki, T. Izumi, T. Onoye, and Y. Nakamura, "Design Framework for JPEG2000 System Architecture," In Journal of Intelligent Automation and Soft Computing, volume 13, number 3, pages 331--343, March 2006.

[115] Z. Guo, Y. Nishikawa, R. Y. Omaki, T. Onoye, and I. Shirakawa, "A Low-Complexity FEC Assignment Scheme for Motion JPEG2000 Over Wireless Network," IEEE Transactions on Consumer Electronics, volume 52, number 1, pages 81--86, February 2006.

[116] M. Ise, Y. Ogasahara, T. Onoye, and I. Shirakawa, "W-CDMA Channel Codec by Configurable Processors," In Intelligent Automation and Soft Computing, volume 12, number 3, pages 317--29, 2006.

[117] A. Kurokawa, M. Hashimoto, A. Kasebe, Z.-C. Huang, , Y. Yang, Y. Inoue, R. Inagaki, and H. Masuda, "Second-Order Polynomial Expressions for On-Chip Interconnect Capacitance," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E88-A, number 12, pages 3453-3462, December 2005.

[118] A. Muramatsu, M. Hashimoto, and H. Onodera, "Effects of On-Chip Inductance on Power Distribution Grid," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E88-A, number 12, pages 3564-3572, December 2005.

[119] M. Hashimoto, T. Yamamoto, and H. Onodera, "Statistical Analysis of Clock Skew Variation in H-Tree Structure," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E88-A, number 12, pages 3375-3381, December 2005.

[120] T. Sato, J. Ichimiya, N. Ono, K. Hachiya, and M. Hashimoto, "On-Chip Thermal Gradient Analysis and Temperature Flattening for Soc Design," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E88-A, number 12, pages 3382-3389, December 2005.

[121] T. Sato, M. Hashimoto, and H. Onodera, "Successive Pad Assignment for Minimizing Supply Voltage Drop," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E88-A, number 12, pages 3429-3436, December 2005.

[122] Gen Fujita, Takao Onoye, Isao Shirakawa, "VLSI Implementation of High Accuracy Motion Estimation Core for MPEG-4," IEICE Trans. Fundamentals, volume J88-A, number 11, pages 1282-1382, November 2005.

[123] A. Kosaka, H. Okuhata, T. Onoye, and I. Shirawaka, "Desing of Ogg Vorbis Decoder System for Embedded Platform," IEICE Trans. Fundamentals, volume E88-A, number 8, pages 2124--2130, August 2005.

[124] K. Tsujino, K. Furuya, W. Kobayashi, T. Izumi, T. Onoye, and Y. Nakamura, "Design of Realtime 3-D Sound Processing System," In IEICE Trans. Fundamentals, volume E88-A, number 8, pages 2124--2130, August 2005.

[125] Yoshihiro Uchida, Sadahiro Tani, Masanori Hashimoto, Shuji Tukiyama, Isao Shirakawa, "Interconnect Capacitance Extraction for System LCD Circuits," IPSJ Trans., volume 46, number 6, pages 1395--1403, June 2005.

[126] A. Tsuchiya, M. Hashimoto, and H. Onodera, "Performance Limitation of On-Chip Global Interconnects for High-Speed Signaling," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Science, volume E88-A, number 4, pages 885-891, April 2005.

[127] Y. Mitsuyama, M. Kimura, T. Onoye, and I. Shirakawa, "Architecture of IEEE802.11i Cipher Algorithms for Embedded Systems," IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, volume E88-A, number 4, pages 899-906, April 2005.

[128] T. Miyazaki, M. Hashimoto, and H. Onodera, "A Performance Prediction of Clock Generation Plls: a Ring Oscillator Based Pll and an Lc Oscillator Based Pll," IEICE Trans. on Electronics, volume E88-C, number 3, pages 437-444, March 2005.

[129] T. Matsumura, N. Iwanaga, W. Kobayashi, T. Onoye, and I. Shirakawa, "Embedded 3D Sound Movement System Based on Feature Extraction of Head-Related Transfer Function," IEEE Transactions on Consumer Electronics, volume 51, number 1, pages 262--267, February 2005.

[130] M. Hatanaka, T. Masaki, M. Okada, and K. Murakami, "VLSI Architecture of PSK Demodulator for Digital BS and CS Broadcasting," Proc. The Journal Of The Institute Of Image Information And Television Engineers, volume 59, number 1, pages 69--76, January 2005.

[131] M. Hashimoto and H. Onodera, "Crosstalk Noise Optimization by Post-Layout Transistor Sizing," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E87-A, number 12, pages 3251-3257, December 2004.

[132] M. Hashimoto, Y. Yamada, and H. Onodera, "Equivalent Waveform Propagation for Static Timing Analysis," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems , volume 23, number 4, pages 498-508, April 2004.

[133] M. Kimura, M. H. Miki, T. Onoye, and I. Shirakawa, "Implementation of Java Accelerator for High-Performance Embedded Systems," in IEICE Trans. Fundamentals, volume E86-A, number 12, pages 3079--3088, December 2003.

[134] S. Tani, Y. Uchida, M. Furuie, S. Tsukiyama, B. Lee, S. Nishi, Y. Kubota, I. Shirakawa, and S. Imai, "Parasitic Capacitance Modeling for Non-Planar Interconnects in Liquid Crystal Displays," IEICE Trans. on Fundamentals, volume E86-A, number 12, pages 2923--2932, December 2003.

[135] Tsutomu Okada, Tsubasa Uchida, Takao Onoye, Isao Shirakawa, "Signal Processing Scheme for Next Generation GNSS Receiver and Its VLSI Implementation," IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, volume J86-A, number 12, pages 1417--1425, December 2003.

[136] H. -S. Song, Hiroyuki Okada, Gen Fujita, Takao Onoye, Isao Shirakawa, "Hybrid Error Concealment Algorithm for MPEG-4 Video Coding," The Journal of the Institute of Image Electronics of Japan, volume 32, number 5, pages 609--620, September 2003.

[137] Akio Kotani, N. Koyama, Yukio Mitsuyama, Takao Onoye, "Center of Gravity and Readability on "LCFONT" for Low Resolution Display," The Journal of the Institute of Image Electronics of Japan, volume 32, number 5, pages 621--628, September 2003.

[138] N. Iwanaga, W. Kobayashi, K. Furuya, T. Onoye, and I. Shirakawa, "Embedded Implementation of Acoustic Field Enhancement for Stereo Sound Sources," in IEEE Trans. on Consumer Electronics, volume 49, number 3, pages 737--741, August 2003.

[139] T. Okamoto, T. Yuasa, T. Izumi, T. Onoye, and Y. Nakamura, "Design Tools and Trial Design for Pca-Chip2," In IEICE Trans. Information and Systems,, volume E86-D, number 5, pages 868--871, May 2003.

[140] K. Nakagawa, M. Kawakita, K. Sato, M. Minakuchi, T. Onoye, T. Chiba, and I. Shirakawa, "Object Sharing Scheme for Heterogeneous Environment," in IEICE Transaction on Fundamentals of Electronics, Communications and Computer Sciences, volume E86-A, number 4, pages 813--821, April 2003.

[141] N. Sakamoto, W. Kobayashi, T. Onoye, and I. Shirakawa, "Single DSP Implementation of Realtime 3D Sound Synthesis Algorithm," Journal of Circuits, Systems and Computers, volume 12, number 1, pages 55-73, February 2003.

[142] H. Mizuno, H. Kobayashi, T. Onoye, and I. Shirakawa, "Performance Estimation at Architecture Level for Embedded Systems," IEEE Transaction on Fundamentals of Electronics, Communications and Computer Sciences, volume E85-A, number 12, pages 2636--2644, December 2002.

[143] Y. Ohtani, N. Kawahara, H. Nakaoka, T. Tomaru K. Maruyama, T. Chiba, T. Onoye, and I. Shirakawa, "Wireless Digital Video Transmission System Using IEEE802.11b PHY with Error Correction Block Based ARQ Protocol," IEICE (Institute of Electronics, Information and Communication Engineers) Transaction on Communications, volume E85-B, number 10, pages 2032--2043, October 2002.

[144] Hiroyuki Okada, H.-S. Song, Gen Fujita, Takao Onoye, Isao Shirakawa, "Application of Digital Watermarking to MPEG-4 Bitstream Error Detection," The Journal of the Institute of Image Electronics of Japan, volume 31, number 5, pages 900--908, September 2002.

[145] H. Okada, A.-E. Shiitev, H.-S. Song, G. Fujita, T. Onoye, and I. Shirakawa, "Error Detection by Digital Watermarking for MPEG-4 Video Coding," IEICE (Institute of Electronics, Information and Communication Engineers) Transaction on Fundamentals of Electronics, Communications and Computer Sciences, volume E85-A, number 6, pages 1281--1288, June 2002.

[146] Tian Song, Gen Fujita, Takao Onoye, Isao Shirakawa, "Low Power Implementation of H.263 Version 2 Codec Core Dedicated to Mobile Computing," IPSJ Trans., volume 43, number 4, pages 1161--1170, May 2002.

[147] M. H. Miki, M. Sakamoto, S. Miyamoto, Y. Takeuchi, T. Yoshida, and I. Shirakawa, "Code Efficiency Evaluation for Embedded Processors," IEICE (Institute of Electronics, Information and Communication Engineers) Transaction on Fundamentals of Electronics, Communications and Computer Sciences, volume E85-A, number 4, pages 811--818, April 2002.

[148] Roberto Y. Omaki, Gen Fujita, Takao Onoye, and Isao Shirakawa, "An Embedded Zerotree Wavelet Video Coding Algorithm with Reduced Memory Bandwidth," IEICE Trans. Fundamentals of Electronics Communications and Computer Sciences, volume E85-A, number 3, pages 703--713, March 2002.

[149] Hiroshi Tsutsui, Akihiko Tomita, Shigenori Sugimoto, Kazuhisa Sakai, Tomonori Izumi, Takao Onoye, and Yukihiro Nakamura, "Lut-Array-Based Pld and Synthesis Approach Based on Sum of Generalized Complex Terms Expression," IEICE Trans. Fundamentals, volume E84-A, number 11, pages 2681-2689, November 2001.

[150] Sadahiro Tani, Isao Shirakawa, "Impedance Analysis for Power Distribution Planes in Multilayer Printed Circuit Boards," Journal of JIEP(Japan Institute of Electronics Packaging), volume 4, number 5, pages 378--385, August 2001.

[151] K. Kawamoto, K. Kohno, Y. Higuchi, S. Fujino, and I. Shirakawa, "A 25kV ESD Proof LDMOSFET with a Turn-On Discharge MOSFET," IEICE Trans. Electron, volume E84-C, number 6, pages 823--831, June 2001.

[152] T. Watanabe and N. Ishiura, "Resister Constraint Analysis to Minimize Spill Code for Application Specific DSPs," IEICE Trans. Fundamentals of Electronics Communications and Computer Sciences, volume E84-A, number 6, pages 1541--1544, June 2001.

[153] W. Kobayashi, N. Sakamoto, T. Onoye, and I. Shirakawa, "3D Acoustic Image Localization Algorithm by Embedded DSP," IEICE(The Institute of Electronics, Information and Communication Engineers) Trans. Fundamentals of Electronics Communications and Computer Sciences, volume E84-A, number 6, pages 1423--1430, June 2001.

[154] K. Kawamoto, S. Mizuno, H. Abe, Y. Higuchi, H. Ishihara, H. Fukumoto, T. Watanabe, S. Fujino, and I. Shirakawa, "A Single Chip Automotive Control LSI Using SOI Bipolar Complimentary MOS Double-Diffused MOS," The Japan Society of Applied Physics, volume 40, number 4B, pages 2891--2896, April 2001.

[155] Z. Andales, Y. Mitsuyama, T. Onoye, and I. Shirakawa, "A Novel Dynamically Reconfigurable Hardware-Based Cipher," Trans. of IPSJ(Information Processing Society of Japan), volume 42, number 4, pages 958--966, April 2001.

[156] K. Kawamoto, H. Yamaguchi, H. Himi, S. Fujino, and I. Shirakawa, "A 200 V CMOS SOI IC with Field-Plate Trench Isolation for EL Displays," IEICE Trans. Electron, volume E84-C, number 2, pages 260--266, February 2001.

[157] M. Takahashi, N. Ishiura, A. Yamada, and T. Kambe, "Thread Composition Method for Hardware Compiler Bach Maximizing Resource Sharing among Processes," IEICE Trans. Fundamentals, volume E83-A, number 12, pages 2456--2463, December 2000.

[158] B.Y. Song, M. Furuie, Y. Yoshida, T. Onoye, and I. Shirakawa, "Low-Power VLSI Implementation by NMOS 4-Phase Dynamic Logic," Trans. of IPSJ, volume 41, number 4, pages 899--907, April 2000.

[159] Kenji Matsumura, Makoto Furuie, Gen Fujita, Toshihiro Masaki, Isao Shirakawa, Hiroshi Inada, "LSI Implementation of Wireless Data System Controller for MedecalCares," IPSJ Trans., ., volume 41, number 4, pages 962--969, April 2000.

[160] M. Hatanaka, T. Masaki, T. Onoye, and K. Murakami, "VLSI Architecture of Switching Control for AAL Type2 Switch," IEICE Trans. Fundamentals, volume E83--A, number 3, pages 435--441, March 2000.

[161] B.Y. Song, M. Furuie, Y. Yoshida, T. Onoye, and I. Shirakawa, "Low-Power Scheme of NMOS 4-Phase Dynamic Logic," IEICE Trans. Electron., volume E82--C, number 9, pages 1772--1776, September 1999.

[162] H. Fujisima, Y. Takemoto, T. Onoye, and I. Shirakawa, "An Architecture of a Matrix-Vector Multiplier Dedicated to Video Decoding and Three-Dimensional Computer Graphics," IEEE Trans. Circuits and Systems for Video Technology, volume 9, number 2, pages 306--314, March 1999.

[163] A. Nagao, I. Shirakawa, and T. Kambe, "A Layout Approach to Monolithic Microwave IC," IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, volume 17, number 12, pages 1262--1272, December 1998.

[164] Masayuki Yamaguchi, Nagisa Ishiura, and Takashi Kambe, "A Binding Algorithm for Retargetable Compilation to Non-Orthogonal DSP Architecture," IEICE Trans. Fundamentals, volume E81-A, number 12, pages 2630--2639, December 1998.

[165] M. H. Miki, Gen Fujita, Takao Onoye, Isao Shirakawa, "Low Power Implementation of H.263 Codec Core Dedicated to Mobile Computing," IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, volume J81-A, number 10, pages 1352--1361, October 1998.

[166] Akira Nagao, Takash Sawa, Yuji Shigehiro, Isao Shirakawa, Takashi Kambe, "A New Approach to Rectangle-Packing," IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, volume J81-A, number 10, pages 1362--1371, October 1998.

[167] H. Okuhata, Morgan H. Miki, T. Onoye, and I. Shirakawa, "A Low-Power DSP Core Architecture for Low Bitrate Speech Codec," IEICE Trans. Fundamentals, volume E81-C, number 8, pages 1616--1621, August 1998.

[168] G. Fujita, T. Onoye, and I. Shirakawa, "A VLSI Architecture for Motion Estimation Core Dedicated to H.263 Video Coding," IEICE Trans. Electronics, volume E81-C, number 5, pages 702--707, May 1998.

[169] Kozo Kimura, Hiroyuki Okuhata, Takao Onoye, Isao Shirakawa, Tokuzou Kiyohara, Yoshiyuki Sagishima, "Control Method of Data Cache for Multithreaded Processor," The Journal of The Institute of Image Information and Television Engineers, volume 52, number 5, pages 742--749, May 1998.

[170] T. Masaki, Y. Nakatani, T. Onoye, N. Yamai, and K. Murakami, "Voice Communication on Multimedia ATM Network Using Shared VCI Cell," IEICE Trans. Communications, volume E81-B, number 2, pages 340-346, February 1998.

[171] H. Uno, K. Kumatani, H. Okuhata, I. Shirakawa, and T. Chiba, "ASK Digital Demodulation Scheme for Noise Immune Infrared Data Communication," ACM Wireless Networks, number 3, pages 121-129, 1997.

[172] I. Arungsrisangchai, Y. Shigehiro, I. Shirakawa, and H. Takahashi, "A Fast Minimum Cost Flow Algorithm for Regenerating Optimal Layout of Functional Cells," IEICE Trans. Fundamentals of Electronics,Communications and Computer Sciences, volume E80-A, number 12, pages 2589-2599, December 1997.

[173] M. Yamaguchi, A. Yamada, T. Nakaoka, T. Kambe, and N. Ishiura, "Architecture Evaluation Based on the Datapath Structure and Parallel Constraint," IEICE Trans. Fundamentals of Electronics,Communications and Computer Sciences, volume E80-A, number 10, pages 1853-1860, October 1997.

[174] S. Yano and N. Ishiura, "Embedded Memory Array Testing Using a Scannable Configuration," IEICE Trans. Fundamentals of Electronics,Communications and Computer Sciences, volume E80-A, number 10, pages 1934-1944, October 1997.

[175] Norikazu Shimizu, Shuji Koyama, Hiroshi Ono, Koichi Miyashita, Hitoshi Kondo, Yoshiaki Mizuta, "Field Experiments and Data Processing for Continuous Measurements by GPS Displacement Monitoring System," Shigen-to-Sozai, volume 113, number 7, pages 549-554, July 1997.

[176] H. Okuhata, H. Uno, K. Kumatani, I. Shirakawa, and T. Chiba, "A Low Power Receiver Architecture for 4 Mbps Infrared Wireless Communication," J. Circuits, Systems, and Computers, volume 7, number 5, pages 483-494, May 1997.

[177] K. Miyanohana, G. Fujita, K. Yanagida, T. Onoye, and I. Shirakawa, "Single Chip Implementation of Encoder-Decoder for Low Bit Rate Visural Communication," J. Circuits, Systems, and Computers, volume 7, number 5, pages 441-457, May 1997.

[178] Yukihiro Yoshida, Song Baoyu, Hiroyuki Okuhata, Takao Onoye, Isao Shirakawa, "A Low-Power Consumption Architecture for Embedded Processors," IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, volume J80-A, number 5, pages 765-771, May 1997.

[179] T. Masaki, Y. Nakatani, T. Onoye, and K. Murakami, "Voice and Telephony Over ATM for Multimedia Network Using Shared VCI Cell," J. Circuits, Systems, and Computers, volume 7, number 2, pages 93-110, April 1997.

[180] S. Yano, K. Akagi, H. Inohara, and N. Ishiura, "Application of Full Scan Design to Embedded Memory Arrays," in Proc. IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, volume E80-A, number 3, March 1997.

[181] K. Okada, S. Morikawa, S. Takeuchi, and I. Shirakawa, "A High Performance Multiplier and Its Application to an FIR Filter Dedicated to Digital Video Transmission," in Proc. IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, volume E79-A, number 12, pages 2106-2111, December 1996.

[182] Seiken Yano, Nagisa Ishiura, "メモリアレーを含む順序回路へのスキャンパス 方式適用," 電子情報通信学会論文誌, volume J79-D-I, number 12, pages 1055-1062, December 1996.

[183] Hitoshi Kondo, M. E. Cannon, Norikazu Shimizu, Koji Nakagawa, "GPSによる地盤変位モニタリングシステムの開発," 土木学会論文誌, number 546/VI-32, pages 157-168, September 1996.

[184] T. Onoye, G. Fujita, M. Takatsu, I. Shirakawa, and N. Yamai, "Single Chip Implementation of Motion Estimator Dedicated to MPEG2 MP@HL," in Proc. IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, volume E79-A, number 8, pages 1210-1216, August 1996.

[185] Y. Shigehiro, T. Nagata, I. Shirakawa, I. Arungsrisangchai, and H. Takahashi, "Automatic Layout Recycling Based on Layout Description and Linear Programming," in Proc. IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, volume 15, number 8, pages 959-967, August 1996.

International Conference

[1] Yoshitaka Ishihara, Ryo Shirai, Yuichi Itoh, Kazuyuki Fujita, and Takao Onoye, "Stickytouch: an Adhesion Changeable Surface," In SIGGRAPH Asia 2019 Emerging Technologies, pages 44-45, November 2019. [2.pdf]

[2] Yoshitaka Ishihara, Shori Ueda, Yuichi Itoh, and Kazuyuki Fujita, "PlanT : a Plant-Based Ambient Display Visualizing Gradually Accumulated Information," In Asian CHI Symposium 2019, May 2019. [2.pdf]

[3] Yoshinori Kamizono, Takao Onoye, Wataru Kobayashi, Hidetaka Shibata, and Daisuke Okamoto, "Evaluation of Auditory Signals in an Automobile for Safe Driving," In International Symposium on Multimedia and Communication Technology (ISMAC), 2019. [2.pdf]

[4] Ryo Shirai, Yuichi Itoh, Shori Ueda, and Takao Onoye, "Optrod: Constructing Interactive Surface with Multiple Functions and Flexible Shape by Projected Image," In The 31st Annual ACM Symposium on User Interface Software and Technology Adjunct Proceedings(UIST '18 Adjunct ), pages 169-171, October 2018. [2.pdf]

[5] Daichi Watari, Ittetsu Taniguchi, and Takao Onoye, "Soh Aware Battery Management Optimization on Decentralized Energy Network," In the 9th ACM/IEEE International Conference on Cyber-Physical Systems (ICCPS '18), pages 337-338, April 2018. [2.pdf]

[6] Jin Liu, Masahide Hatanaka, and Takao Onoye, "A Collision Mitigation Method on Spatial Reuse for WLAN in a Dense Residential Environment," In The 21st Workshop on Synthesis And System Integration of Mixed Information techologies (SASIMI 2018), pages 302-307, March 2018.

[7] Qiaochu Zhao, Ittetsu Taniguchi, Makoto Nakamura, and Takao Onoye, "{An Efficient Parts Counting Method Based on Intensity Distribution Analysis for Industrial Vision Systems}," In The 21st Workshop on Synthesis And System Integration of Mixed Information techologies, March 2018. [2.pdf]

[8] S. Negoro, K. Maekawa, D. Sukezane, A. Shibata, I. Taniguchi, and H. Tomiyama, "Measurement and Modeling of Quadcopter Energy with Ros," In Proc. The 21st Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2018), pages 169--173, March 2018.

[9] Yuki Inoue, Yuichi Itoh, Takao Onoye, "Tuve: a Flexible Display with Tube," SIGGRAPH ASIA 2018, 2018.

[10] R. Shirai, Y. Itoh, T. Fukamachi, M. Yamashita, and T. Onoye, "Optrod: Operating Multiple Various Actuators Simultaneously by Projected Images," In SIGGRAPH Asia 2017 Emerging Technologies, number 11, pages 1-2, November 2017.

[11] K. Maekawa, S. Negoro, I. Taniguchi, and H. Tomiyama, "Power Measurement and Modeling of Quadcopters on Horizontal Flight," In International Workshop on Computer Systems and Architectures (CSA) in conjunction with International Symposium on Computing and Networking (CANDAR), xxx--xxx (4 pages), November 2017.

[12] M. Hashimoto, R. Shirai, Y. Itoh, and T. Hirose, "Toward Real-Time 3d Modeling System with Cubic-Millimeters Wireless Sensor Nodes (Invited)," Proceedings of IEEE International Conference on ASIC, pages 1087--1091, October 2017.

[13] R. Shirai, T. Hirose, and M. Hashimoto, "{Dedicated Antenna Less Power Efficient Ook Transmitter for Mm-Cubic Iot Nodes}," Proceedings of the 47th European Microwave Conference (EuMC), pages 101--104, October 2017.

[14] T. Yamamoto, H. Tomiyama, I. Taniguchi, S. Yamashita, and Y. Hara-Azumi, "Systematic Design of Approximate Array Multipliers with Different Accuracy," In International Workshop on Highly Efficient Neural Networks Design (HENND) in conjunction with ESWEEK, xxx--xxx (4 pages), October 2017.

[15] Yusuke Sakumoto and Ittetsu Taniguchi, "Evaluation of MCMC-Based Autonomous Decentralized Mechanism of Energy Interchange in Practical Scenario with Generation Fluctuation," In 22nd IEEE International Conference on Emerging Technologies & Factory Automation (ETFA2017), xxx--xxx (5 pages), September 2017.

[16] R. Shirai, J. Kono, T. Hirose, and M. Hashimoto, "Near-Field Dual-Use Antenna for Magnetic-Field Based Communication and Electrical-Field Based Distance Sensing in Mm^3-Class Sensor Node," Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS), pages 124--127, May 2017.

[17] Kazuki Hirosue, Shohei Ukawa, Yuichi Itoh, Takao Onoye, and Masanori Hashimoto, "Gpgpu-Based Highly Parallelized 3d Node Localization for Real-Time 3d Model Reproduction," In Proceedings of the 22nd International Conference on Intelligent User Interfaces 2017 (IUI '17), pages 173-178, March 2017.

[18] Yuki Tsujimoto, Yuichi Itoh, and Takao Onoye, "Ketsuro-Graffiti: an Interactive Dislplay with Water Condensation," In Proceedings of ACM International Conference on Interactive Surfaces and Spaces 2016 (ISS 2016), pages 49-55, November 2016.

[19] R. Doi, J. Hotate, T. Kishimoto, T. Higashi, H. Ochi, M. Tada, T. Sugibayashi, K. Wakabayashi, H. Onodera, Y. Mitsuyama, and M. Hashimoto, "Highly-Dense Mixed Grained Reconfigurable Architecture with Via-Switch," ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), March 2016.

[20] Y. Masuda, M. Hashimoto, and T. Onoye, "Measurement of Timing Error Detection Performance of Software-Based Error Detection Mechanisms and Its Correlation with Simulation," In ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), pages 28-35, March 2016.

[21] U. Schlichtmann, M. Hashimoto, I. H.-R. Jiang, and B. Li, "Reliability, Adaptability and Flexibility in Timing: Buy a Life Insurance for Your Circuits (Invited)," Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pages 705--711, January 2016.

[22] N. Banno, M.Tada, K. Okamoto, N. Iguchi, T. Sakamoto, M. Miyamura, Y. Tsuji, H. Hada, H. Ochi, H. Onodera, M. Hashimoto, and T. Sugibayashi Author(s) in English , "A Novel Two-Varistors (A-Si/Sin/A-Si) Selected Complementary Atom Switch (2v-1cas) for Nonvolatile Crossbar Switch with Multiple Fan-Outs," Technical Digest of IEEE International Electron Devices Meeting (IEDM), pages 32--35, December 2015.

[23] R. Doi, M. Hashimoto, and T. Onoye, "An Analytic Evaluation on Soft Error Immunity Enhancement Due to Temporal Triplication," IEEE Pacific Rim International Symposium on Dependable Computing (PRDC), November 2015.

[24] E. Aliwarga, J. Yu, M. Hatanaka, and T. Onoye, "Design of Generic Hardware for Soft Cascade-Based Linear Svm Classification," In International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), pages 257-262, November 2015.

[25] Y. Masuda, M. Hashimoto, and T. Onoye, "Performance Evaluation of Software-Based Error Detection Mechanisms for Localizing Electrical Timing Failures under Dynamic Supply Noise," In Proceedings of International Conference on Computer-Aided Design (ICCAD), pages 315-322, November 2015.

[26] S. Iizuka, Y. Masuda, M. Hashimoto, and T. Onoye, "Stochastic Timing Error Rate Estimation under Process and Temporal Variations," In Proceedings of International Test Conference (ITC), October 2015.

[27] Y. Akihara, T. Hirose, Y. Tanaka, N. Kuroki, M. Numa, and M. Hashimoto, "A Wireless Power Transfer System for Small-Sized Sensor Applications," Proceedings of International Conference on Solid State Devices and Materials (SSDM), pages 154--155, September 2015.

[28] M. Ueno, M. Hashimoto, and T. Onoye, "Real-Time On-Chip Supply Voltage Sensor and Its Application to Trace-Based Timing Error Localization," Proceedings of International On-Line Testing Symposium (IOLTS), pages 188--193, July 2015.

[29] S. Hirokawa, R. Harada, M. Hashimoto, K. Sakuta, and Y. Watanabe, "Neutron-Induced Seu and Mcu Rate Characterization and Analysis of Sotb and Bulk Srams at 0.3v Operation," IEEE Nuclear and Space Radiation Effects Conference (NSREC), July 2015.

[30] M. Hashimoto, "Run-Time Performance Adaptation: Opportunities and Challenges (Invited)," Proceedings of IEEE Conference on Electron Devices and Solid-State Circuits (EDSSC), June 2015.

[31] T. Uemura and M. Hashimoto, "Investigation of Single Event Upset and Total Ionizing Dose in Feram for Medical Electronic Tag," Proceedings of International Symposium on Reliability Physics (IRPS), April 2015.

[32] T. Uemura, S. Okano, T. Kato, H. Matsuyama, and M. Hashimoto, "Soft Error Immune Latch Design for 20 Nm Bulk Cmos," Proceedings of International Reliability Physics Symposium (IRPS), April 2015.

[33] T. Uemura, T. Kato, S. Okano, H. Matsuyama, and M. Hashimoto, "Impact of Package on Neutron Induced Single Event Upset in 20 Nm Sram," Proceedings of International Symposium on Reliability Physics (IRPS), April 2015.

[34] S. Ukawa, T. Shinada, M. Hashimoto, Y. Itoh, and T. Onoye, "3d Node Localization from Node-To-Node Distance Information Using Cross-Entropy Method," Proceedings of Virtual Reality Conference (VR), March 2015.

[35] M. Hashimoto, D. Alnajjar, H. Konoura, Y. Mitsuyama, H. Shimada, K. Kobayashi, H. Kanbara, H. Ochi, T. Imagawa, K. Wakabayashi, T. Onoye, and H. Onodera, "Reliability-Configurable Mixed-Grained Reconfigurable Array Compatible with High-Level Synthesis," Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pages 14--15, January 2015.

[36] S. Iizuka, Y. Higuchi, M. Hashimoto, and T. Onoye, "Area Efficient Device-Parameter Estimation Using Sensitivity-Configurable Ring Oscillator," Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pages 731--736, January 2015.

[37] T. Amaki, M. Hashimoto, and T. Onoye, "An Oscillator-Based True Random Number Generator with Process and Temperature Tolerance," Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pages 4--5, January 2015.

[38] Yuki Tsujimoto, Yuichi Itoh, and Takao Onoye, "Ketsuro-Graffiti: a Canvas with Computer Generated Water Condensation," In SIGGRAPH Asia 2015 Emerging Technologies, 15:1--15:2, 2015.

[39] M. Hashimoto, "Opportunities and Verification Challenges of Run-Time Performance Adaptation (Invited)," Proceedings of Asian Test Symposium (ATS), pages 248--253, November 2014.

[40] M. Hashimoto, "Stochastic Verification of Run-Time Performance Adaptation with Field Delay Testing (Invited)," Proceedings of Asia Pacific Conference on Circuits and Systems (APCCAS), pages 751--754, November 2014.

[41] Yohei Miyazaki, Yuichi Itoh, Yuki Tsujimoto, Masahiro Ando, and Takao Onoye, "Ketsuro-Graffiti: Water Condensation Display," In ACE '14 Proceedings of the 11th Conference on Advances in Computer Entertainment Technology, November 2014. [2.pdf]

[42] M. Hashimoto, "Toward Robust Subthreshold Circuit Design: Variability and Soft Error Perspective (Invited)," Proceedings of SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), October 2014.

[43] Kosuke Tomita, Masahide Hatanaka, and Takao Onoye, "An Approach to GPU Implementation of OFDM Transceiver Using Dynamic Spectrum Access," In 2014 International Workshop on Smart Info-Media Systems in Asia, SISA 2014, October 2014.

[44] A. Iokibe, M. Hashimoto, and T. Onoye, "Feasibility Evaluation on an Instant Invader Detection System with Ultrasonic Sensors Scattered on the Ground," Proceedings of International Conference on Sensing Technology (ICST), pages 188--193, September 2014.

[45] R. Harada, S. Hirokawa, and M. Hashimoto, "Measurement of Alpha- and Neutron-Induced Seu and Mcu on Sotb and Bulk 0.4 V Srams," IEEE Nuclear and Space Radiation Effects Conference (NSREC), July 2014.

[46] T. Uemura, T. Kato, R. Tanabe, H. Iwata, J. Ariyoshi, H. Matsuyama, and M. Hashimoto, "Optimizing Well-Configuration for Minimizing Single Event Latchup," IEEE Nuclear and Space Radiation Effects Conference (NSREC), July 2014.

[47] T. Uemura, T. Kato, R. Tanabe, H. Iwata, H. Matsuyama, M. Hashimoto, K. Takahisa, M. Fukuda, and K. Hatanaka, "Preventing Single Event Latchup with Deep P-Well on P-Substrate," Proceedings of International Reliability Physics Symposium (IRPS), June 2014.

[48] M. Ueno, M. Hashimoto, and T. Onoye, "Trace-Based Fault Localization with Supply Voltage Sensor," ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), March 2014.

[49] C.Siriteanu, A.Takemura, S.D. Blostein, S.Kuriki, and H.Shin, "Convergence Analysis of Performance-Measure Expressions for Mimo Zf under Rician Fading," Australian Communications Theory Workshop, AUSCTW'14, Sydney, Australia, 114-119 , February 2014.

[50] Masahiro Ando, Yuichi Itoh, Toshiki Hosoi, Kazuki Takashima, Kosuke Nakajima, and Yoshifumi Kitamura, "Stackblock: Block-Shaped Interface for Flexible Stacking," In Proc. of UIST, pages 41-42, 2014.

[51] Hiroaki Konoura, Dawood Alnajjar, Yukio Mitsuyama, Hiroyuki Ochi, Takashi Imagawa, Shinichi Noda, Kazutoshi Wakabayashi, Masanori Hashimoto, and Takao Onoye, "Mixed-Grained Reconfigurable Architecture Supporting Flexible Reliability and C-Based Design," In ReConFig, December 2013.

[52] J. Kono, M. Hashimoto, and T. Onoye, "Feasibility Evaluation of Near-Field Communication in Clay with 1-Mm^3 Antenna," Proceedings of Asia-Pacific Microwave Conference (APMC), pages 1121--1123, November 2013.

[53] R. Harada, M. Hashimoto, and T. Onoye, "Nbti Characterization Using Pulse-Width Modulation," IEEE/ACM Workshop on Variability Modeling and Characterization, November 2013.

[54] D. Alnajjar, H. Konoura, Y. Mitsuyama, H. Shimada, K. Kobayashi, H. Kanbara, H. Ochi, T. Imagawa, S. Noda, K. Wakabayashi, M. Hashimoto, T. Onoye, and H. Onodera, "Reliability-Configurable Mixed-Grained Reconfigurable Array Supporting C-To-Array Mapping and Its Radiation Testing," In Proceedings of IEEE Asian Solid-State Circuits Conference (A-SSCC), pages 313-316, November 2013.

[55] Kosuke Nakajima, Yuichi Itoh, Yusuke Hayashi, Kazuaki Ikeda, Kazuyuki Fujita, and Takao Onoye, "Emoballoon: a Balloon-Shaped Interface Recognizing Social Touch Interactions," In Proceedings of 10th International Conference on Advances in Computer Entertainment Technology, pages 182-197, November 2013.

[56] S. Iizuka, M. Mizuno, D. Kuroda, M. Hashimoto, and T. Onoye, "Stochastic Error Rate Estimation for Adaptive Speed Control with Field Delay Testing," In Proc. International Conference on Computer-Aided Design (ICCAD), pages 107-114, November 2013.

[57] T. Amaki, M. Hashimoto, and T. Onoye, "A Process and Temperature Tolerant Oscillator-Based True Random Number Generator with Dynamic 0/1 Bias Correction," In Proceedings of Asian Solid-State Circuits Conference (A-SSCC), pages 133-136, November 2013.

[58] M. Hashimoto, "Soft Error Immunity of Subthreshold Sram (Invited)," Proceedings of IEEE International Conference on ASIC, pages 91--94, October 2013.

[59] Simon Voelker, Kosuke Nakajima, Christian Thoresen, Yuichi Itoh, Kjell Ivar Øvergård, and Jan Borchers, "Pucs Demo: Detecting Transparent, Passive Untouched Capacitive Widgets," In Proceedings of the 2013 ACM International Conference on Interactive Tabletops and Surfaces, pages 325-328, October 2013.

[60] Simon Voelker, Kosuke Nakajima, Christian Thoresen, Yuichi Itoh, Kjell Ivar Øvergård, and Jan Borchers, "Pucs: Detecting Transparent, Passive Untouched Capacitive Widgets on UnmodifiEd Multi-Touch Displays," In Adjunct Publication of the 26th Annual ACM Symposium on User Interface Software and Technology, pages 1-2, October 2013.

[61] Simon Voelker, Kosuke Nakajima, Christian Thoresen, Yuichi Itoh, Kjell Ivar Øvergård, and Jan Borchers, "Pucs: Detecting Transparent, Passive Untouched Capacitive Widgets on UnmodifiEd Multi-Touch Displays," In Proceedings of the 2013 ACM International Conference on Interactive Tabletops and Surfaces, pages 101-104, October 2013.

[62] Y.Fukuhara, A.Yamada, and T.Onoye, "An Image Compression Method for Frame Memory Size Reduction Using Local Feature of Images," In The 18th Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2013), pages 288-289, October 2013.

[63] T. Uemura, T. Kato, H. Matsuyama, and M. Hashimoto, "Mitigating Multi-Cell-Upset with Well-Slits in 28nm Multi-Bit-Latch," IEEE Nuclear and Space Radiation Effects Conference (NSREC), July 2013.

[64] T. Uemura, T. Kato, H. Matsuyama, and M. Hashimoto, "Scaling Trend of Sram and Ff of Soft-Error Rate and Their Contribution to Processor Reliability on Bulk Cmos Technology," IEEE Nuclear and Space Radiation Effects Conference (NSREC), July 2013.

[65] T. Uemura, T. Kato, H. Matsuyama, and M. Hashimoto, "Soft-Error in Sram at Ultra Low Voltage and Impact of Secondary Proton in Terrestrial Environment," IEEE Nuclear and Space Radiation Effects Conference (NSREC), July 2013.

[66] Yohei Kojima, Kazuma Aoyama, Yuichi Itoh, Kazuyuki Fujita, Taku Fujimoto, and Kosuke Nakajima, "Polka Dot: the Garden of Water Spirits," In ACM SIGGRAPH 2013 Posters, July 2013.

[67] T. Shinada, M. Hashimoto, and T. Onoye, "Proximity Distance Estimation Based on Capacitive Coupling between 1mm^3 Sensor Nodes," Proceedings of International NEWCAS Conference, June 2013.

[68] M. Ueno, M. Hashimoto, and T. Onoye, "Real-Time Supply Voltage Sensor for Detecting/Debugging Electrical Timing Failures," Proceedings of Reconfigurable Architectures Workshop (RAW), pages 301--305, May 2013.

[69] Y. Higuchi, K. Shinkai, M. Hashimoto, R. Rao, and S. Nassif, "Extracting Device-Parameter Variations Using a Single Sensitivity-Configurable Ring Oscillator," Proceedings of IEEE European Test Symposium (ETS), pages 106--111, May 2013.

[70] M. Hashimoto, "Robust Subthreshold Circuit Design to Manufacturing and Environmental Variability (Invited)," China Semiconductor Technology International Conference (CSTIC), pages 1079--1084, March 2013.

[71] Kazuyuki Fujita, Yuichi Itoh, Kazuki Takashima, Kosuke Nakajima, Yusuke Hayashi, and Fumio Kishino, "Ambient Party Room: a Room-Shaped System Enhancing Communication for Parties Or Gatherings," In Proceedings of the 2nd International Workshop on Ambient Information Technologies, pages 1-4, March 2013.

[72] Kosuke Nakajima, Yuichi Itoh, Yusuke Hayashi, Kazuaki Ikeda, Kazuyuki Fujita, and Takao Onoye, "Emoballoon: a Balloon-Shaped Interface Recognizing Social Touch Interactions," In Proceedings of the 2nd International Workshop on Ambient Information Technologies, pages 13-16, March 2013.

[73] Yohei Kojima, Yuichi Itoh, Taku Fujimoto, and Kosuke Nakajima, "Polka Dot – the Garden of Water Spirits," In SIGGRAPH Asia 2013 Emerging Technologies, page 15, 2013. [2.pdf]

[74] Jin Kono, Masanori Hashimoto, Takao Onoye, "Feasibility Evaluation of Near-Field Communication in Clay with 1-Mm3 Antenna," Microwave Conference Proceedings (APMC), 2013 Asia-Pacific, pages 1121-1123, 2013.

[75] D. Alnajjar, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Static Voltage Over-Scaling and Dynamic Voltage Variation Tolerance with Replica Circuits and Time Redundancy in Reconfigurable Devices," Proceedings of International Conference on ReConFigurable Computing and FPGAs (ReConFig), December 2012.

[76] Kazutaka Takeuchi, Ryusuke Miyamoto, and Takao Onoye, "High-Speed Multiview Video Decoding for Embedded System," In The First Asian Conference on Information Systems, ACIS 2012, December 2012.

[77] Yuya Iwasaki, Masahide Hatanaka, and Takao Onoye, "Performance Improvement of Channel Estimation for Ofdm Baseband Transceiver with Dynamic Subcarrier Selection," In The First Asian Conference on Information Systems,ACIS 2012, December 2012.

[78] I. Homjakovs, M. Hashimoto, T. Hirose, and T. Onoye, "Signal-Dependent Analog-To-Digital Converter Based on Minimax Sampling," Proceedings of International SoC Design Conference (ISOCC), 120 -- 123 , November 2012.

[79] Kazuki Takashima, Yusuke Hayashi, Kosuke Nakajima, and Yuichi Itoh, "Cup-Embedded Information Device for Supporting Interpersonal Communication," In Proceedings of Joint Virtual Reality Conference of ICAT, EGVE and EuroVR, pages 19-20, October 2012. [2.pdf]

[80] R. Harada, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Impact of Nbti-­Induced Pulse-Width Modulation on Set Pulse-Width Measurement," Proceedings of European Conference on Radiation and Its Effects on Components and Systems (RADECS), September 2012.

[81] T. Kameda, H. Konoura, D. Alnajjar, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "A Predictive Delay Fault Avoidance Scheme for Coarse-Grained Reconfigurable Architecture," Proceedings of International Conference on Field Programmable Logic and Applications (FPL) , August 2012.

[82] Kosuke Nakajima, Yuichi Itoh, Yusuke Hayashi, Kazuaki Ikeda, Kazuyuki Fujita, and Takao Onoye, "Emoballoon," In Proceedings of The 10th Asia Pacific Conference on Computer Human Interaction (APCHI2012), volume 2, pages 681-682, August 2012. [2.pdf]

[83] Ryusuke Endo, Yuichi Itoh, Kosuke Nakajima, Kazuyuki Fujita, and Fumio Kishino, "Planning-Capable Digital Signage System Using Multi-Touch Display," In Proceedings of The 10th Asia Pacific Conference on Computer Human Interaction (APCHI2012), volume 2, pages 545-554, August 2012. [2.pdf]

[84] R. Harada, S. Abe, H. Fuketa, T. Uemura, M. Hashimoto, and Y. Watanabe, "Angular Dependency of Neutron Induced Multiple Cell Upsets in 65-Nm 10t Subthreshold Sram," IEEE Nuclear and Space Radiation Effects Conference, July 2012.

[85] R. Harada, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Set Pulse-Width Measurement Eliminating Pulse-Width Modulation and Within-Die Process Variation Effects," Proceedings of International Reliability Physics Symposium (IRPS), April 2012.

[86] K. Watanabe, G. Fujita, T. Homemoto, and R. Hashimoto, "A High-Speed H.264/AVC CABAC Decoder for 4K Video Utilizing Residual Data Accelerator," The 17th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2012), pages 6-10, March 2012.

[87] H. Shigeta, J. Nakase, Y. Tsunematsu, K. Kiyokawa, M. Hatanaka, K. Hosoda, M. Okada, Y. Ishihara, F. Ooshita, H. Kakugawa, S. Kurihara, and K. Moriyama, "Implementation of a Smart Office System in an Ambient Environment," In The 1st International Workshop on Ambient Information Technologies (AMBIT-2012), Orange County, CA, USA, March 2012.

[88] K. Kiyokawa, M. Hatanaka, K. Hosoda, M. Okada, H. Shigeta, Y. Ishihara, F. Ooshita, H. Kakugawa, S. Kurihara, and K. Moriyama, "Owens Luis - a Context-Aware Multi-Modal Smart Office Chair in an Ambient Environment," In The 1st International Workshop on Ambient Information Technologies (AMBIT-2012), Orange County, CA, USA, March 2012.

[89] Kazuyuki Fujita, Yuichi Itoh, Hiroyuki Ohsaki, Naoaki Ono, Keiichiro Kagawa, Kazuki Takashima, Sho Tsugawa, and Kosuke Nakajima, "Ambient Suite: Room- Shaped Information Environment for Interpersonal Communication," In Proceedings of the 1st International Workshop on Ambient Information Technologies, pages 18-21, March 2012.

[90] Kosuke Nakajima, Yuichi Itoh, Takayuki Tsukitani, Kazuyuki Fujita, Kazuki Takashima, Yoshifumi Kitamura, and Fumio Kishino, "Fusa2 Touch Display: Furry and Scalable Multi-Touch Display," In Proceedings of The 1st International Workshop on Ambient Information Technologies, pages 35-36, March 2012. [2.pdf]

[91] Yusuke Hayashi, Yuichi Itoh, Kazuki Takashima, Kazuyuki Fujita, Kosuke Nakajima, Ikuo Daibo, and Takao Onoye, "Cup-Le: a Cup-Shaped Device for Conversational Experiment," In Proceedings of the 1st International Workshop on Ambient Information Technologies, pages 36-37, March 2012.

[92] S. Kimura, M. Hashimoto, and T. Onoye, "Body Bias Clustering for Low Test-Cost Post-Silicon Tuning," In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pages 283--289, February 2012.

[93] Takashi Nakamae, Akihisa Yamada, Masayuki Yamaguchi, and Takao Onoye, "A Near-Lossless Image Compression Method Using Adaptive Variable Length Coding," In International Conference on Embedded Systems and Intelligent Technology, January 2012.

[94] K. Kiyokawa, M. Hatanaka, K. Hosoda, M. Okada, H. Shigeta, Y. Ishihara, F. Ooshita, H. Kakugawa, S. Kurihara, and K. Moriyama, "Owens Luis - a Proposal of a Smart Office Chair in an Ambient Environment," In The 21st International Conference on Artificial Reality and Telexistence (ICAT 2011), Osaka, Japan, November 2011.

[95] Kazuyuki Fujita, Yuichi Itoh, Hiroyuki Ohsaki, Naoaki Ono, Keiichiro Kagawa, Kazuki Takashima, Sho Tsugawa, Kosuke Nakajima, Yusuke Hayashi, and Fumio Kishino, "Ambient Suite: Enhancing Communication among Multiple Participants," In Proceedings of the International Conference on Advances in Computer Entertainment Technology , 25:1-25:8, November 2011. [2.pdf]

[96] Kosuke Nakajima, Yuichi Itoh, Takayuki Tsukitani, Kazuyuki Fujita, Kazuki Takashima, Yoshifumi Kitamura, and Fumio Kishino, "Fusa2 Touch Display," In Proceedings of ACM International Conference on Interactive Tabletops and Surfaces 2011, November 2011.

[97] Kosuke Nakajima, Yuichi Itoh, Takayuki Tsukitani, Kazuyuki Fujita, Kazuki Takashima, Yoshifumi Kitamura, and Fumio Kishino, "Fusa2 Touch Display: Furry and Scalable Multi-Touch Display," In Proceedings of ACM International Conference on Interactive Tabletops and Surfaces 2011, pages 35-44, November 2011. [2.pdf]

[98] H. Konoura, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Implications of Reliability Enhancement Achieved by Fault Avoidance on Dynamically Reconfigurable Architectures," In Proc. 21st International Conference on Field Programmable Logic and Applications (FPL2011), Chania, Crete, Greece, pages 189-194, September 2011.

[99] Toshihiro Kameda, Hiroaki Konoura, Yukio Mitsuyama, Masanori Hashimoto, and Takao Onoye, "Nbti Mitigation by Giving Random Scan-In Vectors During Standby Mode," In PATMOS2011, September 2011.

[100] Y. Takai, M. Hashimoto, and T. Onoye, "Power Gating Implementation for Noise Mitigation with Body-Tied Triple-Well Structure," In Proceedings of IEEE Custom Integrated Circuits Conference (CICC), September 2011.

[101] I. Homjakovs, M. Hashimoto, T. Hirose, and T. Onoye, "Signal-Dependent Analog-To-Digital Conversion Based on Minimax Sampling," In Proceedings of International Midwest Symposium on Circuits and Systems (MWSCAS), August 2011.

[102] M. Hashimoto and H. Fuketa, "Adaptive Performance Compensation with On-Chip Variation Monitoring (Invited)," In Proceedings of International Midwest Symposium on Circuits and Systems (MWSCAS), August 2011.

[103] M. Okada, T. Onoye, and W. Kobayashi, "A Ray Tracing Simulation of Sound Diffraction Based on Analytic Secondary Source Model," In 19th European Signal Processing Conference (EUSIPCO-2011), Barcelona, Spain, pages 1653-1657, August 2011.

[104] T. Amaki, M. Hashimoto, and T. Onoye, "An Oscillator-Based True Random Number Generator with Jitter Amplifier," In Proc. IEEE International Symposium on Circuits and Systems (ISCAS 2011), pages 725-728, May 2011.

[105] R. Harada, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Neutron Induced Single Event Multiple Transients with Voltage Scaling and Body Biasing," In Proc. International Reliability Physics Symposium (IRPS), April 2011.

[106] S. Kimura, M. Hashimoto, and T. Onoye, "Body Bias Clustering for Low Test-Cost Post-Silicon Tuning," In ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), pages 46--51, April 2011.

[107] D. Alnajjar, H. Kounoura, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Mttf Measurement under Alpha Particle Radiation in a Coarse-Grained Reconfigurable Architecture with Flexible Reliability," In IEEE Workshop on Silicon Errors in Logic - System Effects, March 2011.

[108] K. Shinkai, M. Hashimoto, and T. Onoye, "Extracting Device-Parameter Variations with Ro-Based Sensors," In ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), pages 13--18, March 2011.

[109] Tatsuo Maeno, Hiroshi Tsutsui, and Takao Onoye, "Hardware Implementation of Real-Time Motion Adaptive Deinterlacing Based on Inpainting," In International Conference on Embedded Systems and Intelligent Technology, February 2011.

[110] K. Shinkai and M. Hashimoto, "Device-Parameter Estimation with On-Chip Variation Sensors Considering Random Variability," In Proceedings of IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), pages 683-688, January 2011. [2.pdf]

[111] M. Hashimoto, "Run-Time Adaptive Performance Compensation Using On-Chip Sensors (Invited)," In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pages 285--290, January 2011.

[112] T. Amaki, M. Hashimoto, and T. Onoye, "Jitter Amplifier for Oscillator-Based True Random Number Generator," In Proc. Asia and South Pacific Design Automation Conference (ASP-DAC 2011), pages 81-82, January 2011.

[113] T. Amaki, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "A Design Procedure for Oscillator-Based Hardware Random Number Generator with Stochastic Behavior Modeling," In Proc. International Workshop on Information Security Applications (WISA 2010), pages 107-121, January 2011.

[114] M. Hatanaka, R. Hashimoto, T. Tatsuka, T. Onoye, H. Hatamoto, S. Ibi, S. Miyamoto, and S. Sampei, "VLSI Design of OFDM Baseband Transceiver with Dynamic Spectrum Access," In Proc. of the 18th International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS2010), pages 329-332, December 2010.

[115] Y. Takai, M. Hashimoto, and T. Onoye, "Evaluation of Power Gating Structures Focusing on Power Supply Noise with Measurement and Simulation," In Proceedings of IEEE Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS), pages 213--216, October 2010.

[116] Hideyuki Nakamura, Hiroshi Tsutsui, and Takao Onoye, "Motion-Compensated Frame Interpolation Using Feature Tracking and Motion Segmentation," In International Workshop on Smart Info-Media Systems in Asia, September 2010.

[117] T. Okumura and M. Hashimoto, "Setup Time, Hold Time and Clock-To-Q Delay Computation under Dynamic Supply Noise," In Proceedings of IEEE Custom Integrated Circuits Conference (CICC), September 2010.

[118] L. M. Handaya, M. Okada, T. Onoye, and W. Kobayashi, "Improvement of Frontal Localization with Complement of Multiple Delayed Sounds," 2010 International Workshop on Information Communication Technology, August 2010.

[119] K. Shinkai and M. Hashimoto, "Self-Heating in Nano-Scale Vlsi Interconnects," In Proceedings of International Workshop on Information Communication Technology (ICT), S-1-6, August 2010. [2.pdf]

[120] H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "Alpha-Particle-Induced Soft Errors and Multiple Cell Upsets in 65-Nm 10t Subthreshold Sram," In Proceedings of International Reliability Physics Symposium (IRPS), pages 213--217, May 2010.

[121] S. Abe, K. Shinkai, M. Hashimoto, and T. Onoye, "Clock Skew Reduction by Self-Compensating Manufacturing Variability with On-Chip Sensors," In Proc. Great Lakes Symposium on VLSI (GLSVLSI), May 2010.

[122] Y. Takai, Y. Ogasahara, M. Hashimoto, and T. Onoye, "Measurement of On-Chip I/O Power Supply Noise and Correlation Verification between Noise Magnitude and Delay Increase Due to Sso," In Proceedings of IEEE Workshop on Signal Propagation on Interconnects (SPI), pages 19--20, May 2010.

[123] D. Kuroda, H. Fuketa, M. Hashimoto, and T. Onoye, "A 16-Bit Risc Processor with 4.18pj/Cycle at 0.5v Operation," In Proceedings of IEEE COOL Chips, page 190, April 2010.

[124] H. Konoura, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Comparative Study on Delay Degrading Estimation Due to Nbti with Circuit/Instance/Transistor-Level Stress Probability Consideration," In Proc. International Symposium on Quality Electronic Design (ISQED), pages 646-651, March 2010.

[125] R. Harada, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Measurement Circuits for Acquiring SET Pulse Width Distribution with Sub-FO1-inverter-delay Resolution," In Proc. International Symposium on Quality Electronic Design (ISQED), March 2010. [2.pdf]

[126] S. Abe, K. Shinkai, M. Hashimoto, and T. Onoye, "Clock Skew Reduction by Self-Compensating Manufacturing Variability with On-Chip Sensors," In Proc. International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), March 2010.

[127] T. Enami, S. Ninomiya, K. Shinkai, S. Abe, and M. Hashimoto, "Statistical Timing Analysis Considering Clock Jitter and Skew Due to Power Supply Noise and Process Variation," In Proc. International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), pages 41-46, March 2010.

[128] Yuki Kawamura, Yasutake Manabe, Takao Onoye, Kazuto Ohara, Hiroyuki Okada, and Ikuo Keshi, "Implementation of Simultaneous Video Decoding on Multicore Processor," In Proc. of International Symposium on Communications, Control and Signal Processing (ISCCSP 2010), March 2010.

[129] H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "Adaptive Performance Control with Embedded Timing Error Predictive Sensors for Subthreshold Circuits," In Proc. Asia and South Pacific Design Automation Conference (ASP-DAC), pages 361-362, January 2010.

[130] T. Okumura, F. Minami, K. Shimazaki, K. Kuwada, and M. Hashimoto, "Gate Delay Estimation in Sta under Dynamic Power Supply Noise," In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), 775 -- 780, January 2010.

[131] D. Alnajjar, Y. Ko, T. Imagawa, M. Hiromoto, Y. Mitsuyama, M. Hashimoto, H. Ochi, and T. Onoye, "Soft Error Resilient Vlsi Architecture for Signal Processing," In Proceedings of IEEE International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), pages 183--186, December 2009.

[132] Koichi Hattori, Hiroshi Tsutsui, Hiroyuki Ochi, and Yukihiro Nakamura, "A High-Throughput Pipelined Architecture for JPEG XR Encoding," In Proc. of 7th IEEE Workshop on Embedded Systems for Real-Time Multimedia (ESTIMedia2009) , pages 9-17, October 2009.

[133] H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "Adaptive Performance Compensation with In-Situ Timing Error Prediction for Subthreshold Circuits," In Proc. IEEE Custom Integrated Circuits Conference, pages 215-218, September 2009.

[134] R. Hashimoto, T. Tatsuka, M. Hatanaka, T. Onoye, H. Hatamoto, S. Ibi, S. Miyamoto, and S. Sampei, "Implementation of Ofdm Baseband Transceiver with Dynamic Spectrum Access for Cognitive Radio Systems," In Proc. of 9th International Symposium on Communication and Information Technology (ISCIT2009), pages 658-663, September 2009.

[135] S. Ninomiya and M. Hashimoto, "Enhancement of Grid-Based Spatially-Correlated Variability Modeling for Improving Ssta Accuracy," In Proceedings of IEEE International SOC Conference (SOCC), pages 337--340, September 2009.

[136] D. Alnajjar, Y. Ko, T. Imagawa, H. Konoura, M. Hiromoto, Y. Mitsuyama, M. Hashimoto, H. Ochi, and T. Onoye, "Coarse-Grained Dynamically Reconfigurable Architecture with Flexible Reliability," In Proceedings of International Conference on Field Programmable Logic and Applications (FPL), pages 186--192, August 2009.

[137] K. Hamamoto, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "Tuning-Friendly Body Bias Clustering for Compensating Random Variability in Subthreshold Circuits," In Proceedings of IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), pages 51--56, August 2009.

[138] Masayuki Hiromoto, Hiroshi Tsutsui, Hiroyuki Ochi, Tomoyuki Osano, Norihiro Ishikawa, and Yukihiro Nakamura, "Dynamic Rate Control for Media Streaming in High-Speed Mobile Networks," In Proc. of IEEE Wireless Communications and Networking Conference (WCNC 2009), April 2009.

[139] D. Alnajjar, Y. Ko, T. Imagawa, M. Hiromoto, Y. Mitsuyama, M. Hashimoto, H. Ochi, and T. Onoye, "A Coarse-Grained Dynamically Reconfigurable Architecture Enabling Flexible Reliability," In Proceedings of IEEE Workshop on System Effects of Logic Soft Errors (SELSE), March 2009.

[140] M. Okada, N. Iwanaga, T. Matsumura, T. Onoye, and W. Kobayashi, "An Embedded Sound Localization System for Multiple Sources by Fuzzy Clustering with Spatial Constraints," In 2009 International Workshop on Nonlinear Circuits and Signal Processing (NCSP '09), Waikiki, Hawaii, pages 257-260, March 2009.

[141] S. Watanabe, M. Hashimoto, and T. Sato, "A Case for Exploiting Complex Arithmetic Circuits Towards Performance Yield Enhancement," In Proceedings of International Symposium on Quality Electronic Design (ISQED), pages 401--407, March 2009.

[142] Y. Ko, D. Alnajjar, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Coarse-Grained Dynamically Reconfigurable Architecture with Flexible Reliability," In Proceedings of Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI), pages 236--241, March 2009.

[143] K. Shinkai and M. Hashimoto, "A Gate Delay Model Focusing on Current Fluctuation Over Wide-Range of Process and Environmental Variability," In Proc. International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), pages 79-84, February 2009. [2.pdf]

[144] H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "Trade-Off Analysis between Timing Error Rate and Power Dissipation for Adaptive Speed Control with Timing Error Prediction," In Proc. Asia and South Pacific Design Automation Conference (ASP-DAC), pages 266-271, January 2009.

[145] L. Zhang, Y. Zhang, A. Tsuchiya, M. Hashimoto, E. Kuh, and C-K Cheng, "High Performance On-Chip Differential Signaling Using Passive Compensation for Global Communication," In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pages 385--390, January 2009.

[146] M. Okada, N. Iwanaga, T. Matsumura, T. Onoye, and W. Kobayashi, "A 3D Sound Localization Method for Multiple Sound Sources Based on Fuzzy Clustering," In 2008 International Workshop on Smart Info-Media Systems in Bangkok (SISB 2008), pages 133-138, December 2008.

[147] H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "Vth Variation Modeling and Its Validation with Ring Oscillation Frequencies for Body-Biased Circuits and Subthreshold Circuits," In ICCAD Colocated Workshop on Test Structure Design for Variability Characterization, November 2008.

[148] Koichi Hattori, Hiroshi Tsutsui, Hiroyuki Ochi, and Yukihiro Nakamura, "An Architecture of Photo Core Transform in HD Photo Coding System for Embedded Systems of Various Bandwidths," In Proc. of 2008 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS2008), pages 1592-1595, November 2008.

[149] T. Enami, M. Hashimoto, and T. Sato, "Decoupling Capacitance Allocation for Timing with Statistical Noise Model and Timing Analysis," In Proc. IEEE/ACM International Conference on Computer-Aided Design, pages 420-425, November 2008.

[150] Y. Ogasahara, M. Hashimoto, T. Kanamoto, and T. Onoye, "Measurement of Supply Noise Suppression by Substrate and Deep N-Well in 90nm Process," In Proceedings of IEEE Asian Solid-State Circuits Conference (A-SSCC), pages 397--400, November 2008.

[151] Y. Zhang, L. Zhang, A. Tsuchiya, M. Hashimoto, and C.-K. Cheng, "On-Chip High Performance Signaling Using Passive Compensation," In Proceedings of IEEE International Conference on Computer Design (ICCD), pages 182-187, October 2008.

[152] H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "Correlation Verification between Transistor Variability Model with Body Biasing and Ring Oscillation Frequency in 90nm Subthreshold Circuits," In Proc. IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), pages 3-8, August 2008.

[153] S. Takahashi, S. Tsukiyama, M. Hashimoto, and I. Shirakawa, "A Design Method of Finding Optimal Sampling Pulse and Transistor Size in a Sampling Circuit for Liquid Crystal Displays," In In Proceedings of International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), June 2008.

[154] S. Watanabe, M. Hashimoto, and T. Sato, "Cascading Dependent Operations for Mitigating Timing Variability," In Proceedings. of Workshop on Quality-Aware Design (W-QUAD), June 2008.

[155] K. Hamamoto, H. Fuketa, M. Hashimoto, Y. Mitsuyama, and T. Onoye, "Experimental Study on Body-Biasing Layout Style - Negligible Area Overhead Enables Sufficient Speed Controllability -," In ACM Great Lakes Symposium on VLSI, pages 387-390, May 2008.

[156] T. Enami, S. Ninomiya, and M. Hashimoto, "Statistical Timing Analysis Considering Spatially and Temporally Correlated Dynamic Power Supply Noise," In Proc. ACM International Symposium on Physical Design, pages 160-167, April 2008. [1.txt]

[157] H. Okuhata, K. Takahashi, Y. Nozato, T. Onoye, and I. Shirakawa, "Video Image Enhancement Scheme for High Resolution Consumer Devices," In Proc. of International Symposium on Communications, Control and Signal Processing (ISCCSP2008), pages 639-644, March 2008.

[158] S. Abe, M. Hashimoto, and T. Onoye, "Clock Skew Evaluation Considering Manufacturing Variability in Mesh-Style Clock Distribution," In Proc. International Symposium on Quality Electronic Design (ISQED), pages 520-525, March 2008.

[159] L. Zhang, J. Liu, H. Zhu, C-K Cheng, and M. Hashimoto, "High Performance Current-Mode Differential Logic," In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pages 720--725, January 2008.

[160] Y. Ogasahara, M. Hashimoto, and T. Onoye, "Dynamic Supply Noise Measurement Circuit Composed of Standard Cells Suitable for In-Site Soc Power Integrity Verification," In Proc. IEEE/ACM Asia and South Pacific Design Automation Conference, pages 107-108, January 2008.

[161] R. Hashimoto, K. Kato, G. Fujta, and T. Onoye, "VLSI Architecture of H.264 RDO-BASED Block Size Decision for 1080 HD," In Proc. PCS, November 2007.

[162] R. Hashimoto, T. Matsumura, Y. Nozato, K. Watanabe, and T. Onoye, "Implementation of Object Attention Based on Multi-Agent Attractor Selection," In Proc. SISB, November 2007.

[163] Yasutake Manabe, Junichi Hara, and Takao Onoye, "Jpm-Based Differential Image Storage Scheme for Image Revision Management System," In IIEEJ Image Electronics and Visual Computing Workshop 2007, November 2007.

[164] K. Takahashi, Y. Nozato, H. Okuhata, and T. Onoye, "VLSI Architecture for Real-Time Retinex Video Image Enhancement," In Proc. Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI 2007), pages 81--86, October 2007.

[165] K.Hamamoto, H.Fuketa, M.Hashimoto, Y.Mitsuyama, and T.Onoye, "A Study on Body-Biasing Layout Style Focusing on Area Efficiency and Speed Controllability," In Proc. Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI 2007), pages 233-237, October 2007.

[166] M. Hashimoto, J. Siriporn, A. Tsuchiya, H. Zhu, and C.-K. Cheng, "Analytical Eye-Diagram Model for On-Chip Distortionless Transmission Lines and Its Application to Design Space Exploration," In Proc. IEEE Custom Integrated Circuits Conference, pages 869-872, September 2007.

[167] T. Kanamoto, Y. Ogasahara, K. Natsume, K. Yamaguchi, H. Amishiro, T. Watanabe, and M. Hashimoto, "Impact of Well Edge Proximity Effect on Timing," In Proc. IEEE European Solid-State Device Research Conference, pages 115-118, September 2007.

[168] Y. Ogasahara, M. Hashimoto, and T. Onoye, "Dynamic Supply Noise Measurement with All Digital Gated Oscillator for Evaluating Decoupling Capacitance Effect," In Proc. IEEE Custom Integrated Circuits Conference, pages 783-786, September 2007.

[169] Mohd Nadzrul Bin Mohd Nor, T. Matsumura, and T. Onoye, "Direction of Arrival Estimation Improvement of Speech on a Two-Microphone Array," In IASTED International Conference on Signal and Image Processing, pages 576-115, August 2007.

[170] K. Shinkai, M. Hashimoto, and T. Onoye, "Future Prediction of Self-Heating in Short Intra-Block Wires," In Proc. International Symposium on Quality Electronic Design (ISQED), pages 660-665, March 2007.

[171] K. Watanabe, M. Ise, T. Onoye, H. Niwamoto, and I. Keshi, "An Energy-Efficient Architecture of Wireless Home Network Based on Mac Broadcast and Transmission Power Control," In International Conference on Consumer Electronics Digest of Technical Papers, P1-20, January 2007.

[172] R. Hashimoto, K. Kato, G. Fujta, and T. Onoye, "VLSI Architecture of H.264 Block Size Decision Based on Rate-Distortion Optimization," In Proc. ISPACS, pages 618--621, December 2006.

[173] K. Shinkai, M. Hashimoto, A. Kurokawa, and T. Onoye, "A Gate Delay Model Focusing on Current Fluctuation Over Wide-Range of Process and Environmental Variability," In Proc. International Conference on Computer-Aided Design (ICCAD), pages 47-53, November 2006.

[174] Y. Ogasahara, M. Hashimoto, and T. Onoye, "Quantitative Prediction of On-Chip Capacitive and Inductive Crosstalk Noise and Discussion on Wire Cross-Sectional Area Toward Inductive Crosstalk Free Interconnects," Proc. IEEE International Conference on Computer Design, pages 70--75, October 2006.

[175] J. Ashida, R. Miyamoto, H. Tsutsui, T. Onoye, and Y. Nakamura, "Probabilistic Pedestrian Tracking Based on a Skeleton Model," In Proc. International Conference on Image Processing, pages 2825--2828, October 2006.

[176] Y. Ogasahara, M. Hashimoto, and T. Onoye, "Measurement of Inductive Coupling Effect on Timing in 90nm Global Interconnects," In Proc. IEEE Custom Integrated Circuits Conference, pages 721--724, September 2006.

[177] Y. Ogasahara, T. Enami, M. Hashimoto, T. Sato, and T. Onoye, "Measurement Results of Delay Degradation Due to Power Supply Noise Well Correlated with Full-Chip Simulation," In Proc.~IEEE Custom Integrated Circuits Conference, pages 861--864, September 2006.

[178] A. Kosaka and T. Onoye, "Pipeline Processing of Continuous Speech Recognition Algorithm for Embedded System Implementation," In Proc. International Technical Conference on Circuits/Systems, Computers and Communication, volume Ⅱ, pages 373--376, July 2006.

[179] F. Hyuga, T. Masuzaki, H. Tsutsui, T. Onoye, and Y. Nakamura, "A JPEG Coding Scheme for High Fidelity Images by Halftoning Less Signification Extra Bits," In Proc. International Technical Conference on Circuits/Systems, Computers and Communication, volume Ⅲ, pages 97--100, July 2006.

[180] T. Ijichi, M. Hashimoto, S. Takahashi, S. Tsukiyama, and I. Shirakawa, "Transistor Sizing of Lcd Driver Circuit for Technology Migration," In Proceedings of International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), volume 1, I25--I28, July 2006.

[181] H. Sugano, H. Tsutsui, T. Masuzaki, T. Onoye, H. Ochi, and Y. Nakamura, "Efficient Memory Architecture for JPEG2000 Entropy Codec," In Proc. International Symposium on Circuits and Systems, pages 2881--2884, May 2006.

[182] K. Tsujino, W. Kobayashi, T. Onoye, and Y. Nakamura, "Automated Design of Digital Filters for 3-D Sound Localization in Embedded Applications," In Proc. International Conf. Audio, Speech, and Signal Processing (ICASSP2006), V.349--V.352, May 2006.

[183] T. Kanamoto, T. Ikeda, A. Tsuchiya, H. Onodera, and M. Hashimoto, "Si-Substrate Modeling Toward Substrate-Aware Interconnect Resistance and Inductance Extraction in Soc Design," In Proceedings of IEEE Wrokshop on Signal Propagation on Interconnects (SPI), pages 227--230, May 2006.

[184] A. Kotani, Y. Tanemura, Y. Mitsuyama, Y. Asai, Y. Nakamura, and T. Onoye, "Contour-Based Gravity Center Evaluation of Characters," In Proc. EUROMEDIA, pages 15--20, April 2006.

[185] Y. Mitsuyama, R. Imai, K. Takahashi, T. Onoye, and I. Shirakawa, "Domain-Specific Reconfigurable Architecture for Media Processing," In Proc. Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI 2006), pages 322--327, April 2006.

[186] K. Shinkai, M. Hashimoto, A. Kurokawa, and T. Onoye, "A Gate Delay Model Focusing on Current Fluctuation Over Wide-Range of Process and Environmental Variability," In Proc. International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), pages 59-64, February 2006.

[187] A. Tsuchiya, M. Hashimoto, and H. Onodera, "Interconnect Rl Extraction at a Single Representative Frequency," In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pages 515-520, January 2006.

[188] T. Kanamoto, T. Ikeda, A. Tsuchiya, H. Onodera, and M. Hashimoto, "Effective Si-Substrate Modeling for Frequency-Dependent Interconnect Resistance and Inductance Extraction," In The 3rd International Workshop on Compact Modeling, pages 51--56, January 2006.

[189] Z. Guo, Y. Nishikawa, R. Y. Omaki, T. Onoye, and I. Shirakawa, "A Low-Complexity FEC Assignment Scheme for Motion JPEG2000 Over Wireless Network," In International Conference on Consumer Electronics(ICCE2006), digest of technical papers, Las Vegas, Nevada, USA, pages 391--392, January 2006.

[190] S. Takahashi, A. Taji, S. Tsukiyama, M. Hashimoto, and I. Shirakawa, "A Design Scheme for Sampling Switch in Active Matrix LCD," In Proceedings of European Conference on Circuit Theory and Design, 3e-212, 2005.

[191] S. Takahashi, A. Taji, S. Tsukiyama, M. Hashimoto, and I. Shirakawa, "A Sampling Switch Design for Liquid Crystal Displays," In Proceedings of IEEE International Region 10 Conference, 1C-03.3, 2005.

[192] S. Takahashi, A. Taji, S. Tsukiyama, M. Hashimoto, and I. Shirakawa, "A Sampling Switch Design for Liquid Crystal Displays," In Proceedings of IEEE International Region 10 Conference, November 2005.

[193] T. Kouno, M. Hashimoto, and H. Onodera, "Input Capacitance Modeling of Logic Gates for Accurate Static Timing Analysis," In Proceedings of IEEE Asian Solid-State Circuits Conference (A-SSCC), pages 453-456, November 2005.

[194] 79-82, "Estimation of Maximum Oscillation Frequency for Cmos Lcvcos," In Estimation of Maximum Oscillation Frequency for CMOS LCVCOs, October 2005.

[195] M. Hashimoto, A. Tsuchiya, A. Shinmyo, and H. Onodera, "Performance Prediction of On-Chip High-Throughput Global Signaling," In Proceedings of IEEE 14th Topical Meeting on Electrical Performance of Electronic Packaging (EPEP), pages 79-82, October 2005.

[196] A. Tsuchiya, M. Hashimoto, and H. Onodera, "Design Guideline for Resistive Termination of On-Chip High-Speed Interconnects," In Proceedings of IEEE Custom Integrated Circuits Conference (CICC), pages 613-616, September 2005.

[197] Y. Ogasahara, M. Hashimoto, and T. Onoye, "Measurement and Analysis of Delay Variation Due to Inductive Coupling," In Proc. IEEE Custom Integrated Circuits Conference, pages 305--308, September 2005.

[198] S. Takahashi, A. Taji, S. Tsukiyama, M. Hashimoto, and I. Shirakawa, "A Design Scheme for Sampling Switch in Active Matrix Lcd," In A Design Scheme for Sampling Switch in Active Matrix LCD, August 2005.

[199] Huynh Van Nhat, T. Imanaka, G. Fujita, T. Onoye, and I. Shirakawa, "Real-Time Human Object Extraction for Mobile Terminal," In in Proc.The 20th Commemorative International Technical Conference on Circuits/Systems, Computers and Communications(ITC-CSCC2005), Jeju, Korea, volume 3, pages 1015-1016, July 2005.

[200] Y. Mitsuyama, R. Imai, K. Takahashi, T. Onoye, and I. Shirakawa, "An Approach for Area-Efficient Coarse-Grained Reconfigurable Architecture Dedicated to Media Processing," In Proc. International Technical Conference of Circuits/Systems, Computers and Communications (ITC-CSCC2005), pages 131--132, July 2005.

[201] A. Tsuchiya, M. Hashimoto, and H. Onodera, "Substrate Loss of On-Chip Transmission-Lines with Power/Ground Wires in Lower Layer," In Proceedings of IEEE Workshop on Signal Propagation on Interconnects (SPI), Proceedings of IEEE Workshop on Signal Propagation on Interconnects (SPI), May 2005.

[202] R. Miyamoto, H. Sugita, Y. Hayashi, H. Tsutsui, T. Masuzaki, T. Onoye, and Y. Nakamura, "High Quality Motion JPEG2000 Coding Scheme Based on the Human Visual System," In Proc. IEEE Int’l Symp. Circuits and Systems, pages 2096--2099, May 2005.

[203] T. Matsumura, N. Iwanaga, T. Onoye, W. Kobayashi, I. Shirakawa, and I. Arungsrisangchai, "3D Sound Movement System for Embedded Applications," In in Proc. IEEE International Symposium on Circuits and Systems (ISCAS2005), Kobe, Japan, pages 5345-5348, May 2005.

[204] A. Muramatsu, M. Hashimoto, and H. Onodera, "Effects of On-Chip Inductance on Power Distribution Grid," In Proceedings of International Symposium on Physical Design (ISPD), pages 63-69, April 2005.

[205] A. Tsuchiya, M. Hashimoto, and H. Onodera, "Effects of Orthogonal Power/Ground Wires on On-Chip Interconnect Characteristics," In Proceedings of International Meeting for Future of Electron Devices, Kansai, pages 33-34, April 2005.

[206] Y. Uchida, S. Tani, M. Hashimoto, S. Tsukiyama, and I. Shirakawa, "Interconnect Capacitance Extraction for System LCD Circuits," In in Proc. IEEE/ACM Great Lake Symposium on Very Large Scale Integrated circuits (GLSVLSI 2005), pages 160--163, April 2005.

[207] M. Hashimoto, T. Yamamoto, and H. Onodera, "Statistical Analysis of Clock Skew Variation in H-Tree Structure," In Proceedings of International Symposium on Quality Electronic Design (ISQED), pages 402-407, March 2005.

[208] A. Shinmyo, M. Hashimoto, and H. Onodera, "Design and Measurement of 6.4 Gbps 8:1 Multiplexer in 0.18um Cmos Process," In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), D9-D10, January 2005.

[209] A. Tsuchiya, M. Hashimoto, and H. Onodera, "Return Path Selection for Loop Rl Extraction," In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pages 1078-1081, January 2005.

[210] M. Hashimoto, J. Yamaguchi, T. Sato, and H. Onodera, "Timing Analysis Considering Temporal Supply Voltage Fluctuation," In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pages 1098-1101, January 2005.

[211] T. Matsumura, N. Iwanaga, W. Kobayashi, T. Onoye, and I. Shirakawa, "Embedded 3D Sound Movement System Based on Feature Extraction of Head-Related Transfer Function," In in Proc.~International Conference on Consumer Electronics (ICCE2005), digest of technical papers, Las Vegas, Nevada, USA, 7.1-2, January 2005.

[212] T. Sato, M. Hashimoto, and H. Onodera, "Successive Pad Assignment Algorithm to Optimize Number and Location of Power Supply Pad Using Incremental Matrix Inversion," In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pages 723-728, January 2005.

[213] T. Sato, N. Ono, J. Ichimiya, K. Hachiya, and M. Hashimoto, "On-Chip Thermal Gradient Analysis and Temperature Flattening for Soc Design," In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pages 1074-1077, January 2005.

[214] R. Miyamoto, Y. Hayashi, H. Tsutsui, T. Masuzaki, T. Onoye, and Y. Nakamura, "Video Quality Enhancement for Motion JPEG2000 Encoding Based on the Human Visual System," In Proc. IEEE Asia Pacific Conference on Circuits and Systems, pages 1161--1164, December 2004.

[215] K. Tsujino, W. Kobayashi, T. Izumi, T. Onoye, and Y. Nakamura, "Realtime Filter Redesign for Interactive 3-D Sound Systems," In Proc. IEEE Region 10 Conference, pages 124--127, November 2004.

[216] M. Hashimoto, A. Tsuchiya, A. Shinmyo, and H. Onodera, "Performance Prediction of On-Chip Global Signaling," In IEEE Electrical Design of Advanced Packaging and Systems (EDAPS) , pages 87-100, November 2004.

[217] M. Hashimoto, J. Yamaguchi, and H. Onodera, "Timing Analysis Considering Spatial Power/Ground Level Variation," In Proceedings of ACM/IEEE International Conference on Computer-Aided Design (ICCAD), pages 814-820, November 2004.

[218] N. Iwanaga, W. Kobayashi, K. Furuya, T. Onoye, and I. Shirakawa, "VLSI Implementation of 3D Sound Image Movement for Embedded Systems," In in Proc. IEEE Region 10 Conference (TENCON) 2004, A--021, November 2004.

[219] A. Muramatsu, M. Hashimoto, and H. Onodera, "Lsi Power Network Analysis with On-Chip Wire Inductance," In Proceedings of Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI), pages 55-60, October 2004.

[220] M. Hashimoto, A. Tsuchiya, and H. Onodera, "On-Chip Global Signaling by Wave Pipelining," In IEEE 13th Topical Meeting on Electrical Performance of Electronic Packaging (EPEP), pages 311-314, October 2004.

[221] M. Hashimoto, T. Yamamoto, and H. Onodera, "Statistical Analysis of Clock Skew Variation," In Proceedings of Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI), pages 214-219, October 2004.

[222] N. Iwanaga, W. Kobayashi, K. Furuya, T. Onoye, and I. Shirakawa, "VLSI Implementation of a 3D Sound Movement System," In in Proc. The 12th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI) 2004, pages 121-125, October 2004.

[223] T. Miyazaki, M. Hashimoto, and H. Onodera, "A Performance Prediction of Clock Generation Plls: a Ring Oscillator Based Pll and an Lc Oscillator Based Pll," In IEEJ International Analog VLSI Workshop, pages 45-50, October 2004.

[224] T. Sato, M. Hashimoto, and H. Onodera, "An Ir-Drop Minimization by Optimizing Number and Location of Power Supply Pads," In Proceedings of Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI), pages 66-72, October 2004.

[225] A. Tsuchiya, M. Hashimoto, and H. Onodera, "Performance Limitation of On-Chip Global Interconnects for High-Speed Signaling," In Proceedings of IEEE Custom Integrated Circuits Conference (CICC), pages 489-492, September 2004.

[226] H. Tsutsui, T. Masuzaki, Y. Hayashi, Y. Taki, T. Izumi, T. Onoye, and Y. Nakamura, "Scalable Design Framework for JPEG2000 System Architecture," In Proc. Asia-Pacific Computer Systems Architecture Conference, pages 6--11, September 2004.

[227] J. Ashida, R. Miyamoto, H. Tsutsui, T. Onoye, and Y. Nakamura, "A Scalable Approach for Estimation of Focus of Expansion," In Proc. IASTED International Conference on Visualization, Imaging, and Image Processing, pages 6--11, September 2004.

[228] S. Maeta, A. Kosaka, A. Yamada, T. Onoye, T. Chiba, and I. Shirakawa, "C-Based Hardware Design of IMDCT Accelerator for Ogg Vorbis Decoder," In in Proc.12th European Signal Processing Conference (EUSIPCO 2004), pages 1361--1364, September 2004.

[229] Y. Mitsuyama, M. Kimura, T. Onoye, and I. Shirakawa, "Embedded Architecture of IEEE802.11i Cipher Algorithms," In in Proc. 2004 IEEE International Symposium on Consumer Electronics (ISCE2004), pages 241--246, September 2004.

[230] A. Shinmyo, M. Hashimoto, and H. Onodera, "Design and Optimization of Cmos Current Mode Logic Dividers," In IEEE Asia-Pacific Conference on Advanced System Integrated Circuits , pages 434-435, August 2004.

[231] Y. Ogasahara, M. Ise, T. Onoye, and I. Shirakawa, "Architecture of Turbo Decoder for W-CDMA by Configurable Processor," In Proc.The 2004 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC2004), Sendai, Japan, F2P-27-1--7F2P-27-4, page 7, July 2004.

[232] T. Onoye, H. Tsutsui, G. Fujita, Y. Nakamura, and I. Shirakawa, "Embedded System Implementation of Scalable and Object-Based Video Coding," In in Proc. of World Automation Congress (WAC) , International Forum on Multimedia and Image Processing (IFMIP), IFMIP076, June 2004.

[233] H. Sugita, Q.-M. Vu, T. Masuzaki, H. Tsutsui, T. Izumi, T. Onoye, and Y. Nakamura, "JPEG2000 High-Speed Progressive Decoding Scheme," In Proc. IEEE International Symposium on Circuits and Systems, pages 873--876, May 2004.

[234] A. Kosaka, S. Yamaguchi, H. Okuhata, T. Onoye, and I. Shirakawa, "SoC Design of Ogg Vorbis Decoder Using Embedded Processor," In in Proc. 2004 Computing Frontier Conference, pages 481--487, April 2004.

[235] K. Tsujino, A. Shigiya, W. Kobayashi, T. Izumi, T. Onoye, and Y. Nakamura, "An Implementation of Moving 3-D Sound Synthesis System Based on Floating Point Dsp," In Proc. IEEE International Symposium on Signal Processing and Information Technology, WA4-8.1-WA4-8.4, December 2003.

[236] K. Tsujino, A. Shigiya, T. Izumi, T. Onoye, Y. Nakamura, and W. Kobayashi, "A Dsp-Based 3-D Sound Synthesis System for Moving Sound Images," In Proc. GAME-ON Conference, pages 23--25, November 2003.

[237] K. Hontani, T. Imanaka, G. Fujita, T. Onoye, and I. Shirakawa, "Modified Snake: Real-Time Face Object Extraction for Video Phone," In in Proc. IEEE International Conference on Image Processing(ICIP2003), Barcelona, Spain, volume III, pages 873--876, September 2003.

[238] M. Ise, Y. Ogasahara, T. Onoye, and I. Shirakawa, "Implementation of W-CDMA Channel Codec by Configurable Processors," In Proc. Sixth Baiona Workshop on Signal Processing in Communications, pages 205--210, September 2003.

[239] Y. Uchida, S. Tani, S. Tsukiyama, and I. Shirakawa, "Parasitic Capacitance Modeling for TFT Liquid Crystal Displays," In in Proc. The European Solid-State Device Research Conference (ESSDERC2003), Estoril, Portugul, pages 453--456, September 2003.

[240] A. Kotani, Y. Asai, Y. Nakamura, S. Okada, N. Koyama, K. Yamane, Y.Okano, Y. Mitsuyama, and T. Onoye, "Visibility Font Technology on High Resolution Color LCD "LCFONT.C"," In in Proc. The 2003 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2003), Kang-Woo Do, Korea, volume 1, pages 535--538, July 2003.

[241] H.-S. Song, H. Okada, G. Fujita, T. Onoye, and I. Shirakawa, "Efficient Error Recovery Scheme for MPEG-4 Video Coding," In in Proc. The 2003 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC2003), Kang-Woo Do, Korea, volume 2, pages 1328--1331, July 2003.

[242] S. Yamaguchi, A. Kosaka, H. Okuhata, T. Onoye, and I. Shirakawa, "Low Power Ogg Vorbis Decoder by Embedded Processor," In in Proc. The 2003 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC2003), Kang-Woo Do, Korea, volume 1, pages 565--568, July 2003.

[243] T. Matsumura, N. Iwanaga, W. Kobayashi, T. Onoye, and I. Shirakawa, "Feature Extraction of Head-Related Transfer Function for 3D Sound Movement," In in Proc. The 2003 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC2003), Kang-Woo Do, Korea, volume 1, pages 685--688, July 2003.

[244] Y. Uchida, S. Tani, S. Tsukiyama, and I. Shirakawa, "Parasitic Capacitance Modeling for On-Chip Interconnects," In in Proc. The 2003 International Technical Conference on Circuits/Systems, Computers and ommunications (ITC-CSCC2003) , Kang-Woo Do, Korea, volume 3, pages 1638--1641, July 2003.

[245] N. Iwanaga, W. Kobayashi, K. Furuya, T. Onoye, and I. Shirakawa, "Embedded Implementation of Acoustic Field Enhancement for Stereo Sound Sources," In in IEEE 29th International Conference on Consumer Electronics (ICCE2003), digest of technical papers, Los Angeles, Carifornia, USA, pages 256--257, June 2003.

[246] M. Hatanaka, T. Masaki, M. Okada, and K. Murakami, "Implementation of PSK Demodulator for Digital BS/CS Broadcasting System," In in Proc. IEEE International Symposium on Circuits and Systems (ISCAS2003) , Bankok, Thailand, volume II, pages 764--767, May 2003.

[247] S. Komata, A. Pal, N. Sakamoto, W. Kobayashi, T. Onoye, and I. Shirakawa, "Interactive Interface of Realtime 3D Sound Movement for Embedded Applications," In in Proc. IEEE International Symposium on Circuits and Systems (ISCAS2003) , Bankok, Thailand, volume II, pages 520--523, May 2003.

[248] T. Okada, T. Uchida, T. Onoye, and I. Shirakawa, "A Novel Signal Processing Scheme for Next Generation GNSS Receiver," In in Proc. the 8th ISU International Symposium, Strasbourg, France, May 2003.

[249] Y. Hayashi, H. Tsutsui, T. Masuzaki, T. Izumi, T. Onoye, and Y. Nakamura, "Design Framework for JPEG2000 Encoding System Architecture," In Proc. International Symposium on Circuits and Systems, pages 740--743, May 2003.

[250] T. Okada, T. Uchida, T. Onoye, and I. Shirakawa, "A Novel Signal Processing Scheme for Next Generation GNSS Receiver and Its VLSI Implementation," In in Proc. International Signal Processing Conference , Dallas, number 357, April 2003.

[251] N. Iwanaga, W. Kobayashi, K. Furuya, N. Sakamoto, T. Onoye, and I.Shirakawa, "Low Cost Approach to Acoustic Field Enhancement for Stereo Headphones," In in Proc. Euromedia 2003, Plymouth, United Kingdom, pages 32--36, April 2003.

[252] S. Tani, Y. Uchida, M. Furuie, S. Tsukiyama, B. Lee, S. Nishi, Y. Kubota, I. Shirakawa, and S. Imai, "A Parasitic Capacitance Modeling Method for Non-Planar Interconnects," In in Proc. the Workshop on Synthesis and System Integration of Mixed Information Technologies (SASIMI 2003), pages 294--299, April 2003.

[253] T. Nakagawa, G. Fujita, T. Onoye, and I. Shirakawa, "Vlsi Architecture for Mpeg-4 Core Profile Codec Core," In Proc. Workshop on Synthesis and System Integration of Mixed Information Technologies, pages 365--371, April 2003.

[254] T. Yuasa, A. Tomita, T. Izumi, T. Onoye, and Y. Nakamura, "An Approach for Circuit Size Reduction by Variable Reordering for Pca-Chip2," In Proc. Workshop on Synthesis and System Integration of Mixed Information Technologies, pages 217--221, April 2003.

[255] T. Yuasa, Y. Soga, T. Izumi, T. Onoye, and Y. Nakamura, "An Improved Communication Channel in Dynamic Reconfigurable Device for Multimedia Applications," In Proc. EUROMEDIA, pages 152--157, April 2003.

[256] Y. Hayashi, H. Tsutsui, T. Masuzaki, T. Izumi, T. Onoye, and Y. Nakamura, "Scalable Design Framework for JPEG2000 Encoder Architecture," In Proc. Workshop on Synthesis and System Integration of Mixed Information Technologies, pages 372--376, April 2003.

[257] K. Hontani, T. Imanaka, G. Fujita, T. Onoye, and I. Shirakawa, "Realtime Face Object Extraction Algorithm for Video Phone," In in Proc. IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2002), Orchard Road, Singapore, volume 1, pages 35--38, December 2002.

[258] N. Iwanaga, W. Kobayashi, K. Furuya, N. Sakamoto, T. Onoye, and I. Shirakawa, "Embedded Implementation of Acousitic Field Enhancement for Stereo Headphones," In ibid., Orchard Road, Singapore, volume 1, pages 51--54, December 2002.

[259] S. Tani, Y. Uchida, M. Furuie, S. Tsukiyama, B. Lee, S. Nishi, Y. Kubota, I. Shirakawa, and S. Imai, "Parasitic Capacitance Modeling for Multilevel Interconnects," In in Proc. IEEE Proceedings of Asia-Pacific Conference on Circuits and Systems 2002, volume 1, pages 59--64, December 2002.

[260] Y. Ohtani, H. Nakaoka, T. Tomaru, K. Maruyama, T. Chiba, T. Onoye, and I. Shirakawa, "Implementation of Wireless MPEG2 Transmission System Using IEEE 802.11b PHY," In ibid., Orchard Road, Singapore, volume 1, pages 39--44, December 2002.

[261] A. Kosaka, S. Yamaguchi, H. Okuhata, T. Onoye, and I. Shirakawa, "VLSI Implementation of Ogg Vorbis Decoder for Embedded Applications," In in Proc. 15th Annual IEEE International ASIC/SoC Conference(ASIC/SoC2002), Rochester, N.Y., pages 20--24, September 2002.

[262] A. Kosaka, S. Yamaguchi, H. Okuhata, T. Onoye, and I. Shirakawa, "A Hardware Implementation of Ogg Vorbis Audio Decoder with Embedded Processor," In in Proc. 17th Annual International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC2002), Phuket, Thailand, pages 94--97, July 2002.

[263] H. Okada, A.-E. Shiitev, H.-S. Song, G. Fujita, T. Onoye, and I. Shirakawa, "Digital Watermark Based Error Detection for MPEG-4 Bitstream Error," In ibid., Phuket, Thailand, pages 152--155, July 2002.

[264] H.-S. Song, H. Okada, G. Fujita, T. Onoye, and I. Shirakawa, "Hybrid Error Concealment Algorithm for MPEG-4 Videodecoders," In ibid., Phuket, Thailand, pages 611--614, July 2002.

[265] K. Nakagawa, M. Kawakita, K. Sato, M. Minakuchi, O. Tsumori, K. Hanada, T. Chiba, and I. Shirakawa, "OCEAN: Object Communication Environment for Arbitrary Network," In in Proc. IEEE International Conference on Distributed Computing Systems Workshops, pages 162--166, July 2002.

[266] S. Komata, N. Sakamoto, W. Kobayashi, T. Onoye, and I. Shirakawa, "Synthesis of 3D Sound Movement by Embedded DSP," In ibid., Phuket, Thailand, pages 117--120, July 2002.

[267] T. Kaya, R. Miyamoto, T. Onoye, and I. Shirakawa, "Embedded System for Video Coding with Logic-Enhanced DRAM and Configurable Processor," In ibid., Phuket, Thailand, pages 216--219, July 2002.

[268] W. Kobayashi, K. Furuya, N. Sakamoto, T. Onoye, and I. Shirakawa, "`Out-Of-Head' Acoustic Field Enhancement for Stereo Headphones by Embedded DSP," In in IEEE 28th International Conference on Consumer Electronics (ICCE2002), digest of technical papers, Cardiff, Wales, pages 222--223, June 2002.

[269] Y. Ohtani, N. Kawahara, T. Onoye, I. Shirakawa, and T. Chiba, "MAC LSI Design for Wireless MPEG2 Transmission Over IEEE802.11b PHY," In ibid., Los Angeles, pages 242--243, June 2002.

[270] H. Mizuno, H. Kobayashi, T. Onoye, and I. Shirakawa, "Power Estimation at Architecture Level for Embedded Systems," In ibid., Scottsdale, Arizona, volume II, pages 476--479, May 2002.

[271] Y. Mitsuyama, Z. Andales, T. Onoye, and I. Shirakawa, "Burst Mode: a New Acceleration Mode for 128-Bit Block Ciphers," In in Proc. IEEE 24th Custom Integrated Circuits Conference (CICC2002), Orland, Florida, pages 151--154, May 2002.

[272] Y. Mitsuyama, Z. Andales, T. Onoye, I. Shirakawa, and I. Arungsrisangchai, "VLSI Architecture of Burst Mode Acceleration for 128-Bit Block Ciphers," In ibid., Phoenix, Arizona, volume II, pages 344--347, May 2002.

[273] Y. Ohtani, N. Kawahara, T. Tomaru, K. Maruyama, T. Onoye, I. Shirakawa, and T. Chiba, "Error Correction Block Based ARQ Protocol for Wireless Digital Video Transmission," In ibid., Phoenix, Arizona, volume I, pages 605--608, May 2002.

[274] Y. Uchida, M. Ise, T. Onoye, I. Shirakawa, and I. Arungsrisangchai, "VLSI Architecture of Digital Matched Filter and Prime Interleaver for W-CDMA," In Proc. IEEE International Symposium on Circuits and Systems (ISCAS2002), Phoenix, Arizona, volume III, pages 269--272, May 2002.

[275] M. Kimura, M. H. Miki, T. Onoye, and I. Shirakawa, "A Java Accelerator for High Performance Embedded Systems," In in Proc. 4th International Conference of Massively Parallel Computing Systems (MPCS 2002), Ischia, Italy, 2, April 2002.

[276] N. Sakamoto, W. Kobayashi, T. Onoye, and I. Shirakawa, "DSP Implementation of Realtime 3D Sound Synthesis Algorithm for Monaural Sound Source," In in Proc. EUROMEDIA 2002, Modena, Italy, pages 123--127, April 2002.

[277] M. H. Miki, M. Kimura, T. Onoye, and I. Shirakawa, "High Performance Java Hardware Engine and Software Kernel for Embedded Systems," In in Proc. 11th IFIP International Conference on Very Large Scale Integration (VLSI-SOC 2001), Montpellier-Le Corum, France, pages 365--369, December 2001.

[278] H. Mizuno, H. Kobayashi, T. Onoye, and I. Shirakawa, "An Architecture Level Power Estimation Method for Embedded Systems," In in Proc. Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI 2001), Nara, Japan, pages 78--85, October 2001.

[279] M. Ise, Y. Uchida, T. Onoye, and I. Shirakawa, "System-On-A-Chip Architecture for W-CDMA Baseband Modem LSI," In in Proc. The 4th International Conference on ASIC (ASICON 2001), Shanghai, pages 364--369, October 2001.

[280] M. Kimura, M. H. Miki, T. Onoye, and I. Shirakawa, "High Performance Java Execution for Embedded Systems," In in Proc. Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI 2001), Nara, Japan, pages 346--350, October 2001.

[281] Z. Andales, Y. Mitsuyama, T. Onoye, and I. Shirakawa, "System Performance Evaluation of High-Speed Burst Mode for 128-Bit Block Ciphers," In in Proc. Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI 2001), Nara, Japan, pages 332--339, October 2001.

[282] M. Furuie, T. Onoye, S. Tsukiyama, and I. Shirakawa, "Two-Dimensional Array Layout for NMOS 4-Phase Dynamic Logic," In in Proc. The 8th IEEE International Conference on Electronics, Circuits and Systems(ICECS 2001), Malta, pages 589--592, September 2001.

[283] N. Sakamoto, W. Kobayashi, T. Onoye, and I. Shirakawa, "DSP Implementaion of 3D Sound Localization Algorithm for Monaural Sound Source," In in Proc. The 8th IEEE International Conference on Electronics, Circuits and Systems(ICECS 2001), Malta, pages 1061--1064, September 2001.

[284] N. Sakamoto, W. Kobayashi, T. Onoye, and I. Shirakawa, "DSP Implementation of Low Computational 3D Sound Localization Algorithm," In in Proc. 200l IEEE Workshop on Signal Processing Systems, Design and Implementation(SIPS 2001), Antwerp, Belgium, pages 109--116, September 2001.

[285] Y. Mitsuyama, Z. Andales, T. Onoye, and I. Shirakawa, "VLSI Implementation of High Performance Burst Mode for 128-Bit Block Ciphers," In in Proc. 14th Annual IEEE International ASIC/SoC Conference (ASIC/SoC2001), Washington, D.C., pp. W.1.1.1--W.1.1.5, September 2001.

[286] H. Okada, H. S. Song, G. Fujita, T. Onoye, and I. Shirakawa, "Error Detection Based on Check Marker Embedding for MPEG-4 Video Coding," In in Proc. International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC '01), Tokushima, Japan, pages 96--99, July 2001.

[287] H. S. Song, H. Okada, G. Fujita, T. Onoye, and I. Shirakawa, "Error Concealment Algorithm by Motion Estimation Method for MPEG-4 Video Decoder," In in Proc. International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC '01), Tokushima, Japan, pages 104--107, July 2001.

[288] N. Sakamoto, W. Kobayashi, T. Onoye, and I. Shirakawa, "Low Power DSP Implementation of 3D Sound Localization for Monaural Sound Source," In in Proc. World Multiconference on Systemics, Cybernetics and Informatics (SCI 2001), Orlando, Florida, USA, pages 173--177, July 2001.

[289] N. Sakamoto, W. Kobayashi, T. Onoye, and I. Shirakawa, "DSP Implementation of Realtime 3D Sound Localization Algorithm," In in Proc. International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC '01), Tokushima, Japan, pages 1140--1143, July 2001.

[290] T. Song, G. Fujita, T. Onoye, and I. Shirakawa, "Low Power Architecture for H.263 Version2 Codec," In in Proc. International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC '01), Tokushima, Japan, pages 620--623, July 2001.

[291] M. H. Miki, M. Sakamoto, S. Miyamoto, Y. Takeuchi, T. Yoshida, and I. Shirakawa, "Evaluation of Processor Code Efficiency for Embedded Systems," In in Proc. ACM 15th International Conference on Supercomputing, Sorrento, Italy, pages 229--235, June 2001.

[292] Y. Mitsuyama, Z. Andales, T. Onoye, and I. Shirakawa, "VLSI Architecture of Dynamically Reconfigurable Hardware-Based Cipher," In in Proc. IEEE International Symposium on Circuits and Systems (ISCAS2001) , Sydney, Australia, volume IV, pages 734--737, May 2001.

[293] Z. Andales, Y. Mitsuyama, T. Onoye, and I. Shirakawa, "A High Performance Burst Mode Approach for 128-Bit Block Ciphers," In in Proc. EUROMEDIA2001, Valencia, Spain, pages 146--150, April 2001.

[294] R. Y. Omaki, Y. Dong, M. H. Miki, M. Furuie, D. Taki, M. Tarui, G. Fujita, T. Onoye, and I. Shirakawa, "Realtime Wavelet Video Coder Based on Reduced Memory Accessing," In in Proc.~Asia and South Pacific Design Automation Conference (ASP-DAC 2001), Yokohama, Japan, pages 15--16, January 2001.

[295] Y. Mitsuyama, Z. Andales, T. Onoye, and I. Shirakawa, "A Dynamically Reconfigurable Hardware-Based Cipher Chip," In in Proc. Asia and South Pacific Design Automation Conference (ASP-DAC 2001), Yokohama, Japan, pages 11--12, January 2001.

[296] S. Hashimoto, A. Niwa, H. Okuhata, T. Onoye, and I. Shirakawa, "VLSI Implementation of Portable MPEG-4 Audio Decoder," In in Proc. International ASIC/SOC Conference (ASIC/SOC 2000), Arington, VA, USA, pages 80--84, September 2000.

[297] Y. Dong, R. Y. Omaki, T. Onoye, and I. Shirakawa, "VLSI Implementation of a Reduced Memory Bandwidth Realtime EZW Video Coder," In in Proc. International Conference on Image Processing (ICIP 2000), volume III, pages 126--129, September 2000.

[298] K. Kawamoto, S. Mizuno, H. Abe, Y. Higuchi, S. Fujino, and I. Shirakawa, "A Shingle Chip Automotive Control LSI Using SOI BiCDMOS," In in Proc. of 2000 International Conference on Solid State Device and Materials, pages 486-487, August 2000.

[299] N. Sakamoto, W. Kobayashi, T. Onoye, and I. Shirakawa, "Low Power DSP Implementation of 3D Sound Localization," In in Proc. ITC-CSCC 2000, Pusan, Korea, pages 253--256, July 2000.

[300] R. Kuroda, G. Fujita, T. Onoye, and I. Shirakawa, "Discrete Cosine Transformer with Variable-Length Basis Vector for MPEG-4 Video Codec," In in Proc. ITC-CSCC 2000, Pusan, Korea, pages 811--814, July 2000.

[301] T. Watanabe and N. Ishiura, "Minimization of Spill Code Insertion by Register Constraint Analysis for Code Generation for Application Specific DSPs," In in Proc. ITC-CSCC 2000, Pusan, Korea, pages 953--956, July 2000.

[302] W. Kobayashi, N. Sakamoto, T. Onoye, and I. Shirakawa, "3D Acoustic Image Localization Algorithm by Embedded DSP," In in Proc. ITC-CSCC 2000, Pusan, Korea, pages 264--267, July 2000.

[303] Y. Mitsuyama, Z. Andales, T. Onoye, and I. Shirakawa, "VLSI Implementation of Dynamically Reconfigurable Hardware-Based Cryptosystem," In in Symposium on VLSI Circuits Digest of Technical Papers, Hawaii, USA, pages 204--205, June 2000.

[304] M. Hatanaka, T. Masaki, and K. Murakami, "An Efficient Network Architecture for AAL Type2 and Its VLSI Implementation," In in Proc. EUROMEDIA2000 , Antwerp, Belgium, pages 123--125, May 2000.

[305] R. Y. Omaki, Y. Dong, M. H. Miki, M. Furuie, S. Yamada, D. Taki, M. Tarui, G. Fujita, T. Onoye, and I. Shirakawa, "VLSI Implementation of a Realtime Wavelet Video Coder," In in Proc. Custom Integrated Circuits Conference (CICC 2000), Florida, USA, pages 543--546, May 2000.

[306] Z. Andales, Y. Mitsuyama, T. Onoye, and I. Shirakawa, "Chameleon: a Dynamically Reconfigurable Hardware-Based Cryptosystem," In in Proc. EUROMEDIA2000 , Antwerp, Belgium, pages 90--94, May 2000.

[307] N. Ishiura, T. Watanabe, and M. Yamaguchi, "A Code Generation Method for Datapath Oriented Application Specific Processor Design," In in Proc. Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI 2000), pages 71--78, April 2000.

[308] M. Furuie, B. Y. Song, Y. Yoshida, T. Onoye, and I. Shirakawa, "Layout Generation of Array Cell for NMOS 4-Phase Dynamil Logic," In in Proc. ASP-DAC2000, pages 529--532, January 2000.

[309] M. Takahashi, N. Ishiura, A. Yamada, and T. Kambe, "Thread Partitioning Method for Hardware Compiler Bach," In in Proc. Asia and South Pacific Design Automation Conference (ASP-DAC 2000), pages 303--308, January 2000.

[310] R. Y. Omaki, G. Fujita, T. Onoye, and I. Shirakawa, "Video Coding Algorithm Based on Modified Discrete Wavelet Transform," In in Proc. NOLTA'99, volume I, pages 251--254, November 1999.

[311] R. Y. Omaki, G. Fujita, T. Onoye, and I. Shirakawa, "Architecture of Embedded Zerotree Wavelet Based Real-Time Video Coder," In in Proc. 12th IEEE ASIC/SOC Conference, pages 137-141, October 1999.

[312] M. Furuie, B. Y. Song, Y. Yoshida, T. Onoye, and I. Shirakawa, "Layout Generation for Low-Power NMOS 4-Phase Dynamic Logic Array," In in Proc. IEEE Region 10 Conference (TENCON '99), pages 872--875, September 1999.

[313] M. Tarui, M. Oshita, T. Onoye, and I. Shirakawa, "High-Speed Implementation of JBIG Arithmetic Coder," In in Proc. IEEE Region 10 Conference (TENCON '99), pages 1291--1294, September 1999.

[314] R. Y. Omaki, G. Fujita, T. Onoye, and I. Shirakawa, "Embedded Zerotree Wavelet Based Algorithm for Video Compression," In in Proc. IEEE Region 10 Conference (TENCON '99), pp.II-1343--1346, September 1999.

[315] B. Y. Song, M. Furuie, Y. Yoshida, T. Onoye, and I. Shirakawa, "Array Macro Cell Architecture for Low-Power NMOS 4-Phase Dynamic Logic," In in Proc. International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC '99), Sado, Japan, pages 561--564, July 1999.

[316] M. Oshita, M. Tarui, T. Onoye, and I. Shirakawa, "Pipelined Implementation of JBIG Arithmetic Coder," In in Proc. International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC '99), Sado, Japan, pages 470--473, July 1999.

[317] N. Ishiura and M. Yamaguchi, "Operation Binding for Retargetable Compilers Minimizing Clock Cycles," In in Proc. International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC '99), Sado, Japan, pages 705--708, July 1999.

[318] H. Fujishima, Y. Takemoto, T. Yoneda, T. Onoye, and I. Shirakawa, "Hybrid Media-Processor Core for Natural and Synthetic Video Decoding," In in Proc. IEEE International Symposium on Circuits and Systems (ISCAS '99) , Orland, USA, volume IV, pages 275--278, June 1999.

[319] M. H. Miki, D. Taki, G. Fujita, T. Onoye, I. Shirakawa, T. Fujiwara, and T. Kasami, "Recursive Maximum Likelihood Decoder for High-Speed Satellite Communication," In in Proc. IEEE International Symposium on Circuits and Systems (ISCAS '99) , Orland, USA, volume IV, pages 572--575, June 1999.

[320] G. Fujita, H. Okuhata, M. H. Miki, T. Onoye, and I. Shirakawa, "Low-Power Architecture of H.324 Codec Dedicated to Mobile Computing," In in Proc. EUROMEDIA'99 , Munich, Germany, pages 145--149, April 1999.

[321] K. Asari, Y. Mitsuyama, T. Onoye, I. Shirakawa, H. Hirano, T. Honda, T. Otsuki, T. Baba, and T. Meng, "Multi-Mode and Multi-Level Technologies for FeRAM Embedded Reconfigurable Hardware," In in Proc. IEEE Internatinal Solid-State Circuits Conference, pages 106--107, February 1999.

[322] H. Fujisima, Y. Takemoto, T. Onoye, I. Shirakawa, and K. Matsumura, "Matrix-Vector Multiplier Module for Natural/Synthetic Hybrid Video Coding," In in Proc. IEEE Asia Pacific Conference on Circuits and Systems, pages 631--634, November 1998.

[323] H. Fujisima, Y. Takemoto, T. Yoneda, T. Onoye, and I. Shirakawa, "Hybrid VLSI Architecture for Motion Compensation and Texture Mapping," In in Proc. IEEE International Workshop on Intelligent Signal Processing and Communication Systems, pages 383--386, November 1998.

[324] J. Fan, G. Fujita, M. Furuie, T. Onoye, and I. Shirakawa, "Structual Objeco-Oriented Video Segmentation and Representation Algorithm," In in Proc. IEEE International Workshop on Intelligent Signal Processing and Communication Systems, pages 78--82, November 1998.

[325] N. Ishiura, M. Yamaguchi, and T. Kambe, "A Graph-Based Algorithm of Operation Binding for Compilers Targeting Heterogeneous Datapath," In in Proc. IEEE Asia Pacific Conference on Circuits and Systems, pages 395--398, November 1998.

[326] B.Y. Song, Y. Yoshida, T. Onoye, and I. Shirakawa, "Delay and Power Simulation for a New Logic Scheme of NMOS 4-Phase Dynamic Logic," In in Proc. European Simulation Symposium, pages 339--343, October 1998.

[327] B.Y. Song, Y. Yoshida, T. Onoye, and I. Shirakawa, "Low-Power Implementation by a New Logic Scheme of NMOS 4-Phase Dynamic Logic," In in Proc. Workshop on Synthesis and System Integration of Mixed Technologies, pages 235--240, October 1998.

[328] J. Fan, G. Fujita, J. Yu, K. Miyanohana, T. Onoye, N. Ishiura, L. Wu, and I. Shirakawa, "Hierarchical Object-Oriented Image and Video Segmentation Algorithm Based on 2D Entropic Thresholding," In in Proc. Electronic Imaging and Multimedia Systems II, SPIE, pages 141--151, September 1998.

[329] K. Matsumura, G. Fujita, I. Shirakawa, and H. Inada, "A Wireless Data System Constructed of SAW-Based Receiver/Transmitter and Its Applications to Medical Cares," In in Proc. IEEE Radio & Wireless Conf., pages 47--50, August 1998.

[330] D. Taki, G. Fujita, T. Onoye, I. Shirakawa, T. Fujiwara, and T. Kasami, "VLSI Implementation of a Recursive Maximum Likelihood Decoder for High-Speed Satellite Communication," In in Proc. International Technical Conference on Circuits/Systems, Computers and Communications, pages 1383--1386, July 1998.

[331] H. Fujisima, Y. Takemoto, T. Onoye, and I. Shirakawa, "Matrix-Vector Multiplier for Natural/Synthetic Hybrid Video Coding," In in Proc. International Technical Conference on Circuits/Systems, Computers and Communications, pages 1269--1272, July 1998.

[332] K. Matsumura, G. Fujita, I. Shirakawa, and H. Inada, "A Wireless Data System by Means of SAW-Based Transmitter/Receiver and Its Applications to Medical Cares," In in Proc. International Technical Conference on Circuits/Systems, Computers and Communications, pages 299--302, July 1998.

[333] N. Ishiura, M. Yamaguchi, and N. Nitta, "Field Partitioning Algorithms for Compression of Instruction Codes of Application Specific VLIW Processors," In in Proc. International Technical Conference on Circuits/Systems, Computers and Communications, pages 1387--1390, July 1998.

[334] R. Y. Omaki, G. Fujita, T. Onoye, and I. Shirakawa, "Implementation of DWT and EZW Cores for a Bitrate Scalable Video Coder," In in Proc. International Technical Conference on Circuits/Systems, Computers and Communications, pages 221--224, July 1998.

[335] Y. Takemoto, T. Yoneda, H. Fujishima, T. Onoye, and I. Shirakawa, "VLSI Implementation of Function Module for Texture Mapping and Motion Compensation," In in Proc. International Technical Conference on Circuits/Systems, Computers and Communications, pages 179--182, July 1998.

[336] K. Matsumura, G. Fujita, I. Shirakawa, and H. Inada, "A Wireless Data Systems Constructed of SAW-Divices and Its Applications to Medical Cares," In in Proc. Analog VLSI WS, pages 39--44, June 1998.

[337] M. Yamaguchi, N. Ishiura, and T. Kambe, "A Binding Algorithm for Retargetable Compilation to Non-Orthogonal Datapath Architectures," In in Proc. International Symposium on Circuits and Systems, WPA4-4, June 1998.

[338] G. Fujita, H. Okuhata, M. H. Miki, T. Onoye, and I. Shirakawa, "Implementation of H.324 Audiovisual Codec for Mobile Computing," In in Proc. IEEE Custom Integrated Circuits Conference, pages 193--196, May 1998.

[339] H. Okuhata, M. H. Miki, T. Onoye, and I. Shirakawa, "A Low Power DSP Core Architecture for Low Bitrate Speech Codec," In in Proc. IEEE Int'l Conf. Acoustics, Sounds, and Signal Processing, pages 3121--3124, May 1998.

[340] M. Yamaguchi, N. Ishiura, and T. Kambe, "Binding and Scheduling Algorithms for Highly Retargetable Compilation," In in Proc. Aia and South Pacific Design Automation Conference (ASP-DAC '98), pages 93-98, February 1998.

[341] T. Onoye, G. Fujita, H. Okuhata, M. H. Miki, and I. Shirakawa, "Low-Power Implementation of H.324 Audiovisual Codec Dedicated to Mobile Computing," In in Proc. Aia and South Pacific Design Automation Conference (ASP-DAC '98), pages 589-594, February 1998.

[342] N. Ishiura and M. Yamaguchi, "Instruction Code Compression for Application Specific VLIW Processors Based on Automatic Field Partitioning," In in Proc. of the Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI'97), pages 105-109, December 1997.

[343] T. Masaki, Y. Nakatani, T. Onoye, and K. Murakami, "Performance Evaluation of Shared VCI Cell for Multimedia ATM Network," In in Proc. International Seminar on Teletraffic and Network, pages 482-485, November 1997.

[344] H. Fujishima, Y. Takemoto, T. Onoye, I. Shirakawa, and S. Sakaguchi, "A Unified Media-Processor Architecure for Video Coding and Computer Graphics," In in Proc. International Workshop on Synthetic-Natural Hybrid Coding and Three Dimensional Imaging, pages 253-256, September 1997.

[345] H. Uno, K. Kumatani, H. Okuhata, T. Chiba, and I. Shirakawa, "Low Power Architecture for High Speed Infrared Wireless Communication System," In in Proc.International Symposium on Low Power Electronics and Design, pages 255-258, August 1997.

[346] M. H. Miki, G.Fujita, T. Onoye, and I. Sirakawa, "Low-Power H.263 Video CoDec Dedicated to Mobile Computing," In in Proc. International Symposium on Low Power Electronics and Design, pages 80-83, August 1997.

[347] Y. Yoshida, B. Y. Song, H. Okuhata, T. Onoye, and I. Shirakawa, "An Object Code Compression Approach to Embedded Processors," In in Proc. International Symposium on Low Power Electronics and Design, pages 265-268, August 1997.

[348] H. Fujisima, Y. Takemoto, T. Onoye, and I. Shirakawa, "Media-Processor Architecture Unified for Video Coding and 3D Graphics," In in Proc. Int'l Technical Conference on Circuit/Systems, Computers and Communications, pages 1223-1226, July 1997.

[349] T. Masaki, Y. Nakatani, T. Onoye, and K. Murakami, "Fellow Cell Switching for Voice Communication on Multimedia ATM Network and Its VLSI Implementation," In in Proc. Int'l Technical Conference on Circuit/Systems, Computers and Communications, pages 1219-1222, July 1997.

[350] G. Fujita, T. Onoye, and I. Sirakawa, "A New Motion Estimation Core Dedicated to H.263 VideoCoding," In in Proc. IEEE International Symposium on Circuits and Systems, pages 1161-1164, June 1997.

[351] I. Arungsrisangchai, Y. Shigehiro, I. Shirakawa, and H. Takahashi, "A Fast Minimun Cost Flow Algofithm for VLSI Layout Compaction," In in Proc. IEEE International Symposium on Circuits and Systems, pages 1672-1675, June 1997.

[352] M.Yamaguchi, T. Nakaoka, A. Yamada, and T. Kambe, "An Architecture Evaluation System Based on the Datapath Structure and Parallel Constraint," In in Proc. IEEE International Symposium on Circuits and Systems, pages 1584-1587, June 1997.

[353] T. Masaki, Y. Nakatani, T. Onoye, and K. Murakami, "Multimedia ATM Network Using Shared VCI Cell and VLSI Implementation of Rerouting Node," In in Proc. IEEE International Symposium on Circuits and Systems, pages 2793-2796, June 1997.

[354] K. Miyanohana, G. Fujita, K. Yanagida, T. Onoye, and I. Shirakawa, "VLSI Implementation of Single Chip Encoder/Decoder for Low Bitrate Visual Communication," In in Proc. IEEE Custom Integrated Circuits Conference, pages 229-232, May 1997.

[355] H. Okuhata, H. Uno, K. Kumatani, I. Shirakawa, and T. Chiba, "A 4Mbps Infrared Wireless Link Dedicated to Mobile Computing," In in Proc. IEEE International Performance, Computing, and Communications Conference, pages 463-467, February 1997.

[356] M. Yamaguchi, A. Yamada, T. Nakaoka, and T. Kambe, "Architecture Evaluation Based on the Datapath Structure and Parallel Constraint," In in Proc. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC '97), pages 503-508, January 1997.

[357] S. Morikawa, K. Okada, S. Takeuchi, and I. Shirakawa, "A High Performance FIR Filter Dedicated to Digital Video Transmission," In in Proc. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC '97), pages 77-82, January 1997.

[358] G. Fujita, T. Onoye, I. Shirakawa, S. Tsukiyama, and K. Matsumura, "Implementation of Half-Pel Precision Motion Estimator for MPEG2 MP@HL," In in Proc. IEEE Region 10 International Conference on Digital Signal Processing Applications (TENCON '96), pages 949-954, November 1996.

[359] H. Kondo, A. Sugiyama, and M. E. Cannon, "Precise Carrier Phase GPS and Its Application to Real-Time Landslide Detection," In in Proc. IEEE Region 10 International Conference on Digital Signal Processing Applications (TENCON '96), pages 906-911, November 1996.

[360] H. Uno, K. Kumatani, H. Okuhata, I. Shirakawa, and T. Chiba, "A 4Mbps Infrared Wireless Communication System Dedicated to Mobile Computing," In in Proc. IEEE Asia Pacific Conference on Circuits and Systems (APCCAS '96), pages 334-337, November 1996.

[361] K. Miyanohana, G. Fujita, T. Onoye, and I. Shirakawa, "VLSI Implementation of Edge Detector and Vector Quantizer for Very Low Bitrate Video Encoding," In in Proc. IEEE Asia Pacific Conference on Circuits and Systems (APCCAS '96), pages 480-483, November 1996.

[362] Y. Konno, K. Nakamura, T. Bitoh, K. Saga, and S. Yano, "A Consistent Scan Design System for Large-Scale ASICs," In in Proc. Fifth Asian Test Symposium, pages 82-87, November 1996.

[363] K. Miyanohana, G. Fujita, T. Onoye, and I. Shirakawa, "Implementation of Very Low Bitrate Video Encoder Core," In in Proc. 2nd International Conference on ASIC, pages 131-134, October 1996.

[364] Y. Yoshida, B. Y. Song, H. Okuhata, T. Onoye, and I. Shirakawa, "Low-Power Consumption Architecture for Embedded Processor," In in Proc. 2nd International Conference on ASIC, pages 77-80, October 1996.

[365] T. Onoye, G. Fujita, M. Takatsu, I. Shirakawa, and K. Matsumura, "A Single Chip Motion Estimator Dedicated to MPEG2 MP@HL," In in Proc. European Signal Processing Conference, pages 1479-1482, September 1996.

[366] G. Fujita, H. Okuhata, Y. Nakatani, T. Onoye, and I. Shirakawa, "Single Chip MPEG2 MP@ML Motion Estimator," In in Proc. Int'l Technical Conference on Circuits/Systems, Computers and Communications, pages 286-289, July 1996.

[367] H. Uno, K. Kumatani, H. Okuhata, T. Masaki, I. Shirakawa, and T. Chiba, "A 4Mbps Infrared Wireless Communication Link for Mobile Computing," In in Proc. Workshop on Multi-Dimensional Mobile Communications (MDMC '96), pages 267-271, July 1996.

[368] K. Miyanohana, G. Fujita, T. Onoye, and I. Shirakawa, "VLSI Architecture for Very Low Bitrate Video Encoder Core," In in Proc. Int'l Technical Conference on Circuits/Systems, Computers and Communications, pages 294-297, July 1996.

[369] S. Nakamura, N. Ishiura, T. Yamamoto, and I. Shirakawa, "High-Level Synthesis System for Behavioral Descriptions with Conditional Branches," In in Proc. Int'l Technical Conference on Circuits/Systems, Computers and Communications, pages 935-938, July 1996.

[370] Y. Shigehiro, I. Shirakawa, I. Arungsrisangchai, and H. Takahashi, "A Fast Minimum Cost Flow Algorithm and Its Application to VLSI Layout Compaction," In in Proc. Int'l Technical Conference on Circuits/Systems, Computers and Communications, pages 951-954, July 1996.

[371] N. Shimizu, Y. Mizuta, H. Kondo, and H. Ono, "A New GPS Real-Time Monitoring System for Deformation Measurements and Its Application," In in Proc. 8th FIG Int. Symp. Deformation Measurements, Hong Kong, S1.5, pages 47-54, June 1996.

[372] K. Itoh, Y. Shigehiro, I. Shirakawa, and K. Matsumura, "An Approach for Multi-Layer Gridless Routing," In in Proc. Printed Circuit World Convention VII, pp.P2-1-P2-7, May 1996.

[373] T. Onoye, G. Fujita, M. Takatsu, I. Shirakawa, K. Matsumura, H. Ariyoshi, and S. Tsukiyama, "A VLSI Architecture of MPEG2 MP@HL Motion Estimator," In in Proc. IEEE Int'l Symposium on Circuits and Systems, pages 664-667, May 1996.

[374] T. Onoye, G. Fujita, M. Takatsu, I. Shirakawa, K. Matsumura, H. Ariyoshi, and S. Tsukiyama, "VLSI Implementation of Hierarchical Motion Estimator for MPEG2 MP@HL," In in Proc. IEEE Custom Integrated Circuits Conference, pages 351-354, May 1996.

[375] N. Shimizu, K. Nakagawa, and H. Kondo, "Displacement Monitoring by Using Global Positioning System," In in Proc. 4th Int. Symp. Field Measurements in Geomechanics, %Bergamo, Italy, pages 555-562, April 1996.

Domestic Conference

[1] 上田将理, 伊藤雄一, 藤田和之, 尾上孝雄, "PlanT：植物を用いた積算情報可視化ディスプレイ," インタラクション2020論文集, pages 21-30, March 2020. [2.pdf]

[2] 岩瀬大輝, 伊藤雄一, 秦秀彦, 山下真由, 尾上孝雄, "アクティブ音響センシングによる日常物体識別と位置推定," インタラクション2018論文集, pages 62-71, February 2018.

[3] 井上佑貴, 伊藤雄一, 尾上孝雄, "TuVe: チューブを用いたディスプレイ," インタラクション2018, 2018.

[4] 秋原優樹, 廣瀬哲也, 田中勇気, 黒木修隆, 沼昌宏, 橋本昌宜, "小型センサデバイスに向けた無線給電システムの設計," 回路とシステムワークショップ, pages 258--263, April 2015.

[5] Kosuke Nakajima, Yuichi Itoh, Simon Voelker, Christian Thoresen, Kjell Ivar Øvergård, Jan Borchers, "PUCs: 静電容量方式マルチタッチパネルにおけるユーザの接触を必要と しないウィジェット検出手法," インタラクション2014論文集, March 2014.

[6] Kosuke Nakajima, Yuichi Itoh, Ryusuke Endo, Fumio Kishino, "複合商業施設での複数人によるタイムスロット考慮型プランニングを実現するデジタルサイネージシステム," インタラクション2014論文集, March 2014.

[7] Kosuke Nakajima, Yuichi Itoh, Yusuke Hayashi, Kazuaki Ikeda, Kazuyuki Fujita, Takao Onoye, "Emoballoon: ソーシャルタッチインタラクションのための柔らかな風船型インタフェース," インタラクション2013論文集, pages 95-102, March 2013. [2.pdf]

[8] 安藤正宏, 細井俊輝, 中島康祐, 伊藤雄一, 北村喜文, 尾上孝雄, "ブロック型デバイスのための赤外線を用いた積み重ね形状認識におけるブロック間距離の影響に関する検討," 日本バーチャルリアリティ学会研究報告, volume 18, number CS-4, pages 11-14, 2013.

[9] Kosuke Kojima, Ryoji Hashimoto, Gen Fujita, "H.264 向け量子化パラメータを考慮した動きベクトル検出手法の一検討," 第22回 回路とシステム軽井沢ワークショップ , pages 142-147, April 2009.

Workshop

[1] 上田将理, 伊藤雄一, 藤田和之, 尾上孝雄, "PlanT：植物を用いた積算情報可視化アンビエントディスプレイ," ヒューマンインタフェース学会研究会研究報告集, volume 21, number 6, pages 71-76, October 2019. [2.pdf]

[2] Saya Suzunaga, Yuichi Itoh, Kazuyuki Fujita, Takao Onoye, "Position Control of Bubbles for Volumetric Display Using Glass Tube," ヒューマンインタフェース学会研究会研究報告集, volume 21, number 4, pages 31-36, June 2019. [2.pdf]

[3] Daichi Watari, Ittetsu Taniguchi, Takao Onoye, "A Battery Degradation Aware System Level Battery Management Methodology," IEICE Technical Report, VLD2018-104, volume 118, number 457, pages 67-72, February 2019. [2.pdf]

[4] Takashi Sakai, Masahide Hatanaka, Takao Onoye, "A Study on GPU Implementation of QC-LDPC Code Decoding," The 31st Workshop on Circuits and Systems, pages 214-219, May 2018.

[5] Mayu Yamashita, Yuichi Itoh, Kazuki Takashima, Takao Onoye, "Estimation of Understanding Situation of Learner by Pen Gripping Force," 電子情報通信学会技術研究報告, volume 117, number 509, pages 47-52, March 2018.

[6] Masaki Masuyama, Yuichi Itoh, Kento Nishimura, Kosuke Fukushima, Takao Onoye, "A Study for Classifying Sitting Condition by a Chair with Caster-Shaped Devices," ヒューマンインタフェース学会研究会研究報告集, volume 20, number 7, pages 85-90, 2018. [2.pdf]

[7] Yoshitaka Ishihara, Yuichi Itoh, Takao Onoye, "A Research on Adhesion Changeable Surface," ヒューマンインタフェース学会研究会研究報告集, 2018. [2.pdf]

[8] Ryo Shirai, Tetsuya Hirose, Masanori Hashimoto, "IoTノード向けアンテナ組込型小体積高効率トランスミッタの開発," 電子情報通信学会技術研究報告, volume Vol. 117, number No. 343, pages 159--163, December 2017.

[9] Ryo Shirai, Jin Kono, Tetsuya Hirose, Masanori Hashimoto, "近傍界磁界通信・電界測距共用mm^3級アンテナの実装と評価," 電子情報通信学会技術研究報告, volume Vol. 117, number No. 343, pages 101--105, December 2017.

[10] 岩瀬大輝, 伊藤雄一, 秦秀彦, 山下真由, 尾上孝雄, "アクティブ音響センシングを用いた物体識別と位置推定," 電子情報通信学会技術研究報告, volume 117, number 73, pages 135-140, June 2017.

[11] Masaki Masuyama, Yuichi Itoh, Kosuke Fukushima, Takao Onoye, "Chair Caster Device to Get the Center of Pressure and Weight of a Sitting Person," ヒューマンコミュニケーション基礎研究会（HCS）, volume 116, number 524, pages 95-100, March 2017.

[12] Ryo Shirai, "超小型IoTノード向けアンテナ組み込み型OOKトランスミッタの実装と評価," 第45回アナログRF研究会, page 2, March 2017.

[13] Mayu Yamashita, Yuichi Itoh, Kazuki Takashima, Takao Onoye, "A Study on Relationship between Learner's Confidence and Writing Behavior," ヒューマンインタフェース学会研究会研究報告集, volume 19, number 7, pages 71-76, 2017.

[14] 深町太一, 伊藤雄一, 尾上孝雄, "光信号を用いたアクチュエータ群制御システムの検討と評価," 日本バーチャルリアリティ学会研究報告, volume 21, number CS-4, pages 17-20, December 2016.

[15] Ken Fujiwara, Yuichi Itoh, Takemi Tsuzuki, Kazuki Takashima, Takao Onoye, "Estimating Ensembility among Players Using Their Body Sway and the Evaluation Toward Music Performance," HCGシンポジウム2016論文集, pages 186-189, December 2016.

[16] Shunichi Shoda, Liu Jin, Masahide Hatanaka, Takao Onoye, "Throughput Improvement Method of Wireless Lan with Node Localization," The 29th Workshop on Circuits and Systems, pages 81-83, May 2016.

[17] Taichi Fukamachi, "Implementation and Evaluation of Control Unit for Operating Multiple Actuators by Projected Images," ヒューマンインタフェース学会研究会研究報告集, volume 18, number 7, pages 31-34, 2016. [2.pdf]

[18] Mayu Yamashita, Yuichi Itoh, Kazuki Takashima, Takao Onoye, "A Method to Estimate Amount of Writing by Sensing Gripping Force," ヒューマンインタフェース学会研究会研究報告集, volume 18, number 5, pages 3-8, 2016.

[19] Takemi Tsuzuki, Yuichi Itoh, Ken Fujiwara, Kazuki Takashima, Takao Onoye, "A Study on Estimating Ensembility among Players Using Their Body Sway," ヒューマンインタフェース学会研究会研究報告集, volume 18, number 5, pages 15-18, 2016. [2.pdf]

[20] 増田豊，橋本昌宜，尾上孝雄, "電源ノイズ起因タイミング故障のデバッグにおける C 言語ベース故障検出手法の有効性評価," 情報処理学会DAシンポジウム, August 2015.

[21] Yuki Tsujimoto, Yuichi Itoh, Takao Onoye, "A Study on Condensation Generation Mechanism for Display with Water Condensation," 研究報告ヒューマンコンピュータインタラクション（HCI）, volume 2015-HCI-164, number 5, pages 001-005, July 2015.

[22] E. Aliwarga, J. Yu, M. Hatanaka, and T. Onoye, "Hardware Architecture of Generic Soft Cascaded Linear Svm Classifier," number 75, 電子情報通信学会ディペンダブルコンピューティング研究会, June 2015.

[23] 檜原弘樹, 岩崎晃, 橋本昌宜, 越智裕之, 密山幸男, 小野寺秀俊, 神原弘之, 若林一敏, 杉林直彦, 竹中崇, 波田博光, 多田宗弘, "センサの知能化に適したプロセッサアーキテクチャの考察," 電子情報通信学会ディペンダブルコンピューティング研究会, number DC2015-8, pages 43--48, April 2015.

[24] S. Iizuka, Y. Higuchi, M. Hashimoto, and T. Onoye, "Area Efficient Device-Parameter Estimation Using Sensitivity-Configurable Ring Oscillator," 電子情報通信学会 VLSI設計技術研究会, March 2015.

[25] 鵜川翔平，信田龍哉，橋本昌宜，伊藤雄一，尾上孝雄, "クロスエントロピー法を用いたノード間距離情報に基づく3次元ノード位置推定," 情報処理学会ヒューマンコンピュータインタラクション研究会, January 2015.

[26] 土井龍太郎, 橋本昌宜, 尾上孝雄, "時間的三重化によるソフトエラー耐性向上の解析的評価," 電子情報通信学会ディペンダブルコンピューティング研究会, November 2014.

[27] Fumiya Okada, Masahide Hatanaka, Takao Onoye, "An Approach to Carrier Sensing Method for Dynamic Spectrum Access," IEICE Technical Report, volume 114, number 205, pages 57-62, September 2014.

[28] 増田豊, 橋本昌宜, 尾上孝雄, "電源ノイズ起因電気的故障を対象としたソフトウェアベース高速エラー検出手法の性能評価," 情報処理学会DAシンポジウム, pages 203--208, August 2014.

[29] 飯塚翔一, 樋口裕磨, 橋本昌宜, 尾上孝雄, "感度可変リングオシレータを用いた省面積デバイスパラメータばらつき推定手法," 情報処理学会DAシンポジウム, pages 15--20, August 2014.

[30] 宮崎陽平, 伊藤雄一, 藤原健, 高嶋和毅, 尾上孝雄, "着座揺動による会話者の行動の同期性検出に関する検討," HCS2014-53, August 2014. [2.pdf]

[31] Kosuke Tomita, Masahide Hatanaka, Takao Onoye, "A Study on Gpu Implementation of Ofdm Transceiver Using Dynamic Spectrum Access," IEICE Technical Report, volume 114, number 122, pages 81-86, July 2014.

[32] 河野仁, 鵜川翔平, 信田龍哉, 塚元瑞穂, 田中勇気, 中島康祐, 伊藤雄一, 廣瀬哲也, 橋本昌宜, "リアルタイム3次元モデリングシステムiClayの実現に向けた1mm^3級センサノードの要素技術開発," LSIとシステムのワークショップ, May 2014.

[33] 飯塚翔一, 水野雅文, 黒田弾, 橋本昌宜, 尾上孝雄, "プロセッサの適応的速度制御における故障発生時間見積り高速化に関する研究," LSIとシステムのワークショップ, May 2014.

[34] 郡浦宏明, 密山幸男, 橋本昌宜, 尾上孝雄, "動的部分再構成による故障回避に適した初期配置配線の検討," 情報処理学会SLDM研究会, March 2014.

[35] 鵜川翔平, 信田龍哉, 伊藤雄一, 橋本昌宜, 尾上孝雄, "ノード間距離情報に基づいた逐次的3次元ノード位置推定手法の検討," 信学技報 CAS研究会, March 2014.

[36] 橋本昌宜, "オンチップばらつきモニタリングによる適応的性能補償 (Invited)," 信学技報 集積回路研究会, January 2014.

[37] 尾上孝雄, 橋本昌宜, 密山幸男, Dawood Alnajjar, 郡浦宏明, "VLSIの信頼性を向上させる再構成可能アーキテクチャ (Invited)," 信学技報リコンフィギャラブルシステム研究会, November 2013.

[38] Yusuke Kikuchi, Sho Tsugawa, Fumio Kishino, Kosuke Nakajima, Yuichi Itoh, Hiroyuki Ohsaki, "ココロスコア: Twitter解析によるココロの状態推測," 電子情報通信学会 通信行動工学時限研専 第5回研究会予稿集, pages 17-24, November 2013.

[39] Ryusuke Endo, Yuichi Itoh, Kosuke Nakajima, Fumio Kishino, "複合商業施設における複数人でのタイムスロット考慮型プランニングを実現するデジタルサイネージシステム," 情報処理学会研究報告集, volume 2013-HCI-155, number 9, pages 1-8, October 2013.

[40] Masahiro Ando, Toshiki Hosoi, Kosuke Nakajima, Yuichi Itoh, Yoshifumi Kitamura, Takao Onoye, "積み木型ブロックデ バイスのための赤外線による積み重ね認識手法に関する検討," ヒューマンインタフェース学会研究報告集, volume 15, number 7, pages 125-128, September 2013.

[41] 飯塚翔一, 水野雅文, 黒田弾, 橋本昌宜, 尾上孝雄, "適応的速度制御における連続時間マルコフ過程を用いた故障発生時間高速評価手法," 情報処理学会DAシンポジウム, August 2013.

[42] Yuki Fukuhara, Akihisa Yamada, Takao Onoye, "An Image Compression Method for Frame Memory Size Reduction Using Local Feature of Image," IEICE Technical Report, CAS2013-33, volume 113, number 118, pages 183-188, July 2013.

[43] Hiroaki Konoura, Takashi Imagawa, Yukio Mitsuyama, Masanori Hashimoto, Takao Onoye, "Flexible Reliaiblity Mixed-Grained Reconfigurable Architecture Supporting Behavioral Synthesis," 信学技報, RECONF2013-8, volume 113, number 52, pages 41-46, May 2013.

[44] 原田諒, 密山幸男, 橋本昌宜, 尾上孝雄, "放射線起因一過性パルスが信頼性に与える影響の実験的評価," LSI とシステムのワークショップ, May 2013.

[45] 郡浦宏明, Dawood Alnajjar, 密山幸男, 越智裕之, 今川隆司, 野田真一, 若林一敏, 橋本昌宜, 尾上孝雄, "C ベース設計に対応した信頼性可変粒度複合型再構成可能アーキテクチャ," LSIとシステムのワークショップ, May 2013.

[46] Taku Fujimoto, Yuichi Itoh, Kosuke Nakajima, Yoshinori Hijikata, Takao Onoye, "ついでタスク推薦のためのコン ピュータ作業のクラスタリングに関する一検討," ARG Webインテリジェンスとイ ンタラクション研究会 第2回研究会予稿集, pages 13-14, May 2013.

[47] 信田龍哉, 橋本昌宜, 尾上孝雄, "センサノード間静電容量結合に基づく距離推定に向けた電極形状の検討," 信学技報, CAS2012-119, volume 112, number 484, pages 131-136, March 2013.

[48] Takehiko Amaki, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye, "A Worst-Case-Aware Design Methodology for Oscillator-Based True Random Number Generator with Stochastic Behavior Modeling," IEICE Technical Report, VLD2012-154, volume 112, number 451, pages 099-104, March 2013.

[49] 樋口裕磨, 橋本昌宜, 尾上孝雄, "オンチップセンサを用いたばらつき自己補償手法の検討," 信学技報 VLSI設計技術研究会, March 2013.

[50] Hiroaki Konoura, Takashi Imagawa, Yukio Mitsuyama, Masanori Hashimoto, Takao Onoye, "An Observational Study on Fault-Avoidance Methods Using Dynamic Partial Reconfiguration," 信学技報, RECONF2012-59 , volume 112, number 325, pages 71-76, November 2012.

[51] Kazuaki Ikeda, Yuichi Itoh, Kosuke Nakajima, Takao Onoye, "着座時の座面重心と重量を用いた個人識別に関する検討," ヒューマンインタフェース学会研究報告集, volume 14, number 8, pages 11-16, September 2012.

[52] Kazuyuki Fujita, Yuichi Itoh, Kazuki Takashima, Kosuke Nakajima, Yusuke Hayashi, Fumio Kishino, "Ambient Party Room: パーティ場面における部屋型会話支援システムの構築," ヒューマンインタフェース学会研究報告集, volume 14, number 8, pages 7-10, September 2012.

[53] 中川雄太, 藤井佑一, 岸野文郎, 中島康祐, 伊藤雄一, "立体形状の毛状マルチタッチ ディスプレイ," エンタテインメントコンピューティング2012論文集, pages 195-198, September 2012.

[54] Kazutaka Takeuchi, Onoye Takao, "An Approach to Embedded System Implementation of Multi-View Video Decoding," IEICE Technical Report, volume 112, number 78, pages 71-76, June 2012.

[55] Yohei Kojima, Yuichi Itoh, Kazuyuki Fujita, Kosuke Nakajima, Takao Onoye, "空間内の複数人員配置のための指示位置提示手法に関する検討," ヒューマンインタフェース学会研究報告集, volume 14, number 4, pages 17-22, June 2012.

[56] Ryusuke Endo, Yuichi Itoh, Kosuke Nakajima, Kazuyuki Fujita, Fumio Kishino, "マルチタッチディスプレイを用いたプランニングができるデジタルサイネージシステムの提案," ヒューマンインタフェース学会研究報告集, volume 14, number 4, pages 37-42, June 2012.

[57] Toru Homemoto, Masahide Hatanaka, Takao Onoye, "An Approach to Fading Compensation for Dynamic Spectrum Access Wireless Communication Systems," IEICE Technical Report, CAS2011-126, volume 111, number 465, pages 109-114, March 2012.

[58] Takehiko Amaki, Masanori Hashimoto, Takao Onoye, "An Oscillator-Based True Random Number Generator with Jitter Amplifier," IEICE Technical Report, ICD2011-118, volume 111, number 352, pages 087-092, December 2011.

[59] Kazuaki Ikeda, Yuichi Itoh, Kosuke Nakajima, Takao Onoye, "様々な椅子での重心・重量による姿勢識別率に関する検討," ヒューマンインタフェース学会研究報告集, volume 13, number 7, pages 33-38, October 2011.

[60] Kazuaki Ikeda, Yusuke Hayashi, Kosuke Nakajima, Yuichi Itoh, Takao Onoye, "風精―気圧センサと風船を用いたタッチインタラクション検出," エンタテインメントコンピューティング2011論文集, pages 187-192, October 2011.

[61] T. Kameda, H. Konoura, Y. Mitsuyama, M. Hashimoto, T. Onoye, "スキャンパスを用いたＮＢＴＩ劣化抑制に関する研究," 情報処理学会DAシンポジウム, pages 201-206, August 2011.

[62] Takashi Nakamae, Akihisa Yamada, Masayuki Yamaguchi, Takao Onoye, "A Near-Lossless Image Compression Method for Frame Memory Size Reduction," IEICE Technical Report, CAS2011-29, volume 111, number 102, pages 163-168, June 2011.

[63] Hiroaki Konoura, Yukio Mitsuyama, Masanori Hashimoto, Takao Onoye, "Evaluation of Reliability Enhancement Achieved by Fault Avoidance on Dynamically Reconfigurable Architectures," IEICE Technical Report, RECONF2011-1, volume 111, number 31, pages 31-36, May 2011.

[64] Kosuke Nakajima, Yuichi Itoh, Takayuki Tsukitani, Kazuyuki Fujita, Kazuki Takashima, Fumio Kishino, "Fusa2 Touch Display: a Furry and Scalable Multi-Touch Display," インタラクション2011論文集, pages 547-550, March 2011.

[65] Takehiko Amaki, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye, "A Design Procedure for Oscillator-Based Physical Random Number Generator with Stochastic Behavior Modeling," IEICE Technical Report, SLDM2010-147, volume 2010-SLDM-147, number 19, pages 1-6, November 2010.

[66] Masashi OKADA, Takao ONOYE, Wataru KOBAYASHI, "A Ray Tracing Simulation of Sound Diffraction Based on Analytic Secondary Source Model," 信学技報, EA2010-65, volume 110 , number 239 , 043-048 , October 2010.

[67] Takashi Enami, Shuta Kimura, Masanori Hashimoto, Takao Onoye, "{Canary Ff Insertion Toward Self-Compensation of Performance}," 情報処理学会DAシンポジウム, pages 227-232, September 2010.

[68] Seiichi Sampei, Shinsuke Ibi, Shinichi Miyamoto, Takao Onoye, Masahide Hatanaka, "A Study on Wireless Access for Ambient Information Society Infrastructure - an Approach from Wireless Distributed Networking Technology -," IEICE Technical Report, SR2009-112, volume 109, number 442, pages 143-148, March 2010.

[69] Yasumichi Takai, Masanori Hashimoto, Takao Onoye, "Evaluation of Power Gating Structures Focusing on Power Supply Noise with Measurement and Simulation," number 信学技報 vol.110, No344, 電子情報通信学会(IEICE), 2010.

[70] Dan Kuroda, Hiroshi Fuketa, Masanori Hashimoto, Takao Onoye, "低エネルギー動作に適した超低電圧プロセッサのアーキテクチャ評価," 情報処理学会第141回システムLSI設計技術研究会, pp107-112, October 2009.

[71] Kenichi (Ken-ichi) Shinkai, Masanori Hashimoto, "A Gate-Delay Model Over Wide Range of Process and Environmental Variabilities," 情報処理学会DAシンポジウム, pages 73-78, August 2009.

[72] Masanori Hashimoto, Takashi Enami, Ken-ichi(Kenichi) Shinkai, Shinyu Ninomiya, Shinya Abe, "電源ノイズや製造ばらつきによるクロックジッタ・スキューを考慮した統計的タイミング解析," 情報処理学会DAシンポジウム, pages 79-84, August 2009.

[73] H. Konoura, Y. Mitsuyama, M. Hashimoto, T. Onoye, "Impact Evaluation of Stress Probability Calculation Method on Nbti Degradation," 情報処理学会DAシンポジウム, pages 181-186, August 2009.

[74] Hirotake Matsushita, Yuuki Kawamura, Takao Onoye, Kazuto Ohhara, Ikuo Keshi, "An Approach to High Speed Video Decoding Scheme for Mobile Devices," IEICE Technical Report SIS2009-4 (2009-6), pages 19-24, June 2009.

[75] Takehiko Amaki, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye, "An Analysis of Oscillator-Based True Random Number Generator with Markov Model," Proc. The 22th Workshop on Circuits and Systems in Karuizawa, pages 474-479, April 2009.

[76] Hiroshi Fuketa, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye, "Correlation Verification between Transistor Variability Model with Body Biasing and Ring Oscillation Frequency in Subthreshold Circuits," IEICE Technical Report, VLD2008-159, volume 108, number 478, pages 201-206, March 2009.

[77] Takashi Enami, Masanori Hashimoto, Takashi Sato, "Decoupling Capacitance Allocation for Timing with Statistical Noise Model and Timing Analysis," 信学技報, VLD2008-161, volume 108, number 478, pages 207-212, March 2009.

[78] Koichi Hamamoto, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye, "Layout Aware Cell Clustering for Body Biasing," IEICE Technical Report, VLD2008-159 , volume 108, number 478, pages 195-200, March 2009.

[79] Toshimitsu Tatsuka, Ryoji Hashimoto, Kenji Watanabe, Masahide Hatanaka, Takao Onoye, "A Study on Location Estimation Method for Cognitive Wireless Network Using Dynamic Spectrum Allocation," 信学技報, IN2008-220, volume 108, number 458, pages 523-528, March 2009.

[80] Ryoji Hashimoto, Hiroshi Tsutsui, Takao Onoye, Tomohiro Ikai, "Likelihood Estimation for Transform Domain Distributed Video Coding," IEICE Technical Report, IE2008-209, volume 108, number 425, pages 31-36, February 2009.

[81] Kosuke Kojima, Ryoji Hashimoto, Gen Fujita, "Rdo Based Sub-Pixel Motion Estimation Method for H.264," 電子情報通信学会技術研究報告, SIP2008-99, volume 104, number 213, pages 53-58, September 2008.

[82] Hiroshi Fuketa, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye, "Trade-Off Analysis between Timing Error Rate and Power Dissipation for Adaptive Speed Control with Timing Error Prediction," 情報処理学会DAシンポジウム, pages 217-222, August 2008.

[83] Kenji Watanabe, Toshimitsu Tatsuka, Masahide Hatanaka, Takao Onoye, "An Approach to Room Layout Estimation for Indoor Localization System," IEICE Technical Report, USN2008-33, volume 108, number 138, pages 129-134, July 2008.

[84] Masayuki Hiromoto, Hiroshi Tsutsui, Hiroyuki Ochi, Tomoyuki Osano, Norihiro Ishikawa, Yukihiro Nakamura, "Dynamic Rate Control for Media Streaming on High-Speed Mobile Network," マルチメディア，分散，協調とモバイル(DICOMO2008)シンポジウム, pages 1167-1176, July 2008.

[85] Yuki kawamura, Yasutake Manabe, Takao Onoye, Kazuto Ohara, Hiroyuki Okada, Ikuo keshi, "Implementation of Simultaneous Video Decoding on Multicore Processor," IEICE Technical Report, SIS2008-23, volume 108, number 86, pages 51-56, June 2008.

[86] Masashi Okada, Nobuyuki Iwanaga, Tomoya Matsumura, Takao Onoye, Wataru Kobayashi, "A 3d Sound Localization Method for Multiple Sound Sources Based on Fuzzy Clustering," IEICE Technical Report, SIS2008-1 , volume 108, number 85, pages 001-006, June 2008.

[87] Koichi Hattori, Hiroshi Tsutsui, Hiroyuki Ochi, Yukihiro Nakamura, "バス帯域を考慮した HD Photo における Photo Core Transform のアーキテクチャ," IEICE Technical Report, SIS2008-21, volume 108, number 85, pages 39-44, June 2008.

[88] Koichi Hamamoto, Hiroshi Fuketa, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye, "An Experimental Study on Body-Biasing Layout Style Focusing on Area Efficiency and Speed Controllability," IEICE Technical Report, CAS2008-14, VLD2008-27, SIP2008-48(2008-6), pages 75-79, June 2008.

[89] Yasuhiro Ogasahara, Masanori Hashimoto, Takao ONOYE, "Superposition Effect Validation of Inductive Coupling Noise Based on Measurement of Interconnect Delay Variation," 信学技報, VLD2007-153, March 2008.

[90] Hiroshi Kato, Akihisa Yamada, Takao Onoye, "An Image Compression Method for Frame Memory Reduction," 電子情報通信学会 CAS信学技報, volume 107, number 476, pages 31-36, January 2008.

[91] Yasuhiro Ogasahara, Masanori Hashimoto, Takao Onoye, "All Digital Gated Oscillator for Dynamic Supply Noise Measurement," IEICE Technical Report, CPM2007-131, ICD2007-142, pages 17-22, January 2008.

[92] Shinyu Ninomiya, Masanori Hashimoto, "A Study of Grid-Based Modeling of Spatially Correlated Manufacturing Variability for SSTA," IEICE Technical Report, VLD2007-91, DC2007-46, volume 107, number 336, pages 13-17, November 2007.

[93] Ryoji Hashimoto, K. Kato, Gen Fujita, Takao Onoye, Hirokazu UETSU, Gen FUJITA, Takao ONOYE, "Vlsi Architecture of H.264 Multi-Symbol Entropy Decoder for 1080hd," 第21回ディジタル信号処理シンポジウム, November 2007.

[94] M. Hashimoto, "製造・環境ばらつきを考慮したタイミング検証技術," 信学技報, VLD2007-65, pages 21-24, October 2007.

[95] Kimiya Kato, Ryoji Hashimoto, Gen Fujita, Takao Onoye, "Vlsi Architecture of Multi-Symbol Cabac Decoder for H.264/Avc High Profile," 信学技報, SIP2007-121, ICD2007-110, IE2007-80, pages 65-70, October 2007.

[96] Shinya Abe, Masanori Hashimoto, Takao Onoye, "Clock Skew Evaluation Considering Manufacturing Variability in Mesh-Style Clock Distribution," 情報処理学会DAシンポジウム, pages 133-138, August 2007.

[97] Hiroshi Tsutsui, Norimasa Fujita, Takao Onoye, Yukihiro Nakamura, "A Multi-Symbol Arithmetic Decoder for JPEG2000," IEICE Technical Report, SIS2007-3, volume 107, number 93, pages 13--18, June 2007.

[98] M. Hashimoto, "製造・環境ばらつきと動的性能補償を考慮したタイミング検証に向けて," 第20回 回路とシステム(軽井沢)ワークショップ, pages 661-666, April 2007.

[99] Kenichi (Ken-ichi) Shinkai, Masanori Hashimoto, Takao Onoye, "Self-Heating in Short Intra-Block Wires," Proc. The 20th Workshop on Circuits and Systems in Karuizawa, pages 7-12, April 2007.

[100] Takashi Enami, Shinyu Ninomiya, Masanori Hashimoto, "Statistical Timing Analysis Considering Spatially Correlated Dynamic Power Supply Noise," Proc. The 20th Workshop on Circuits and Systems in Karuizawa, pages 667-672, April 2007.

[101] Yasuhiro Ogasahara, Masanori Hashimoto, Takao Onoye, "Measurement of Delay Variation Due to Inductive Coupling Noise in 90nm Global Interconnects," IEICE Technical Report, CPM2006-131, ICD2006-173, pages 13--18, January 2007.

[102] Yasuhiro Ogasahara, Takashi Enami, Masanori Hashimoto, T. Sato, Takao Onoye, "Measurement of Delay Degradation Due to Power Supply Noise and Delay Variation Estimation with Full-Chip Simulation," IEICE Technical Report, CPM2006-132, ICD2006-174, pages 19--23, January 2007.

[103] Akihiro Yoshida, Tomoya Matsumura, Nobuyuki Iwanaga, Wataru Kobayashi, Takao Onoye, "A Method for Improvement of Sound Localization in the Proximal Region," Trans. Tech. Comm. Psychol. Physio. Acoust., The Acoustical Society of Japan,, H-2006-134, December 2006.

[104] Tomoya Matsumura, Akihiro Yoshida, Tomoya Matsumura, Nobuyuki Iwanaga, Wataru Kobayashi, "An Approach to Perceptual Improvement of 3d Sound Movement by Reproduction of Head-Related Transfer Function," Trans. Tech. Comm. Psychol. Physio. Acoust, The Acoustical Society of Japan, vol. 36, no.9, H--2006--135, December 2006.

[105] Yoshitaka Tanemura, Akio Kotani, Seiichi Yamazaki, Yukio Mitsuyama, Takao Onoye, "Estimation Method of Typographic Color Considering Visual Features," IEICE Technical Report SIS2006-70, volume 106, number 374, pages 69--74, November 2006.

[106] Jangsombatsiri Siriporn, Masanori Hashimoto, Takao Onoye, "シャントコンダクタンスを挿入したオンチップ伝送線路特性評価," 第十回シリコンアナログRF研究会, November 2006.

[107] Ryoji Hashimoto, Gen Fujita, Takao Onoye, "Dynamic Time Allocation Scheme in H.264 Encoding," IEICE The 21th SIP Symposium, D8-1, November 2006.

[108] Yoshihiro Nozato, Kazuyuki TAKAHASHI, Hiroyuki Okuhata, Takao Onoye, "Architecture for Lightness Presumption in Real-Time Video Image Enhancement," IEICE The 21th SIP Symposium, D8-3, November 2006.

[109] Takashi Enami, Masanori Hashimoto, Takao Onoye, "Statistical Modeling of Power/Ground Voltage Variation by Principal," 情報処理学会DAシンポジウム, pages 205--210, July 2006.

[110] Gen Fujita, Keita Ohkubo, Kenichi Joko, Makoto Saitsuji, Takao Onoye, "Efficient Vlsi Architecture for H.264 Cabac," IEICE Technical Report, SIS2006-34, pages 19--23, June 2006.

[111] Kazuyuki Takahashi, Yoshihiro Nozato, Hiroyuki Okuhata, Takao Onoye, "Reduced-Complexity Variational Retinex for Video Image Enhancement," IEICE Technical Report, SIS2006-3, pages 13--18, June 2006.

[112] Yasuhiro Ogasahara, Masanori Hashimoto, Takao Onoye, "Quantitative Prediction of Capacitive and Inductive Crosstalk Noise in LSI Interconnects," IEICE The 19th Workshop on Circuits and Systems in Karuizawa, pages 5--10, April 2006.

[113] Kenichi (Ken-ichi) Shinkai, Masanori Hashimoto, Atsushi Kurokawa, Takao Onoye, "A Gate Delay Model Focusing on Current Fluctuation Over Wide-Range of Process and Environmental Variability," Proc. The 19th Workshop on Circuits and Systems in Karuizawa, pages 559-564, April 2006.

[114] Tetsuya Imafuku, Nobuyuki Iwanaga, Tomoya Matsumura, Wataru Kobayashi, Takao Onoye, "An Approach to 3D Sound Movement for Multiple Sound Sources," IEICE Technical Report, SP2005-131, pages 47-52, March 2006.

[115] Masanao Ise, Yasuhiro Ogasahara, Kenji Watanabe, Masahide Hatanaka, Takao Onoye, Hiroaki Niwamoto, I. Keshi, Isao Shirakawa, "Wireless Network Protocol for Home Network Based on IEEE 802.15.4," IEICE Technical Report, CAS2005-99, pages 19--24, March 2006.

[116] Takahiro Ijichi, Masanori Hashimoto, Shingo Takahashi, Shuji Tukiyama, Isao Shirakawa, "Transistor Sizing for LCD Driver Circuit under Constraint of Charged Pixel Voltage," Proc. Technical Report of IEICE, VLD2005-131, pages 55--60, March 2006.

[117] Kenji Watanabe, Masanao Ise, Gen Fujita, Masahide Hatanaka, Takao Onoye, Hiroaki Niwamoto, Isao Shirakawa, I. Shirakawa, "Improvement of Power Consumption and Response Time in Wireless Home Network," IEICE Technical Report, CAS2005-100, pages 25--30, March 2006.

[118] Gen Fujita, Takao Onoye, Isao Shirakawa, "Vlsi Implementation of High Accuracy Motion Estimation Core for Mpeg-4," IEICE Trans. Fundamentals, volume J88-A, number 11, pages 1282--1291, November 2005.

[119] Akio Kotani, Yoshitaka Tanemura, Yoshimi Asai, Yasuhisa Nakamura, Masaaki Otsuka, Yukio Mitsuyama, Takao Onoye, "Evaluation Method of Center of Gravity on FONT and Its Application to Readability Assessment," IEICE Technical Report SIS2005-23, pages 1--6, September 2005.

[120] Akihiro Yoshida, Tomoya Matsumura, Nobuyuki Iwanaga, Wataru Kobayashi, Takao Onoye, "Feature Analysis of Head-Related Transfer Function for Sound Localization of Nearby Sources," IEICE Technical Report EA2005-39, pages 29--34, August 2005.

[121] Yasuhiro Ogasahara, Masanori Hashimoto, Takao Onoye, "Measurement and Evaluation of Delay Variation Due to Inductive and Capacitive Coupling Noise," IEICE Technical Report, SDM2005-135, ICD2005-74, pages 43--48, August 2005.

[122] Yoshihiro Nozato, Hiroyuki Okuhata, Takao Onoye, Isao Shirakawa, "Comparison of Retinex Models for Hardware Imprementation," IEICE Technical Report SIS2005-16, pages 19--24, June 2005.

[123] Gen Fujita, Takaaki Imanaka, Huynh Van Nhat, Takao Onoye, Isao Shirakawa, "Real-Time Human Object Extraction Method Based on Color Space Segmentation for Mobile Systems," in Proc.The 18th Workshop on Circuits and Systems in Karuizawa, pages 431--436, April 2005.

[124] ワットカナッド・ウィラポーン, Motoki Kimura, Gen Fujita, Takao Onoye, Isao Shirakawa, "動画像マルチデコーダ用動き補償機構のVLSIアーキテクチャ," Proc. Technical Report of IEICE, SIS2004-62, pages 37--43, March 2005.

[125] 盧承烈, Yasuhiro Ogasahara, Masanao Ise, Masahide Hatanaka, Takao Onoye, Hiroaki Niwamoto, 芥子育雄, Isao Shirakawa, "ユニバーサルプラグアンドプレイ技術を用いたホームネットワーク一構成方式," 信学技報, CAS2004-68, pages 7--12, January 2005.

[126] 郭朝暉, Yuki Nishikawa, Roberto Yuji Omaki, Takao Onoye, Isao Shirakawa, "Motion JPEG2000 における誤り訂正符号の割当て手法," 信学技報, CAS2004-67, pages 1--6, January 2005.

[127] Yoshihiro Uchida, Sadahiro Tani, Masanori Hashimoto, Shuji Tukiyama, Isao Shirakawa, "Interconnect Capacitance Extraction for System LCD Circuits," Proc. Technical Report of IEICE, VLD2004-64, pages 19--24, December 2004.

[128] Akio Kotani, Yoshimi Asai, Yasuhisa Nakamura, Masaaki Otsuka, Yukio Mitsuyama, Takao Onoye, "Contour-Based Evaluation Method of Center of Gravity on "LCFONT"," Proc. Technical Report of IPSJ, 2004-HI-111, pages 63--70, November 2004.

[129] Motoki Kimura, Yukio Mitsuyama, Takao Onoye, Isao Shirakawa, "組込みシステム向け IEEE802.11i 暗号処理回路の実装," 信学技報, ICD2004-129, pages 49--54, October 2004.

[130] Rintaro Imai, Yukio Mitsuyama, Takao Onoye, Isao Shirakawa, "メディア処理向けリコンフィギュラブルアーキテクチャに関する一検討," 電子情報通信学会 第4回リコンフィギャラブルシステム研究会, pages 33--40, September 2004.

[131] Motoki Kimura, Yukio Mitsuyama, Takao Onoye, Isao Shirakawa, "Embedded Implementation of IEEE802.1i Cipher Algorithms," Proc. Technical Report of IEICE, ICD2004-129, pages 217--222, April 2004.

[132] Yosuke Nakagawa, Nobuyuki Iwanaga, Wataru Kobayashi, Kazuhiko Kotani, Takao Onoye, Isao Shirakawa, "Binaural Sound Reproduction Based on Frequency Characteristic Elimination Through Stereo Speakers," Trans. Tech. Comm. Psychol. Physiol. Acoust.,The Acoustical Society of Japan, pages 17--22, January 2004.

[133] Yoshihiro Uchida, Sadahiro Tani, Shuji Tukiyama, Isao Shirakawa, "Parasitic Capacitance Modeling for On-Chip Interconnects," Technical Report of IEICE, NLP2003-21, pages 7--12, June 2003.

[134] Nobuyuki Iwanaga, Noriaki Sakamoto, Wataru Kobayashi, Takao Onoye, Isao Shirakawa, " `Out-Of-Head' Acoustic Field Enhancement with Stereo Headphone for Embedded System and Its Implementation," Proc. IEICE the 17th Digital Signal Processing Symposium, B2-4, November 2002.

[135] Nobuyuki Kawahara, Masahiro Otani, Takao Onoye, Isao Shirakawa, "A Design of Video Transmission System Using IEEE802.11b PHY," ibid, B6-1, September 2002.

[136] Atsushi Kosaka, Satoshi Yamaguchi, Hiroyuki Okuhata, Takao Onoye, Isao Shirakawa, "VLSI Implementation of Ogg Vorbis Audio Decoder with Embedded Processor and Specific Hardware," Technical Report of IEICE, SDM2002-159, ICD2002-70, pages 37--42, August 2002.

[137] Tsutomu Okada, Tsubasa Uchida, Takao Onoye, Isao Shirakawa, "Architecture of Pseudo Random Noise Code Generator for Next-Generation GNSS Receiver," Technical Report of IEICE, DSP2002-69, pages 19--24, June 2002.

[138] Sadahiro Tani, Yoshihiro Uchida, Shuji Tukiyama, Isao Shirakawa, "A Parasitic Capacitance Modeling Method for Multilevel Interconnects," Technical Report of IEICE, DSP2002-83, pages 7--12, June 2002.

[139] Katsuya Nakagawa, Shou Kawakita, Koji Sato, Keitaro Hanada, Toru Chiba, Isao Shirakawa, "Adaptive Object Sharing Scheme for Heterogeneous Environment," IEICE The 15th Workshop on Circuits and Systems in Karuizawa, pages 161--166, April 2002.

[140] H. Song, Alten-Erdene Shiitev, Hiroyuki Okada, Gen Fujita, Takao Onoye, Isao Shirakawa, "Error Concealment Algorithm in MPEG-4 Video Coding," IEICE The 15th Workshop on Circuits and Systems in Karuizawa, pages 95--100, April 2002.

[141] Hiroshi Mizuno, Hiroyuki Kobayashi, Takao Onoye, Isao Shirakawa, "Power Estimation at Architecture Level for Embedded System," IEICE The 15th Workshop on Circuits and Systems in Karuizawa, pages 435--440, April 2002.

[142] Takashi Nakagawa, Shinsuke Hamanaka, X. Y. He, Gen Fujita, Isao Shirakawa, "VLSI Architecture for MPEG-4 Core Profile Video Codec," TECHNICAL REPORT OF IEICE, VLD2001-136, pages 31--38, January 2002.

[143] Motoki Kimura, Morgan Hirosuke Miki, Takao Onoye, Isao Shirakawa, "Implementation of Java Execution Environment for Embedded Systems," TECHNICAL REPORT OF IEICE, VLD2001-137, pages 39--44, January 2002.

[144] Masahiro Otani, Nobuyuki Kawahara, Hiroyuki Nakaoka, Tomonobu Tomaru, Kazuto Maruyama, Takao Onoye, Isao Shirakawa, "Design of a Wireless Digital Video Transmission System with Data Frame Selective Repeat Hybrid ARQ Protocol," TECHNICAL REPORT OF IEICE, CAS2001-93, pages 25--30, November 2001.

[145] Masahiro Otani, Nobuyuki Kawahara, Tomonobu Tomaru, Kazuto Maruyama, Takao Onoye, Isao Shirakawa, "Error Correction Block Based ARQ Method for Video Transmission System," DSP Symposium, pages 711--717, November 2001.

[146] Katsuya Nakagawa, Koji Sato, Yasuhi Tsumori, Keitaro Hanada, Isao Shirakawa, "Object Communication Environment for Arbitrary Network (OCEAN)," DPS Workshop, pages 19--24, September 2001.

[147] H. S. Song, Altan-Erdene Shiitev, Hiroyuki Okada, Gen Fujita, Takao Onoye, Isao Shirakawa, "Error Concealment Algorithm and Architecture for MPEG-4 Video Transmission," TECHNICAL REPORT OF IEICE, CAS2001-10, pages 71--77, June 2001.

[148] Yukio Mitsuyama, Zaldy Andales, Takao Onoye, Isao Shirakawa, "VLSI Implementation of High Performance Burst Mode for 128-Bit Block Ciphers," TECHNICAL REPORT OF IEICE, CAS2001-41, pages 89--94, June 2001.

[149] Gen Fujita, M. Tarui, Kenji Hontani, Hiroyuki Okuhata, Isao Shirakawa, "Realtime Extraction Algorithm Dedicated to Face Objects," TECHNICAL REPORT OF IEICE, DSP2001-31, pages 87--92, June 2001.

[150] Noriaki Sakamoto, Wataru Kobayashi, Takao Onoye, Isao Shirakawa, "DSP Implementation of Realtime 3D Sound Localization Algorithm and Its Evaluation," TECHNICAL REPORT OF IEICE, CAS2001-50, pages 147--154, June 2001.

[151] Yukio MITSUYAMA, Zaldy ANDALES, Takao ONOYE, and Isao SHIRAKAWA, "A New Approach for 128-Bit Block Ciphers," In IEICE The 14th Karuizawa Workshop on Circuits and Systems, pages 231--236, April 2001.

[152] Morgan Hirosuke Miki, Mamoru Sakamoto, Yoshinori Takeuchi, Toyohiko Yoshida, Isao Shirakawa, "Evaluation of Processor Code Efficiency for Embedded Systems," IEICE The 14th Karuizawa Workshop on Circuits and Systems, pages 113--118, April 2001.

[153] Tian Song, H. S. Song, Gen Fujita, Takao Onoye, Isao Shirakawa, "VLSI Design of H.263 Version2 Codec Core," IEICE The 14th Karuizawa Workshop on Circuits and Systems, pages 561--566, April 2001.

[154] Tatsuo Watanabe, Nagisa Ishiura, "Datapath Oriented Codesign Method of Application Specific DSPs by Retargetable Compiler," TECHNICAL REPORT OF IEICE, VLD2000-89, pages 119--124, November 2000.

[155] Noriaki Sakamoto, Wataru Kobayashi, Takao Onoye, Isao Shirakawa, "Embedded DSP Implementation of Realtime 3D Sound Localization Algorithm for Monaural Sound Source," IEICE the 15th DIGITAL SIGNAL PROCESSING SYMPOSIUM. C6-2, pages 599--604, November 2000.

[156] Tian Song, H. S. Song, Gen Fujita, Takao Onoye, Isao Shirakawa, "A Codec of H.263 Advanced Intra Coding Mode and It's Architecture," TECHNICAL REPORT OF IEICE, DSP2000-107, pages 45--50, October 2000.

[157] H. S. Song, Tian Song, Hiroyuki Okada, Gen Fujita, Takao Onoye, Isao Shirakawa, "An Error Concealment Algorithm Using Motion Estimation Method for MPEG-4 Video," TECHNICAL REPORT OF IEICE, DSP2000-107, pages 37--43, October 2000.

[158] Katsuya Nakagawa, Shou Kawakita, Koji Sato, Mitsuru Minakuchi, Isao Shirakawa, "Object Communication Scheme for Heterogeneous Environment," DICOMO 2002 Symposium, pages 197--200, July 2000.

[159] Wataru Kobayashi, Noriaki Sakamoto, Takao Onoye, Isao Shirakawa, "3D Sound Localization Real-Time Algorithm and Its Low Power DSP Implementation," TECHNICAL REPORT OF IEICE, CAS2000-13, pages 97--102, June 2000.

[160] Ryo Kuroda, Gen Fujita, Takao Onoye, Isao Shirakawa, "A VLSI Architecture for Shape-Adaptive Descrete Cosine Transformer Dedicated to MPEG-4 Video Codec," TECHNICAL REPORT OF IEICE, CAS2000-14, pages 103--108, June 2000.

[161] Yukio Mitsuyama, Zaldy Andales, Takao Onoye, Isao Shirakawa, "VLSI Implementation of Dynamically Reconfigurable Hardware-Based Cryptosystem," IEICE The 13th Karuizawa Workshop on Circuits and Systems, pages 367--372, April 2000.

[162] Shohei Yamada, Morgan Hirosuke Miki, Gen Fujita, Takao Onoye, Isao Shirakawa, "Hardware-Based Bit-Rate Control for Low Bit-Rate Video Coding," IEICE The 13th Karuizawa Workshop on Circuits and Systems, pages 385--390, April 2000.

[163] Tatsuo Watanabe, Nagisa Ishiura, Masayuki Yamaguchi, "A Code Generation Method for Datapath Oriented Codesign of Application Specific DSPs," IEICE The 13th Karuizawa Workshop on Circuits and Systems, pages 539--544, April 2000.

[164] Akimasa Niwa, Shinya Hashimoto, Hiroyuki Okuhata, Takao Onoye, Isao Shirakawa, "A VLSI Implementation of Portable MPEG-4 Audio Decoder," The 14th Digital Signal Processor Symposium, pages 629--634, November 1999.

[165] Zaldy ANDALES, Yukio Mitsuyama, Koji Asari, Takao Onoye, Isao Shirakawa, "An Approach to Reconfigurable Hardware-Based Cryptosystems," TECHNICAL REPORT OF IEICE, CAS99-63, NLP99-87, pages 7--14, September 1999.

[166] Makoto Furuie, Song Baoyu, Yukihiro Yoshida, Takao Onoye, Isao Shirakawa, "Array Cell Architecture for NMOS 4-Phase Dynamic Logic," TECHNICAL REPORT OF IEICE, CAS99-62, NLP99-86, pages 1--6, September 1999.

[167] Morgan Hirosuke Miki, Shohei Yamada, Gen Fujita, Takao Onoye, Isao Shirakawa, "Low-Power Implementation of H.263 Codec for Mobile Computing," DA Symposium '99, pages 183--188, July 1999.

[168] Makoto Furuie, Kenji Matsumura, Gen Fujita, Toshihiro Masaki, Isao Shirakawa, Hiroshi Inada, "LSI Implementation of Wireless Data System Controller for Medical Cares," TECHNICAL REPORT OF IEICE, CAS99-32, pages 15--19, June 1999.

[169] Yuji Robert Omaki, Gen Fujita, Takao Onoye, Isao Shirakawa, "A Video Coder Architecture Based on Discrete Wavelet Transform," TECHNICAL REPORT OF IEICE, CAS99-33, pages 21--28, June 1999.

[170] Tatsuo Watanabe, Nagisa Ishiura, Masayuki Yamaguchi, "Scheduling Algorithm of Retargetable Compiler for Non-Orthogonal Datapaths," IEICE The 12th Karuizawa Workshop on Circuits and Systems, pages 109--114, April 1999.

[171] Masahide Hatanaka, Toshihiro Masaki, Takao Onoye, Kouzou Murakami, "VLSI Architecture of Switching Control for AAL Type2 Switch," IEICE The 12th Karuizawa Workshop on Circuits and Systems, pages 427--432, April 1999.

[172] Mizuki Takahashi, Nagisa Ishiura, Akihisa Yamada, Takashi Kambe, "Thread Partitioning Method for Hardware Compiler Bach," IEICE The 12th Karuizawa Workshop on Circuits and Systems, pages 103--108, April 1999.

[173] Yasushi Hattori, Nagisa Ishiura, Masayuki Yamaguchi, "Operation and Transfer Binding of Retargetable Compilation for DSP," TECNICAL REPORT OF IEICE, VLD98-125, volume 98, number 447, pages 55-61, December 1998.

[174] Daisuke Taki, M.H. Miki, Gen Fujita, Takao Onoye, Isao Shirakawa, Toru Fujiwara, Tadao Kasami, "VLSI Implementation of a Recursive Maximum Likelihood Decoder Dedicated to High-Speed Satellite Communication," TECHNICAL REPORT OF IEICE, VLD98-52, pages 57--62, September 1998.

[175] Hideyuki Fujishima, Yusuke Takemoto, Tomokazu Yoneda, Takao Onoye, Isao Shirakawa, "Function Modules for Video Decoding and Computer Graphics," TECHNICAL REPORT OF IEICE, VLD98-41, pages 31--38, September 1998.

[176] Yukio Mitsuyama, Koji Asari, Takao Onoye, Isao Shirakawa, Takaaki Baba, Tatsuo Otsuki, "Reconfigurable Logic Based on Ferroelectric Non-Volatile Memory," TECHNICAL REPORT OF IEICE, ICD98-119, pages 53--58, August 1998.

[177] Yusuke Takemoto, Tomokazu Yoneda, Hideyuki Fujishima, Takao Onoye, Isao Shirakawa, "VLSI Implementation of Function Module for Texture Mapping and Motion Compensation," TECHNICAL REPORT OF IEICE, VLD98-33, pages 19--26, July 1998.

[178] Morgan Hirosuke Miki, Gen Fujita, Hiroyuki Okuhata, Takao Onoye, Isao Shirakawa, "Low-Power Implementation of H.324 Audiovisual Codec for Mobile Computing," IEICE The 11th Karuizawa Workshop on Circuits and Systems, pages 439--444, April 1998.

[179] Masayuki Yamaguchi, Nagisa Ishiura, Takashi Kambe, "A Binding Algorithm for Retargetable Compiler to Non-Orthogonal Datapaths," IEICE The 11th Karuizawa Workshop on Circuits and Systems, pages 481--486, April 1998.

[180] Yusuke Takemoto, Hideyuki Fujishima, Takao Onoye, Isao Shirakawa, "An Architecture of Matrix-Vector Multiplier Dedicated to Video Decoding and Three-Dimensional Computer Graphics," IEICE The 11th Karuizawa Workshop on Circuits and Systems, pages 451--456, April 1998.

[181] Hiroyuki Okuhata, Morgan Hirosuke Miki, Takao Onoye, Isao Shirakawa, "A Low-Power DSP for Low Bitrate Speech Code," The 12th Digital Singal Processor Symposium, pages 651-655, November 1997.

[182] Koji Miyanohana, Gen Fujita, Kazuhiro Yanagida, Takao Onoye, Isao Shirakawa, "Implementation of Encoder-Decoder for Low Bitrate Visual Communication Dedicated to Mobile Computing," Technical Report of IEICE, DSP97-107, volume 97, number 315, pages 17-24, October 1997.

[183] Masayuki Yamaguchi, Nagisa Ishiura, Takashi Kambe, "A Method of Retargetable Compilation for Embedded Systems," Technical Report of IEICE, VLD97-90, FTS97-53, pages 85-92, October 1997.

[184] Tetsuzaburo Yamamoto, Nagisa Ishiura, Masayuki Yamaguchi, Yasushi Hattori, "A High-Level Synthesis System for Embeded System," Technical Report of IEICE, VLD97-91, FTS97-54, pages 93-99, October 1997.

[185] Takash Sawa, Akira Nagao, Isao Shirakawa, Takashi Kambe, Kunihiro Chihara, "Layout for MMICs Based on Rectangle-Packing," Technical Report of IEICE, VLD97-97, FTS97-60, pages 141-146, October 1997.

[186] Hideyuki Fujishima, Yusuke Takemoto, Takao Onoye, Isao Shirakawa, "An Architecture of Unified Media-Processor Dedicated to Video Coding and Computer Graphics," The 2th Image Media-Processor Symposium, pages 23-24, October 1997.

[187] Gen Fujita, Morgan Hirosuke Miki, Takao Onoye, Isao Shirakawa, "VLSI Implementation of H.263 Video Coding Dedicated to Mobile Computing," The 12th Image Encoding Symposium, pages 51-52, October 1997.

[188] Tadashi Arai, Nobuaki Mizutani, Takashi Aizu, Hitoshi Kondo, "GPSを用いた連続変位量観測による地すべり移動特性について ---長野県倉並地すべりの例---," 第36回地すべり学会研究発表講演集, pages 365-368, August 1997.

[189] Takash Sawa, Akira Nagao, Takashi Kambe, Isao Shirakawa, Kunihiro Chihara, "A Method for Rectangle Packing Problem," IEICE Technical Report, DSP97-53, pages 159-166, June 1997.

[190] Toshihiro Masaki, Yasuhiro Nakatani, Takao Onoye, Kouzou Murakami, "Voice Communication on Multimedia ATM Network and Its VLSI Implementation," Technical Report of IEICE, IN97-10, pages 39-46, April 1997.

[191] Seiken Yano, Nagisa Ishiura, "Testing Embedded Memory Array Through a Scannable Configuration," IEICE The 10th Karuizawa Workshop on Circuits and Systems, pages 95-100, April 1997.

[192] Akira Nagao, Takash Sawa, Masaya Isobe, Takashi Kambe, Isao Shirakawa, "A Layout Approach Dedicated to Monolithic Microwave IC," IEICE The 10th Karuizawa Workshop on Circuits and Systems, pages 433-438, April 1997.

[193] Norikazu Shimizu, Hitoshi Kondo, Koichi Miyashita, Hiroshi Ono, "GPS地盤変位モニタリングシステムによる残壁の長期観測実験," 第28回岩盤力学に関するシンポジウム講演論文集, pages 388-392, January 1997.

[194] Masayuki Yamaguchi, Toshihiro Nakaoka, Takashi Kambe, "データパス構成と並列制約にもとづくアーキテクチャ評価システム," 電子情報通信学会技術研究報告, VLD96-74, CPSY96-86, pages 71-78, December 1996.

[195] Yasuhiro Nakatani, Toshihiro Masaki, Takao Onoye, Kouzou Murakami, "VCI 共有セルを用いたマルチメディア ATM 通信手法と VLSI 設計," 電子情報通信学会技術研究報告, DSP96-90, volume 96, number 301, pages 39-46, October 1996.

[196] Koji Miyanohana, Gen Fujita, Takao Onoye, Isao Shirakawa, "低ビットレート画像符号化アルゴリズムとその VLSI 化設計," 電子情報通信学会技術研究報告, DSP96-89, volume 96, number 301, pages 33-38, October 1996.

[197] Hiroshi Sato, Yasuo Morimoto, Toshihiro Masaki, Takao Onoye, Isao Shirakawa, "1チップ MPEG2 デコーダの設計と動き補償器の VLSI 実装," 情報処理学会DAシンポジウム'96, pages 47-52, August 1996.

[198] Shun Morikawa, Keisuke Okada, Sumitaka Takeuchi, Isao Shirakawa, "高性能定係数FIRフィルタのVLSI化設計," 情報処理学会DAシンポジウム'96, pages 41-46, August 1996.

[199] Norikazu Shimizu, Hiroshi Ono, Hitoshi Kondo, Yoshiaki Mizuta, "長大残壁の安全監視へのGPS変位計測システムの応用に関する現場実験," 資源と素材, volume 112, pages 283-288, May 1996.

[200] Hitoshi Kondo, "GPSの地すべり計測への応用," 第40回システム制御学会研究発表講演会 (チュートリアルセッション), pages 15-20, May 1996.

[201] S. Yano, K. Akagi, and N. Ishiura, "A New Scan Path Approach to Memory Array Testing," In 電子情報通信学会第9回回路とシステム軽 井沢ワークショップ, pages 55-60, April 1996.

[202] Shun Morikawa, Keisuke Okada, Sumitaka Takeuchi, Isao Shirakawa, "ディジタル映像伝送向け高性 能FIRフィルタのVLSI化設計," 電子情報通信学会第9回回路とシステム軽 井沢ワークショップ, pages 359-364, April 1996.

Book

[1] M. Hashimoto and R. Nair, "Power Integrity for Nanoscale Integrated Systems," McGraw-Hill Professional, February 2014.

[2] Yuichi Itoh, Kosuke Nakajima, “ふさふさ”感触マルチタッチディスプレイの開発, 株式会社エヌ・ティー・エス,, 2013.

[3] Yuichi Itoh, Kosuke Nakajima, 「ふさふさ」した触り心地を実現する光ファイバによる毛状マ ルチタッチディスプレイ, 株式会社技術情報協会,, 2013.

Article

[1] 佐藤高史, 橋本昌宜, "経時劣化概説," 信頼性学会誌, volume 35, number 8, pages 457--458, December 2013.

[2] 橋本昌宜, "超低電力サブスレッショルド回路設計技術 ," IEICE Fundamentals Review, pages 30--37, July 2013.

[3] Kiyoshi Kiyokawa, Masahide Hatanaka, Kazufumi Hosoda, Masashi Okada, Hironori Shigeta, Yasunori Ishihara, Fukuhito Ooshita, Hirotsugu Kakugawa, Satoshi Kurihara, Koichi Moriyama, "オーエンス・ルイス：アンビエント環境制御を用いた知的オフィスチェアの提案," システム制御情報学会誌, volume 56, number 1, pages 14-20, January 2012.

[4] Yuichi Itoh, Kosuke Nakajima, "〜「ふさふさ」した触り心地〜 光ファイバによる毛状マルチタッチディスプレイ," MATERIAL STAGE, volume 11, number 8, pages 13-16, November 2011. [2.pdf]

[5] 橋本昌宜, "遅延ばらつきを考慮したVLSIタイミング検証," エレクトロニクス実装学会誌, volume 11, number 3, pages 182--185, May 2008.

IEICE Spring and Fall Conferences etc

[1] 山下真由, 伊藤雄一, 石原好貴, 上田将理, 綛田峰矢, 尾上孝雄, "KeyPressense: キーの押下開始タイミングを検知できるキーボード," エンタテインメントコンピューティングシンポジウム2017論文集, volume 2017, pages 298-300, 2017. [2.pdf]

[2] Mayu Yamashita, Taichi Fukamach, Ryoya Kachi, Adam Myers, Jesse Marciano, Yuichi Itoh, "Ocuduss: Speed Sensation Presentation Device by Optical Flow Control," 情報処理学会インタラクション2017論文集, pages 745-748, 2017. [2.pdf]

[3] Yuki Tsujimoto, Yuichi Itoh, Takao Onoye, "A Study on the Method for Thickness Control of an Interactive Display with Water Condensation," 情報処理学会インタラクション2017論文集, pages 053-058, 2017.

[4] 佐藤雅紘, 飯塚翔一, 粟野皓光, 橋本昌宜, 尾上孝雄, "NBTIによる閾値電圧変化の確率的モデル化に関する一考察," 2015年電子情報通信学会総合大会講演論文集, March 2015.

[5] 河野仁, 橋本昌宜, 近藤利彦, 森村浩季, "超小型コイルを用いた近距離無線通信における周辺コイルの影響評価," 2015年電子情報通信学会総合大会講演論文集, March 2015.

[6] 益田涼平, 橋本昌宜, 尾上孝雄, "サーモパイル型赤外線センサを用いた人感センサの性能評価," 2015年電子情報通信学会総合大会講演論文集, March 2015.

[7] 宮崎陽平, 伊藤雄一, 藤原健, 高嶋和毅, 尾上孝雄, "SenseChairによる会話者間の同調傾向検出," 情報処理学会インタラクション2015論文集, March 2015. [2.pdf]

[8] 安藤正宏, 細井俊輝, 伊藤雄一, 高嶋和毅, 北村喜文, "StackBlock: 積み重ね形状認識可能なブロック型UI," 情報処理学会インタラクション論文集, 2015.

[9] 宮崎陽平, 伊藤雄一, 藤原健, 高嶋和毅, 尾上孝雄, "SenseChairを用いた眠気検出に関する検討," 情報処理学会インタラクション2014論文集, March 2014. [2.pdf]

[10] 安藤正宏, 細井俊輝, 中島康祐, 高嶋和毅, 伊藤雄一, 足立智昭, 尾上孝雄, 北村喜文, "StackBlock: 積み重ね形状構築を可能とするブロック型デバイス," 情報処理学会インタラクション論文集, pages 135-142, 2014.

[11] 宮崎陽平, 安藤正宏, 藤田悠矢, 羽鹿諒, Ondreicka Merrielle, 伊藤雄一, "ケツログラフィティ: 結露を用いたインタラクティブディスプレイ," EC2013, October 2013.

[12] 作田賢志朗, 安部晋一郎, 渡辺幸信, 原田諒, 橋本昌宜, 更田裕司, 上村大樹, "宇宙線中性子起因マルチセルアップセットのスケーリング則調査," 応用物理学会秋期学術講演会, September 2013.

[13] Yuta Nakagawa, Fumio Kishino, Kosuke Nakajima, Yuichi Itoh, "半球状の毛状マルチタッチディスプレイにおけるタッチインタラクション認識," 日本バーチャルリアリティ学会第18回大会論文集, pages 659-660, September 2013.

[14] Yuya Itoh, Fumio Kishino, Kosuke Nakajima, Yuichi Itoh, "毛状ディスプレイの特定領域内での触感変化に関する検討," 日本バーチャルリアリティ学会第18回大会論文集, pages 390-391, September 2013.

[15] Shotaro Uchida, Fumio Kishino, Kazuaki Ikeda, Kosuke Nakajima, Yuichi Itoh, "SenseChairを用いた眠気検出に関する検討," 電子情報通信学会総合大会講演論文集（基礎・境界）, page 215, March 2013.

[16] Kentaro Tomita, Yuta Nakagawa, Yuichi Fujii, Fumio Kishino, Kosuke Nakajima, Yuichi Itoh, "毛状ディスプレイの触感変化に関する検討," 電子情報通信学会総合大会講演論文集（基礎・境界）, page 214, March 2013.

[17] Yusuke Nemoto, Yuta Nakagawa, Yuichi Fujii, Fumio Kishino, Yuichi Itoh, 伊藤雄一, "吹きかけインタラク ションのための入力検出法の検討," 電子情報通信学会総合大会講演論文集（基礎・境界）, page 213, March 2013.

[18] Masashi Okada, Masahide Hatanaka, Takao Onoye, "Realization of Secure Ambient Wireless Network System Based on Spatially Distributed Ciphering Function," 第14回 DSPS教育会議 予稿集, pages 71-72, September 2012.

[19] 上野美保, 橋本昌宜, 尾上孝雄, "電気的タイミング故障のデバッグ向けオンチップリアルタイム電源電圧センサ," 電子情報通信学会2009ソサイエティ大会2012, volume A-3-6, page 53, September 2012. [2.pdf]

[20] Yuta Nakagawa, Yuichi Fujii, Fumio Kishino, Kosuke Nakajima, Yuichi Itoh, "半球状の毛状マルチタッチディスプレイ," 日本バーチャルリアリティ学会第17回大会論文集, pages 300-303, September 2012.

[21] Yuichi Fujii, Fumio Kishino, Kazuyuki Fujita, Kosuke Nakajima, Yuichi Itoh, Hideo Kikuchi, "U-brella: 降り注ぐ情報を可振化するポータブル傘型インタフェース," 日本バーチャルリアリティ学会第17回大会論文集, pages 652-655, September 2012.

[22] Taku Fujimoto, Yuichi Itoh, Nozomi Ishihara, Kosuke Nakajima, Takao Onoye, "タブレットデバイスと目の位置関係を考慮した電子書籍表示手法に関する検討," ヒューマンインタフェースシンポ ジウム2012論文集, pages 701-704, September 2012.

[23] Yuta Nakagawa, Yuichi Fujii, Fumio Kishino, Kosuke Nakajima, Yuichi Itoh, "立体毛状マルチタッチディスプレイの一検討," 電子情報通信学会総合大会講演論文集（基礎・境界）, page 261, March 2012.

[24] Masashi OKADA, Takao ONOYE, Wataru KOBAYASHI, "An Interactive System of Sound Field Auralization with GPU Ray Tracer and Efficient HRTF Filtering," 電子情報通信学会総合大会, A-20-7, March 2012.

[25] Naoaki Kawabata, Yuichi Fujii, Fumio Kishino, Kosuke Nakajima, Yuichi Itoh, "インテリアへの適用を考慮した毛状ディスプレイの耐荷重に関する検討," 電子情報通信学会総合大会講演論文集 （基礎・境界）, page 262, March 2012.

[26] Takuya Takenaka, Fumio Kishino, Kazuyuki Fujita, Kosuke Nakajima, Yuichi Itoh, "二者間の着座状態と会話の活性度の関係に関する検討," 電子情報通信学会総合大会講演論文集（基礎・境界）, page 220, March 2012.

[27] Yusuke Kikuchi, Fumio Kishino, Nozomi Ishihara, Kosuke Nakajima, Yuichi Itoh, "形容詞クエリを用いた連想意味関係の名詞抽出に関する検討," 電子情報通信学会総合大会講演論文集（基礎・境界）, page 267, March 2012.

[28] Tomoko Fujieda, Fumio Kishino, Kosuke Nakajima, Kazuaki Ikeda, Yuichi Itoh, "着座姿勢の歪みを是正するシステムに向けたセンシングの基礎検討," 電子情報通信学会総合大会講演論文集（基礎・境界）, page 266, March 2012.

[29] Seigo Kaneda, Yuichi Fujii, Fumio Kishino, Kosuke Nakajima, Yuichi Itoh, "毛状ディスプレイのための吹きかけインタラクションの検討," 電子情報通信学会総合大会講演論文集（基礎・境界）, page 263, March 2012.

[30] Junya Nakase, Satoshi Kurihara, Koichi Moriyama, Yasunori Ishihara, Fukuhito Ooshita, Hirotsugu Kakugawa, Kiyoshi Kiyokawa, Masahide Hatanaka, Kazufumi Hosoda, "カフェ・ド・ナイーダ：アンビエント環境における最適インタラクション推定機構の提案," ヒューマンインターフェースシンポジウム, September 2011.

[31] Yusuke Hayashi, Yuichi Itoh, Kosuke Nakajima, Kazuyuki Fujita, Kazuki Takashima, Ikuo Daibo, Takao Onoye, "Cup-Le: a Cup-Shaped Device for Conversational Experiment," ヒューマンインターフェースシンポジウム2011論文集, September 2011.

[32] Kiyoshi Kiyokawa, Masahide Hatanaka, Kazufumi Hosoda, Masashi Okada, Hironori Shigeta, Yasunori Ishihara, Fukuhito Ooshita, Hirotsugu Kakugawa, Satoshi Kurihara, Koichi Moriyama, "オーエンス・ルイス −アンビエント環境制御を用いた知的オフィスチェアの開発−," ヒューマンインターフェースシンポジウム, September 2011.

[33] Kazuyuki Fujita, Kazuki Takashima, Yuichi Itoh, Hiroyuki Ohsaki, Naonori Ono, Keichiro Kagawa, Sho Tsugawa, Kosuke Nakajima, "Ambient Suite: 部屋型情報空間を用いた対人コミュニケーション支援," ヒューマンインタフェースシンポジウム2011論文集, pages 395-400, September 2011.

[34] Ryoji Hashimoto, Toshimitsu Tatsuka, Masahide Hatanaka, Takao Onoye, Hironobu Hatamoto, Shinsuke Ibi, Shinichi Miyamoto, Seiichi Sampei, "Fpga Implementation of Ofdm Baseband Transceiver with Dynamic Spectrum Access," The General Conference of IEICE, AS-2-2, March 2010.

[35] Hideyuki Nakamura, Hiroshi Tsutsui, Ryoji Hashimoto, Takao Onoye, "特徴点追跡を用いた動き補償フレーム補間手法," 電子情報通信学会2009ソサイエティ大会, A-20-14, page 204, September 2009.

[36] Ryoji Hashimoto, Kimiya Kato, Gen Fujita, Takao Onoye, "Performance Enhancement of Cabac Decoder for H.264/Avc," 電子情報通信学会2008ソサイエティ大会,A-20-9, September 2008.

[37] Seiichi Yamazaki, Yukio Mitsuyama, Takao Onoye, "An Approach to Automatic Stroke Modification Based on Gravity Center of Characters," 2007 IEICE Society Conference, A-20-13, September 2007.

[38] Takashi Enami, Masanori Hashimoto, "Adaptive Spatial Division for Statistical Modeling of Power Supply Noise," Proc. The Society Conference of IEICE, A-3-10, September 2007.

[39] Ryoji Hashimoto, Gen Fujita, Takao Onoye, "1080HD向けH.264 CAVLC復号器の高速化に関する一検討," 電子情報通信学会2007ソサイエティ大会,A-20-16, September 2007.

[40] Yuki KAWAMURA, Ryoji HASHIMOTO, Takao ONOYE, "H.264符号化における1/4画素精度動き検出の性能評価," 電子情報通信学会2007ソサイエティ大会,A-4-28, September 2007.

[41] Hiroshi Tsutsui, "Video Coding Scheme for Video Sequences Degraded by Noise of Old Motion Picture Films," 電子情報通信学会2007ソサイエティ大会, AK-2-3, September 2007.

[42] Ryoji Hashimoto, Tomoya Matsumura, Yoshihiro Nozato, Kenji Watanabe, Takao Onoye, "Implementation of Object Attention System Based on Compound-Eye Sensor," Proceedings of 9th DSPS Educators Conference, pages 87-88, August 2007.

[43] Siriporn Jangsombatsiri, Masanori Hashimoto, Ryo Tsuchiya, Haikun Zhu, Chung-Kuan Cheng, "Eye-Pattern Evaluation of On-Chip Interconnects with Intentional Shunt Conductance," Proc. The General Conference of IEICE, A-3-9, March 2007.

[44] Shinyu Ninomiya, Masanori Hashimoto, "Accuracy of SSTA Considering Spatial Correlations and Number of Spatial Divisions," Proc. The General Conference of IEICE, A-3-1, March 2007.

[45] Hiroshi Fuketa, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye, "A Study on Design Policy for Subthreshold Circuits with Adders," Proc. The General Conference of IEICE, A-3-17, March 2007.

[46] Koichi Hamamoto, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye, "Area Efficiency Evaluation of Body-Biasing Layout Styles for Low Voltage Circuits," Proc. The General Conference of IEICE, A-3-6, March 2007.

[47] Shinya Abe, Masanori Hashimoto, Takao Onoye, "Evaluation of Clock Skew in Mesh Style Clock Distribution," Proc. The General Conference of IEICE, A-3-5, March 2007.

[48] Kimiya Kato, Ryoji Hashimoto, Gen Fujita, Takao Onoye, "Intra Prediction Mode Decision Scheme for H.264 Based on Temporally and Spatially Adjacent Header Information," Proc. The Society Conference of IEICE, A-4-12, September 2006.

[49] Kenichi (Ken-ichi) Shinkai, Masanori Hashimoto, Takao Onoye, "Future Prediction of Self-Heating in Short Intra-Block Wires," The Society Conference of IEICE, A-3-14, September 2006.

[50] Mohd Nadzrul Mohd Nor, Tomoya Matsumura, and Takao Onoye, "Improvement of Direction of Arrival Estimation of Speech Using Two-Channel Microphone Array with Angle Position Realignment," In IEICE Society Conference, A-4-32, September 2006.

[51] Takashi Enami, Masanori Hashimoto, Takao Onoye, "Evaluation of Active Circuit Modeling for Power Noise Analysis," Proc. The General Conference of IEICE, A-3-16, March 2006.

[52] Ryoji Hashimoto, Gen Fujita, Takao Onoye, "An Approach to H.264 Encoding Parameter Selection Based on Amount of Motion," Proc. The General Conference of IEICE, D-11-42, March 2006.

[53] Shingo Takahashi, Shuji Tukiyama, Masanori Hashimoto, Isao Shirakawa, "液晶ディスプレイ用サンプリング回路の設計手法について," 2005 年電子情報通信学会ソサイエティ大会講演論文集, A-3-4, 2005.

[54] Takaaki Imanaka, Gen Fujita, Takao Onoye, Isao Shirakawa, "Real-Time Human Object Extraction Method for Mobile Use," IEICE The 19th SIP Symposium, D1-3, November 2004.

[55] Atsushi Kosaka, Hiroyuki Okuhata, Takao Onoye, Isao Shirakawa, "Design of Ogg Vorbis Decoder System for Embedded Platform," IEICE the 19th Symposium on Signal Processing, C7-1, November 2004.

[56] Yuya Shigenobu, Takao Onoye, Isao Shirakawa, "An MPEG-2/MPEG-4 Transcoding Method Based on Information from MPEG-2 Coded Bitstreams," IEICE The 19th SIP Symposium, D4-4, November 2004.

[57] Yoshihiro Uchida, Sadahiro Tani, Masanori Hashimoto, Shuji Tukiyama, Isao Shirakawa, "Parasitic Capacitance Extraction Method for System LCD Circuits," Proc. The Society Conference of IEICE, A-1-16, September 2004.

[58] Hiroyuki Okuhata, Atsushi Kosaka, Tomoya Matsumura, Takao Onoye, Isao Shirakawa, "Reduced Complexity Multi-Scale Retinex for Realtime Video System," Proc. The Society Conference of IEICE, A-4-22, September 2004.

[59] Kenji Watanabe, Shuji Nishida, Gen Fujita, Takao Onoye, Isao Shirakawa, "Home Network Control System Based on Agent Technology," Proc. The Society Conference of IEICE, A-1-30, September 2004.

[60] Y. D. Handoko, Tian Song, Gen Fujita, Takao Onoye, Isao Shirakawa, "VLSI Design of Low Complexity Motion Estimation Algorithm TS-ME for H.264," Proc. The Society Conference of IEICE, A-4-10, March 2004.

[61] Shou Kawakita, Gen Fujita, Takao Onoye, Isao Shirakawa, "Implementation of Realtime JPEG - MPEG-4 Transcoder," Proc. The Society Conference of IEICE, A-4-7, March 2004.

[62] Katsuya Nakagawa, Shou Kawakita, Takao Onoye, Toru Chiba, Isao Shirakawa, "Discussion on Usability of Adaptive Information Space Liaison," IPSJ and IEICE The 2nd Forum on Information Technology, volume 4, pages 267--268, September 2003.

[63] Takaaki Imanaka, Kenji Hontani, Gen Fujita, Takao Onoye, Isao Shirakawa, "Real-Time Hair Object Detection and Extraction for Video Phone," Proc. The Society Conference of IEICE, A-4-26, September 2003.

[64] Motoki Kimura, Yukio Mitsuyama, Takao Onoye, Isao Shirakawa, "Architecture of Cipher Algorithms for Wireless LAN Enhanced Security Standard," in Proc. of the 2003 IEICE Society Conference, A-4-4, September 2003.

[65] Shinichi Maeda, Satoshi Yamaguchi, Atsushi Kosaka, Hiroyuki Okuhata, Akihisa Yamada, Takao Onoye, Isao Shirakawa, "VLSI Implementation of Ogg Vorbis Decoder Using Bach C Language," Proc. The Society Conference of IEICE, A-3-8, March 2003.

[66] Tsubasa Uchida, Tsutomu Okada, Takao Onoye, Isao Shirakawa, "Implementation of Pseudo Random Noise Code Generator for GNSS Receiver," Proc. The Society Conference of IEICE, A-5-15, September 2002.

[67] Nobuyuki Iwanaga, Noriaki Sakamoto, Wataru Kobayashi, Takao Onoye, Isao Shirakawa, "Embedded Implementation of 'out-Of-Head' Acoustic Field Enhancement for Stereo Headphones," Proc. The Society Conference of IEICE, A-4-20, September 2002.

[68] Altan-Erdene Shiitev, Hiroyuki Okada, H. S. Song, Gen Fujita, Takao Onoye, Isao Shirakawa, "A Study on Error Detection Using Digital Watermarking for MPEG-4 Video Transmission," Proc. The Society Conference of IEICE, D-11-38, September 2001.

[69] Morgan Hirosuke Miki, Mamoru Sakamoto, Nobuyuki Kawahara, Yoshinori Takeuchi, Toyohiko Yoshida, Isao Shirakawa, "An Efficient Executable File Compaction and Its Execution Method for Embedded Systems," Proc. The Society Conference of IEICE, A-3-15, September 2001.

[70] Takashi Nakagawa, Shinsuke Hamanaka, Gen Fujita, Isao Shirakawa, "VLSI Implementation of Padding Processing for MPEG-4 Video Coding," Proc. The Society Conference of IEICE, A-4-41, September 2001.

[71] Masanao Ise, Yoshihiro Uchida, Takao Onoye, Isao Shirakawa, "A Layered Digital Matched Filter for W-CDMA," Proc. The Society Conference of IEICE, A-1-7, September 2001.

[72] Yoshihiro Uchida, Masanao Ise, Takao Onoye, Isao Shirakawa, "VLSI Architecture of Turbo Code for W-CDMA," Proc. The Society Conference of IEICE, A-1-8, September 2001.

[73] Hiroyuki Kobayashi, Hiroshi Mizuno, Takao Onoye, Isao Shirakawa, "Power Estimation Method for Embedded Systems," Proc. The Society Conference of IEICE, SA-1-1, September 2001.

[74] Noriaki Sakamoto, Wataru Kobayashi, Takao Onoye, Isao Shirakawa, "Hardware Implementation of 3D Sound Localization System for Monaural Sound Source," Proc. The Society Conference of IEICE, A-4-40, September 2001.

[75] Hiroyuki Okada, H. S. Song, Gen Fujita, Takao Onoye, Isao Shirakawa, "Error Detection Using Digital Watermark for MPEG-4 Video Coding," Proc. Visual Computing 2001, pages 19--20, June 2001.

[76] Gulistan Raja, Tian Song, Gen Fujita, Takao Onoye, Isao Shirakawa, "VLSI Design of Deblocking Filter and Advanced Intra Coding for H.263," Proc. The Society Conference of IEICE, A-3-7, March 2001.

[77] Yukio Mitsuyama, Nobuyuki Iwanaga, Takao Onoye, Isao Shirakawa, "Scatternet Formation and Efficient Routing Control for Bluetooth-Based Ad Hoc Networks," Proc. The Society Conference of IEICE, A-4-68, March 2001.

[78] Shinya Komata, Noriaki Sakamoto, Wataru Kobayashi, Takao Onoye, Isao Shirakawa, "Implementation of 3D Sound Movement by Embedded DSP," Proc. The Society Conference of IEICE, A-4-55, March 2001.

[79] Satoshi Yamaguchi, Atsushi Kosaka, Hiroyuki Okuhata, Isao Shirakawa, "VLSI Implementation of Ogg Vorbis Decoder for Embedded Processor," Proc. The Society Conference of IEICE, A-3-8, March 2001.

[80] Kenji Hontani, Gen Fujita, Isao Shirakawa, "Modified SNAKES for Realtime Face Object Extraction," Proc. The Society Conference of IEICE, D-12-15, March 2001.

[81] Shinya Komata, Wataru Kobayashi, Noriaki Sakamoto, Takao Onoye, Isao Shirakawa, "Realtime 3Dsound Localization Algorithm for Embedded DSP Implementati on," ITE Winter Annual Convention 2000, 1-11, December 2000.

[82] Morgan Hirosuke Miki, Takao Onoye, Isao Shirakawa, "VLSI Implementation of Java Accelerator for Embedded Processors," Proc. The Society Conference of IEICE, A-3-12, October 2000.

[83] Yukio Mitsuyama, Zaldy Andales, Takao Onoye, Isao Shirakawa, "A Cryptosystem Based on Reconfigurable Hardware," Proc. The Society Conference of IEICE, A-4-42, October 2000.

[84] Wataru Kobayashi, Noriaki Sakamoto, Takao Onoye, Isao Shirakawa, "A Realtime Algorithm for Three Dimensional Sound Localization," Proc. The Society Conference of IEICE, A-4-23, October 2000.

[85] Tatsuo Watanabe, Nagisa Ishiura, "Minimization of Spill Code Insertion for Code Generation for Application Specific DSPs," Proc. The Society Conference of IEICE, A-3-20, October 2000.

[86] Shinsuke Hamanaka, Ryo Kuroda, Gen Fujita, Isao Shirakawa, "VLSI Implementation of Reversible Length Decode Core," Proc. The Society Conference of IEICE, A-4-41, October 2000.

[87] Shinya Hashimoto, Akimasa Niwa, Hiroyuki Okuhata, Takao Onoye, Isao Shirakawa, "VLSI Implementation of Noiseless Decoding and Prediction Cores for MPEG-4 Audio Decoder," Proc. The Society Conference of IEICE, A-3-4, September 1999.

[88] Masaru Oshita, Takao Onoye, Isao Shirakawa, "High Speed Implementation of JBIG Arithmetic Coder," Proc. The General Conference of IEICE, A-4-32, March 1999.

[89] Shohei Yamada, Morgan Hirosuke Miki, Gen Fujita, Takao Onoye, Isao Shirakawa, "Bit-Rate Control Algorithm for H.263 Coding," Proc. The Society Conference of IEICE, B-8-31, October 1998.

[90] Yusuke Takemoto, Hideyuki Fujishima, Takao Onoye, Isao Shirakawa, "Hybrid Matrix-Vector Multiplier for Video Decoding and 3-Dimensional Computar Graphics," Proc. The General Conference of IEICE, C-12-19, May 1998.

[91] Nagisa Ishiura, Masayuki Yamaguchi, "Compression of Instruction COdes for Application Specific VLSW Processos," in Proc. The Society conference of IEICE, A-3-10, August 1997.

[92] Gen Fujita, Takao Onoye, Isao Shirakawa, "VLSI Im;Ementation of DCT/IDCT COre for H.263 Nideo Coding," in Proc. The Society conference of IEICE, C-12-28, August 1997.

[93] Koji Miyanohana, Kazuhiro Yanagida, Takao Onoye, Isao Shirakawa, "VLSI Implementation of Low Bitrate Visual Communication System," in Proc. The 41th Annual Conference of ISCIE, pages 247-248, May 1997.

[94] Shun Morikawa, Keisuke Okada, Sumitaka Takeuchi, Isao Shirakawa, "映像伝送用高性能ディジタルフィルタの VLSI 化設計," 電子情報通信学会総合大会, A-4-29, March 1997.

[95] Gen Fujita, Itthichai Arungsrisangchai, Takao Onoye, Isao Shirakawa, "H.263 向け動き検出器の VLSI 化設計," 電子情報通信学会総合大会, SC-11-2, March 1997.

[96] Toshihiro Nakaoka, Masayuki Yamaguchi, Akihisa Yamada, Takashi Kambe, "評価システムを用いたプログ ラム方式専用プロセッサの設計支援," 情報処理学会 第53回全国大会, 2B-1, pages 21-22, September 1996.

[97] Yukihiro Yoshida, Song Baoyu, Hiroyuki Okuhata, Takao Onoye, Isao Shirakawa, "組み込み用プロセッサの低消費電力化に対する一手法," 電子情報 通信学会ソサイアティ大会, SA-1-2, September 1996.

[98] Toshihiro Masaki, Yasuhiro Nakatani, Takao Onoye, Kouzou Murakami, "VCI 共有セルを用いた ATM 音声通信手法," 電子情報通信学会ソサイエティ大会, SB-10-2, September 1996.