論文誌
[1]  Z. Huang, A. Kurokawa, M. Hashimoto, T. Sato, M. Jiang, and Y. Inoue, ``Modeling the Overshooting Effect for Cmos Inverter Delay Analysis in Nanometer Technologies,'' IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems , vol. 29, no. 2, pp. 250--260, February 2010.
[2]  A. Kurokawa, M. Hashimoto, A. Kasebe, Z.-C. Huang, , Y. Yang, Y. Inoue, R. Inagaki, and H. Masuda, ``Second-Order Polynomial Expressions for On-Chip Interconnect Capacitance,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E88-A, no. 12, pp. 3453-3462, December 2005.

This site is maintained by Onoye Lab.

PMAN 2.5.5 - Paper MANagement system / (C) 2002-2008, Osamu Mizuno / All rights reserved.