論文誌
[1]  Y. Ogasahara, M. Hashimoto, T. Kanamoto, and T. Onoye, ``Supply Noise Suppression by Triple-Well Structure,'' IEEE Transactions on VLSI Systems, vol. 21, no. 4, pp. 781--785, April 2013.
[2]  T. Kanamoto, T. Okumura, K. Furukawa, H. Takafuji, A. Kurokawa, K. Hachiya, T. Sakata, M. Tanaka, H. Nakashima, H. Masuda, T. Sato, and M. Hashimoto, ``Impact of Self-Heating in Wire Interconnection on Timing,'' IEICE Trans. on Electronics, vol. E93-C, no. 3, pp. 388--392, March 2010.
[3]  T. Sakata, T. Okumura, A. Kurokawa, H. Nakashima, H. Masuda, T. Sato, M. Hashimoto, K. Hachiya, K. Furukawa, M. Tanaka, H. Takafuji, and T. Kanamoto, ``An Approach for Reducing Leakage Current Variation Due to Manufacturing Variability,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E92-A, no. 12, pp. 3016--3023, December 2009.
[4]  A. Kurokawa, T. Sato, T. Kanamoto, and M. Hashimoto, ``Interconnect Modeling: a Physical Design Perspective (Invited),'' IEEE Transactions on Electron Devices, vol. 56, no. 9, pp. 1840--1851, September 2009.
[5]  T. Okumura, A. Kurokawa, H. Masuda, T. Kanamoto, M. Hashimoto, H. Takafuji, H. Nakashima, N. Ono, T. Sakata, and T. Sato, ``Improvement in Computational Accuracy of Output Transition Time Variation Considering Threshold Voltage Variations,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. 92-A, no. 4, pp. 990--997, April 2009.
[6]  T. Kanamoto, Y. Ogasahara, K. Natsume, K. Yamaguchi, H. Amishiro, T. Watanabe, and M. Hashimoto, ``Impact of Well Edge Proximity Effect on Timing,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E91-A, no. 12, pp. 3461-3464, December 2008.
[7]  T. Kanamoto, T. Ikeda, A. Tsuchiya, H. Onodera, and M. Hashimoto, ``Si-Substrate Modeling Toward Substrate-Aware Interconnect Resistance and Inductance Extraction in Soc Design,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E89-A, no. 12, pp. 3560--3568, December 2006.
[8]  T. Kanamoto, T. Ikeda, A. Tsuchiya, H. Onodera, and M. Hashimoto, ``Si-Substrate Modeling Toward Substrate-Aware Interconnect Resistance and Inductance Extraction in Soc Design,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E89-A, no. 12, pp. 3560-3568, December 2006.
[9]  T. Kanamoto, T. Ikeda, A. Tsuchiya, H. Onodera, and M. Hashimoto, ``Si-Substrate Modeling Toward Substrate-Aware Interconnect Resistance and Inductance Extraction in Soc Design,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E89-A, no. 12, pp. 3560-3568, December 2006.
[10]  T. Kanamoto, S. Akutsu, T. Nakabayashi, T. Ichinomiya, K. Hachiya, A. Kurokawa, H. Ishikawa, S. Muromoto, H. Kobayashi, and M Hashimoto, ``Impact of Intrinsic Parasitic Extraction Errors on Timing and Noise Estimation,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E89-A, no. 12, pp. 3666-3670, December 2006.
国際会議
[1]  Y. Ogasahara, M. Hashimoto, T. Kanamoto, and T. Onoye, ``Measurement of Supply Noise Suppression by Substrate and Deep N-Well in 90nm Process,'' In Proceedings of IEEE Asian Solid-State Circuits Conference (A-SSCC), pp. 397--400, November 2008.
[2]  T. Kanamoto, Y. Ogasahara, K. Natsume, K. Yamaguchi, H. Amishiro, T. Watanabe, and M. Hashimoto, ``Impact of Well Edge Proximity Effect on Timing,'' In Proc. IEEE European Solid-State Device Research Conference, pp. 115-118, September 2007.
[3]  T. Kanamoto, T. Ikeda, A. Tsuchiya, H. Onodera, and M. Hashimoto, ``Si-Substrate Modeling Toward Substrate-Aware Interconnect Resistance and Inductance Extraction in Soc Design,'' In Proceedings of IEEE Wrokshop on Signal Propagation on Interconnects (SPI), pp. 227--230, May 2006.
[4]  T. Kanamoto, T. Ikeda, A. Tsuchiya, H. Onodera, and M. Hashimoto, ``Effective Si-Substrate Modeling for Frequency-Dependent Interconnect Resistance and Inductance Extraction,'' In The 3rd International Workshop on Compact Modeling, pp. 51--56, January 2006.

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