論文誌
[1]  H. Konoura, D. Alnajjar, Y. Mitsuyama, H. Shimada, K. Kobayashi, H. Kanbara, H. Ochi, T. Imagawa, K. Wakabayashi, M. Hashimoto, T. Onoye, and H. Onodera, ``Reliability-Configurable Mixed-Grained Reconfigurable Array Supporting C-Based Design and Its Irradiation Testing,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E97-A, no. 12, pp. 2518--2529, December 2014.
[2]  H. Konoura, T. Imagawa, Y. Mitsuyama, M. Hashimoto, and T. Onoye, ``Comparative Evaluation of Lifetime Enhancement with Fault Avoidance on Dynamically Reconfigurable Devices,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E97-A, no. 7, pp. 1468--1482, July 2014.
国際会議
[1]  M. Hashimoto, D. Alnajjar, H. Konoura, Y. Mitsuyama, H. Shimada, K. Kobayashi, H. Kanbara, H. Ochi, T. Imagawa, K. Wakabayashi, T. Onoye, and H. Onodera, ``Reliability-Configurable Mixed-Grained Reconfigurable Array Compatible with High-Level Synthesis,'' Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 14--15, January 2015.
[2]  Hiroaki Konoura, Dawood Alnajjar, Yukio Mitsuyama, Hiroyuki Ochi, Takashi Imagawa, Shinichi Noda, Kazutoshi Wakabayashi, Masanori Hashimoto, and Takao Onoye, ``Mixed-Grained Reconfigurable Architecture Supporting Flexible Reliability and C-Based Design,'' In ReConFig, December 2013.
[3]  D. Alnajjar, H. Konoura, Y. Mitsuyama, H. Shimada, K. Kobayashi, H. Kanbara, H. Ochi, T. Imagawa, S. Noda, K. Wakabayashi, M. Hashimoto, T. Onoye, and H. Onodera, ``Reliability-Configurable Mixed-Grained Reconfigurable Array Supporting C-To-Array Mapping and Its Radiation Testing,'' In Proceedings of IEEE Asian Solid-State Circuits Conference (A-SSCC), pp. 313-316, November 2013.
[4]  D. Alnajjar, Y. Ko, T. Imagawa, M. Hiromoto, Y. Mitsuyama, M. Hashimoto, H. Ochi, and T. Onoye, ``Soft Error Resilient Vlsi Architecture for Signal Processing,'' In Proceedings of IEEE International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), pp. 183--186, December 2009.
[5]  D. Alnajjar, Y. Ko, T. Imagawa, H. Konoura, M. Hiromoto, Y. Mitsuyama, M. Hashimoto, H. Ochi, and T. Onoye, ``Coarse-Grained Dynamically Reconfigurable Architecture with Flexible Reliability,'' In Proceedings of International Conference on Field Programmable Logic and Applications (FPL), pp. 186--192, August 2009.
[6]  D. Alnajjar, Y. Ko, T. Imagawa, M. Hiromoto, Y. Mitsuyama, M. Hashimoto, H. Ochi, and T. Onoye, ``A Coarse-Grained Dynamically Reconfigurable Architecture Enabling Flexible Reliability,'' In Proceedings of IEEE Workshop on System Effects of Logic Soft Errors (SELSE), March 2009.
研究会等発表論文
[1]  郡浦 宏明, 今川 隆司, 密山 幸男, 橋本 昌宜, 尾上 孝雄, ``動作合成に対応した信頼性可変混合粒度再構成可能アーキテクチャの検討,'' 信学技報, RECONF2013-8, vol. 113, no. 52, pp. 41-46, May 2013.
[2]  郡浦 宏明, 今川 隆司, 密山 幸男, 橋本 昌宜, 尾上 孝雄, ``動的部分再構成による故障回避に関する一考察,'' 信学技報, RECONF2012-59 , vol. 112, no. 325, pp. 71-76, November 2012.

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