論文誌
[1]  密山 幸男, 高橋 一真, 今井 林太郎, 橋本 昌宜, 尾上 孝雄, 白川 功, ``メディア処理向け再構成可能アーキテクチャでの動画像復号処理の実現,'' 電子情報通信学会論文誌, vol. J93-A, no. 6, pp. 397-413, June 2010.
[2]  Y. Mitsuyama, K. Takahashi, R. Imai, M. Hashimoto, T. Onoye, I. Shirakawa, ``Area-Efficient Reconfigurable Architecture for Media Processin,'' IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, vol. E91-A, no. 12, pp. 3651-3662, December 2008.
[3]  M. Hashimoto, T. Ijichi, S. Takahashi, S. Tsukiyama, and I. Shirakawa, ``Transistor Sizing of LCD Driver Circuit for Technology Migration,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E90-A, no. 12, pp. 2712--2717, December 2007.
[4]  S. Takahashi, S. Tsukiyama, M. Hashimoto, and I. Shirakawa, ``A Sampling Switch Design Procedure for Active Matrix Liquid Crystal Displays,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E89-A, no. 12, pp. 3538--3545, December 2006.
[5]  S. Takahashi, S. Tsukiyama, M. Hashimoto, and I. Shirakawa, ``A Sampling Switch Design Procedure for Active Matrix Liquid Crystal Displays,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E89-A, no. 12, pp. 3538-3545, December 2006.
[6]  M. Takahashi, N. Ishiura, A. Yamada, and T. Kambe, ``Thread Composition Method for Hardware Compiler Bach Maximizing Resource Sharing among Processes,'' IEICE Trans. Fundamentals, vol. E83-A, no. 12, pp. 2456--2463, December 2000.
[7]  I. Arungsrisangchai, Y. Shigehiro, I. Shirakawa, and H. Takahashi, ``A Fast Minimum Cost Flow Algorithm for Regenerating Optimal Layout of Functional Cells,'' IEICE Trans. Fundamentals of Electronics,Communications and Computer Sciences, vol. E80-A, no. 12, pp. 2589-2599, December 1997.
[8]  Y. Shigehiro, T. Nagata, I. Shirakawa, I. Arungsrisangchai, and H. Takahashi, ``Automatic Layout Recycling Based on Layout Description and Linear Programming,'' in Proc. IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 15, no. 8, pp. 959-967, August 1996.
国際会議
[1]  S. Takahashi, S. Tsukiyama, M. Hashimoto, and I. Shirakawa, ``A Design Method of Finding Optimal Sampling Pulse and Transistor Size in a Sampling Circuit for Liquid Crystal Displays,'' In In Proceedings of International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), June 2008.
[2]  H. Okuhata, K. Takahashi, Y. Nozato, T. Onoye, and I. Shirakawa, ``Video Image Enhancement Scheme for High Resolution Consumer Devices,'' In Proc. of International Symposium on Communications, Control and Signal Processing (ISCCSP2008), pp. 639-644, March 2008.
[3]  K. Takahashi, Y. Nozato, H. Okuhata, and T. Onoye, ``VLSI Architecture for Real-Time Retinex Video Image Enhancement,'' In Proc. Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI 2007), pp. 81--86, October 2007.
[4]  T. Ijichi, M. Hashimoto, S. Takahashi, S. Tsukiyama, and I. Shirakawa, ``Transistor Sizing of Lcd Driver Circuit for Technology Migration,'' In Proceedings of International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), vol. 1, p. I25--I28, July 2006.
[5]  Y. Mitsuyama, R. Imai, K. Takahashi, T. Onoye, and I. Shirakawa, ``Domain-Specific Reconfigurable Architecture for Media Processing,'' In Proc. Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI 2006), pp. 322--327, April 2006.
[6]  S. Takahashi, A. Taji, S. Tsukiyama, M. Hashimoto, and I. Shirakawa, ``A Sampling Switch Design for Liquid Crystal Displays,'' In Proceedings of IEEE International Region 10 Conference, November 2005.
[7]  S. Takahashi, A. Taji, S. Tsukiyama, M. Hashimoto, and I. Shirakawa, ``A Design Scheme for Sampling Switch in Active Matrix Lcd,'' In A Design Scheme for Sampling Switch in Active Matrix LCD, August 2005.
[8]  Y. Mitsuyama, R. Imai, K. Takahashi, T. Onoye, and I. Shirakawa, ``An Approach for Area-Efficient Coarse-Grained Reconfigurable Architecture Dedicated to Media Processing,'' In Proc. International Technical Conference of Circuits/Systems, Computers and Communications (ITC-CSCC2005), pp. 131--132, July 2005.
[9]  S. Takahashi, A. Taji, S. Tsukiyama, M. Hashimoto, and I. Shirakawa, ``A Sampling Switch Design for Liquid Crystal Displays,'' In Proceedings of IEEE International Region 10 Conference, 1C-03.3, 2005.
[10]  S. Takahashi, A. Taji, S. Tsukiyama, M. Hashimoto, and I. Shirakawa, ``A Design Scheme for Sampling Switch in Active Matrix LCD,'' In Proceedings of European Conference on Circuit Theory and Design, 3e-212, 2005.
[11]  M. Takahashi, N. Ishiura, A. Yamada, and T. Kambe, ``Thread Partitioning Method for Hardware Compiler Bach,'' In in Proc.\ Asia and South Pacific Design Automation Conference (ASP-DAC 2000), pp. 303--308, January 2000.
[12]  I. Arungsrisangchai, Y. Shigehiro, I. Shirakawa, and H. Takahashi, ``A Fast Minimun Cost Flow Algofithm for VLSI Layout Compaction,'' In in Proc. IEEE International Symposium on Circuits and Systems, pp. 1672-1675, June 1997.
[13]  Y. Shigehiro, I. Shirakawa, I. Arungsrisangchai, and H. Takahashi, ``A Fast Minimum Cost Flow Algorithm and Its Application to VLSI Layout Compaction,'' In in Proc. Int'l Technical Conference on Circuits/Systems, Computers and Communications, pp. 951-954, July 1996.
研究会等発表論文
[1]  野里 良裕, 高橋 和之, 奥畑 宏之, 尾上 孝雄, ``リアルタイム動画像Retinex階調補正における照明光推定器のアーキテクチャ,'' 第21回ディジタル信号処理シンポジウム, D8-3, November 2006.
[2]  高橋和之, 野里良裕, 奥畑宏之, 尾上孝雄, ``変分法によるRetinex階調補正の演算量削減検討,'' 信学技報 SIS2006-3, pp. 13--18, June 2006.
[3]  伊地知孝仁, 橋本昌宜, 高橋真吾, 築山修治, 白川功, ``画素充電率制約を満足する液晶ドライバ回路のトランジスタサイズ決定技術,'' 信学技報, VLD2005-131, pp. 55--60, March 2006.
[4]  高橋 瑞樹, 石浦 菜岐佐, 山田 晃久, 神戸 尚志, ``ハードウェアコンパイラBachにおけるスレッド分割手法,'' 信学会 第12回回路とシステム(軽井沢)ワークショップ, pp. 103--108, April 1999.
大会等発表論文
[1]  高橋 真吾, 築山 修治, 橋本 昌宜, 白川 功, ``液晶ディスプレイ用サンプリング回路の設計手法について,'' 2005 年電子情報通信学会ソサイエティ大会講演論文集, A-3-4, 2005.

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