論文誌
[1]  H. Konoura, D. Alnajjar, Y. Mitsuyama, H. Shimada, K. Kobayashi, H. Kanbara, H. Ochi, T. Imagawa, K. Wakabayashi, M. Hashimoto, T. Onoye, and H. Onodera, ``Reliability-Configurable Mixed-Grained Reconfigurable Array Supporting C-Based Design and Its Irradiation Testing,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E97-A, no. 12, pp. 2518--2529, December 2014.
[2]  廣本 正之, 筒井 弘, 越智 裕之, 小佐野 智之, 石川 憲洋, 中村 行宏, ``メディアストリーミングにおける高速移動通信網に適した動的符号化レート制御手法,'' 情報処理学会論文誌, vol. 50, no. 10, pp. 2532-2542, October 2009.
[3]  Hiroki Sugano, Takahiko Masuzaki, Hiroshi Tsutsui, Takao Onoye, Hiroyuki Ochi, and Yukihiro Nakamura, ``Efficient Memory Organization Framework for Jpeg2000 Entropy Codec,'' IEICE Trans. Fundamentals, vol. E92-A, no. 8, pp. 1970-1977, August 2009.
国際会議
[1]  R. Doi, J. Hotate, T. Kishimoto, T. Higashi, H. Ochi, M. Tada, T. Sugibayashi, K. Wakabayashi, H. Onodera, Y. Mitsuyama, and M. Hashimoto, ``Highly-Dense Mixed Grained Reconfigurable Architecture with Via-Switch,'' ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), March 2016.
[2]  N. Banno, M.Tada, K. Okamoto, N. Iguchi, T. Sakamoto, M. Miyamura, Y. Tsuji, H. Hada, H. Ochi, H. Onodera, M. Hashimoto, and T. Sugibayashi Author(s) in English , ``A Novel Two-Varistors (A-Si/Sin/A-Si) Selected Complementary Atom Switch (2v-1cas) for Nonvolatile Crossbar Switch with Multiple Fan-Outs,'' Technical Digest of IEEE International Electron Devices Meeting (IEDM), pp. 32--35, December 2015.
[3]  M. Hashimoto, D. Alnajjar, H. Konoura, Y. Mitsuyama, H. Shimada, K. Kobayashi, H. Kanbara, H. Ochi, T. Imagawa, K. Wakabayashi, T. Onoye, and H. Onodera, ``Reliability-Configurable Mixed-Grained Reconfigurable Array Compatible with High-Level Synthesis,'' Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 14--15, January 2015.
[4]  Hiroaki Konoura, Dawood Alnajjar, Yukio Mitsuyama, Hiroyuki Ochi, Takashi Imagawa, Shinichi Noda, Kazutoshi Wakabayashi, Masanori Hashimoto, and Takao Onoye, ``Mixed-Grained Reconfigurable Architecture Supporting Flexible Reliability and C-Based Design,'' In ReConFig, December 2013.
[5]  D. Alnajjar, H. Konoura, Y. Mitsuyama, H. Shimada, K. Kobayashi, H. Kanbara, H. Ochi, T. Imagawa, S. Noda, K. Wakabayashi, M. Hashimoto, T. Onoye, and H. Onodera, ``Reliability-Configurable Mixed-Grained Reconfigurable Array Supporting C-To-Array Mapping and Its Radiation Testing,'' In Proceedings of IEEE Asian Solid-State Circuits Conference (A-SSCC), pp. 313-316, November 2013.
[6]  D. Alnajjar, Y. Ko, T. Imagawa, M. Hiromoto, Y. Mitsuyama, M. Hashimoto, H. Ochi, and T. Onoye, ``Soft Error Resilient Vlsi Architecture for Signal Processing,'' In Proceedings of IEEE International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), pp. 183--186, December 2009.
[7]  Koichi Hattori, Hiroshi Tsutsui, Hiroyuki Ochi, and Yukihiro Nakamura, ``A High-Throughput Pipelined Architecture for JPEG XR Encoding,'' In Proc. of 7th IEEE Workshop on Embedded Systems for Real-Time Multimedia (ESTIMedia2009) , pp. 9-17, October 2009. (Best Paper Award)
[8]  D. Alnajjar, Y. Ko, T. Imagawa, H. Konoura, M. Hiromoto, Y. Mitsuyama, M. Hashimoto, H. Ochi, and T. Onoye, ``Coarse-Grained Dynamically Reconfigurable Architecture with Flexible Reliability,'' In Proceedings of International Conference on Field Programmable Logic and Applications (FPL), pp. 186--192, August 2009.
[9]  Masayuki Hiromoto, Hiroshi Tsutsui, Hiroyuki Ochi, Tomoyuki Osano, Norihiro Ishikawa, and Yukihiro Nakamura, ``Dynamic Rate Control for Media Streaming in High-Speed Mobile Networks,'' In Proc. of IEEE Wireless Communications and Networking Conference (WCNC 2009), April 2009.
[10]  D. Alnajjar, Y. Ko, T. Imagawa, M. Hiromoto, Y. Mitsuyama, M. Hashimoto, H. Ochi, and T. Onoye, ``A Coarse-Grained Dynamically Reconfigurable Architecture Enabling Flexible Reliability,'' In Proceedings of IEEE Workshop on System Effects of Logic Soft Errors (SELSE), March 2009.
[11]  Koichi Hattori, Hiroshi Tsutsui, Hiroyuki Ochi, and Yukihiro Nakamura, ``An Architecture of Photo Core Transform in HD Photo Coding System for Embedded Systems of Various Bandwidths,'' In Proc. of 2008 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS2008), pp. 1592-1595, November 2008.
[12]  H. Sugano, H. Tsutsui, T. Masuzaki, T. Onoye, H. Ochi, and Y. Nakamura, ``Efficient Memory Architecture for JPEG2000 Entropy Codec,'' In Proc. International Symposium on Circuits and Systems, pp. 2881--2884, May 2006.
研究会等発表論文
[1]  廣本 正之, 筒井 弘, 越智 裕之, 小佐野 智之, 石川 憲洋, 中村 行宏, ``メディアストリーミングにおける高速移動通信網に適した動的符号化レート制御手法の検討,'' マルチメディア,分散,協調とモバイル(DICOMO2008)シンポジウム, pp. 1167-1176, July 2008.
[2]  服部 幸市, 筒井 弘, 越智 裕之, 中村 行宏, ``バス帯域を考慮した HD Photo における Photo Core Transform のアーキテクチャ,'' 信学技報, SIS2008-21, vol. 108, no. 85, pp. 39-44, June 2008.

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