論文誌
[1]  A. Muramatsu, M. Hashimoto, and H. Onodera, ``Effects of On-Chip Inductance on Power Distribution Grid,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E88-A, no. 12, pp. 3564-3572, December 2005.
国際会議
[1]  A. Muramatsu, M. Hashimoto, and H. Onodera, ``Effects of On-Chip Inductance on Power Distribution Grid,'' In Proceedings of International Symposium on Physical Design (ISPD), pp. 63-69, April 2005.
[2]  A. Muramatsu, M. Hashimoto, and H. Onodera, ``Lsi Power Network Analysis with On-Chip Wire Inductance,'' In Proceedings of Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI), pp. 55-60, October 2004.

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