論文誌
[1]  H. Mizuno, H. Kobayashi, T. Onoye, and I. Shirakawa, ``Performance Estimation at Architecture Level for Embedded Systems,'' IEEE Transaction on Fundamentals of Electronics, Communications and Computer Sciences, vol. E85-A, no. 12, pp. 2636--2644, December 2002.
[2]  K. Kawamoto, S. Mizuno, H. Abe, Y. Higuchi, H. Ishihara, H. Fukumoto, T. Watanabe, S. Fujino, and I. Shirakawa, ``A Single Chip Automotive Control LSI Using SOI Bipolar Complimentary MOS Double-Diffused MOS,'' The Japan Society of Applied Physics, vol. 40, no. 4B, pp. 2891--2896, April 2001.
国際会議
[1]  S. Iizuka, M. Mizuno, D. Kuroda, M. Hashimoto, and T. Onoye, ``Stochastic Error Rate Estimation for Adaptive Speed Control with Field Delay Testing,'' In Proc. International Conference on Computer-Aided Design (ICCAD), pp. 107-114, November 2013. (San Jose)
[2]  H. Mizuno, H. Kobayashi, T. Onoye, and I. Shirakawa, ``Power Estimation at Architecture Level for Embedded Systems,'' In ibid, vol. II, pp. 476--479, May 2002.
[3]  H. Mizuno, H. Kobayashi, T. Onoye, and I. Shirakawa, ``An Architecture Level Power Estimation Method for Embedded Systems,'' In in Proc. Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI 2001), Nara, Japan, pp. 78--85, October 2001.
[4]  K. Kawamoto, S. Mizuno, H. Abe, Y. Higuchi, S. Fujino, and I. Shirakawa, ``A Shingle Chip Automotive Control LSI Using SOI BiCDMOS,'' In in Proc. of 2000 International Conference on Solid State Device and Materials, pp. 486-487, August 2000.
研究会等発表論文
[1]  水野 洋, 小林 弘幸, 尾上 孝雄, 白川 功, ``組込みシステムアーキテクチャレベルにおける消費電力見積り手法,'' 電子情報通信学会 第15回 回路とシステム(軽井沢)ワークショップ, pp. 435--440, April 2002.
大会等発表論文
[1]  小林 弘幸, 水野 洋, 尾上 孝雄, 白川 功, ``組込みシステムにおける消費電力見積りの一手法,'' 信学会 ソサイエティ大会, SA-1-1, September 2001.

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