国際会議
[1]  T. Kanamoto, T. Ikeda, A. Tsuchiya, H. Onodera, and M. Hashimoto, ``Effective Si-Substrate Modeling for Frequency-Dependent Interconnect Resistance and Inductance Extraction,'' In The 3rd International Workshop on Compact Modeling, pp. 51--56, January 2006.
大会等発表論文
[1]  Siriporn Jangsombatsiri, 橋本昌宜, 土谷亮, Haikun Zhu, Chung-Kuan Cheng, ``シャントコンダクタンスを挿入したオンチップ伝送線路のアイパターン評価,'' 電子情報通信学会総合大会, A-3-9, March 2007.

This site is maintained by Onoye Lab.

PMAN 2.5.5 - Paper MANagement system / (C) 2002-2008, Osamu Mizuno / All rights reserved.