論文誌
[1]  Constantin Siriteanu, Satoshi Kuriki, Donald Richards, and Akimichi Takemura, ``Chi-Square Mixture Representations for the Distribution of the Scalar Schur Complement in a Noncentral Wishart Matrix,'' Statistics and Probability Letters, accepted, February 2016.
[2]  T. Enami, T. Sato, and M. Hashimoto, ``Power Distribution Network Optimization for Timing Improvement with Statistical Noise Model and Timing Analysis,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E95-A, no. 12, pp. 2261--2271, December 2012.
[3]  T. Kanamoto, T. Okumura, K. Furukawa, H. Takafuji, A. Kurokawa, K. Hachiya, T. Sakata, M. Tanaka, H. Nakashima, H. Masuda, T. Sato, and M. Hashimoto, ``Impact of Self-Heating in Wire Interconnection on Timing,'' IEICE Trans. on Electronics, vol. E93-C, no. 3, pp. 388--392, March 2010.
[4]  Z. Huang, A. Kurokawa, M. Hashimoto, T. Sato, M. Jiang, and Y. Inoue, ``Modeling the Overshooting Effect for Cmos Inverter Delay Analysis in Nanometer Technologies,'' IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems , vol. 29, no. 2, pp. 250--260, February 2010.
[5]  T. Sakata, T. Okumura, A. Kurokawa, H. Nakashima, H. Masuda, T. Sato, M. Hashimoto, K. Hachiya, K. Furukawa, M. Tanaka, H. Takafuji, and T. Kanamoto, ``An Approach for Reducing Leakage Current Variation Due to Manufacturing Variability,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E92-A, no. 12, pp. 3016--3023, December 2009.
[6]  A. Kurokawa, T. Sato, T. Kanamoto, and M. Hashimoto, ``Interconnect Modeling: a Physical Design Perspective (Invited),'' IEEE Transactions on Electron Devices, vol. 56, no. 9, pp. 1840--1851, September 2009.
[7]  T. Okumura, A. Kurokawa, H. Masuda, T. Kanamoto, M. Hashimoto, H. Takafuji, H. Nakashima, N. Ono, T. Sakata, and T. Sato, ``Improvement in Computational Accuracy of Output Transition Time Variation Considering Threshold Voltage Variations,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. 92-A, no. 4, pp. 990--997, April 2009.
[8]  Y. Ogasahara, T. Enami, M. Hashimoto, T. Sato, and T. Onoye, ``Validation of a Full-Chip Simulation Model for Supply Noise and Delay Dependence on Average Voltage Drop with On-Chip Delay Measurement,'' IEEE Trans. on Circuits and Systems—II: Express Briefs, vol. 54, no. 10, pp. 868-872, October 2007.
[9]  T. Sato, J. Ichimiya, N. Ono, and M. Hashimoto, ``On-Chip Thermal Gradient Analysis Considering Interdependence between Leakage Power and Temperature,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E89-A, no. 12, pp. 3491-3499, December 2006.
[10]  T. Sato, J. Ichimiya, N. Ono, K. Hachiya, and M. Hashimoto, ``On-Chip Thermal Gradient Analysis and Temperature Flattening for Soc Design,'' IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E88-A, no. 12, pp. 3382-3389, December 2005.
[11]  K. Nakagawa, M. Kawakita, K. Sato, M. Minakuchi, T. Onoye, T. Chiba, and I. Shirakawa, ``Object Sharing Scheme for Heterogeneous Environment,'' in IEICE Transaction on Fundamentals of Electronics, Communications and Computer Sciences, vol. E86-A, no. 4, pp. 813--821, April 2003.
国際会議
[1]  K. Kiyokawa, M. Hatanaka, K. Hosoda, M. Okada, H. Shigeta, Y. Ishihara, F. Ooshita, H. Kakugawa, S. Kurihara, and K. Moriyama, ``Owens Luis - a Context-Aware Multi-Modal Smart Office Chair in an Ambient Environment,'' In The 1st International Workshop on Ambient Information Technologies (AMBIT-2012), Orange County, CA, USA, March 2012.
[2]  H. Shigeta, J. Nakase, Y. Tsunematsu, K. Kiyokawa, M. Hatanaka, K. Hosoda, M. Okada, Y. Ishihara, F. Ooshita, H. Kakugawa, S. Kurihara, and K. Moriyama, ``Implementation of a Smart Office System in an Ambient Environment,'' In The 1st International Workshop on Ambient Information Technologies (AMBIT-2012), Orange County, CA, USA, March 2012.
[3]  K. Kiyokawa, M. Hatanaka, K. Hosoda, M. Okada, H. Shigeta, Y. Ishihara, F. Ooshita, H. Kakugawa, S. Kurihara, and K. Moriyama, ``Owens Luis - a Proposal of a Smart Office Chair in an Ambient Environment,'' In The 21st International Conference on Artificial Reality and Telexistence (ICAT 2011), Osaka, Japan, November 2011.
[4]  T. Enami, M. Hashimoto, and T. Sato, ``Decoupling Capacitance Allocation for Timing with Statistical Noise Model and Timing Analysis,'' In Proc. IEEE/ACM International Conference on Computer-Aided Design, pp. 420-425, November 2008.
[5]  S. Watanabe, M. Hashimoto, and T. Sato, ``Cascading Dependent Operations for Mitigating Timing Variability,'' In Proceedings. of Workshop on Quality-Aware Design (W-QUAD), June 2008.
[6]  Y. Ogasahara, T. Enami, M. Hashimoto, T. Sato, and T. Onoye, ``Measurement Results of Delay Degradation Due to Power Supply Noise Well Correlated with Full-Chip Simulation,'' In Proc.~IEEE Custom Integrated Circuits Conference, pp. 861--864, September 2006.
[7]  T. Sato, N. Ono, J. Ichimiya, K. Hachiya, and M. Hashimoto, ``On-Chip Thermal Gradient Analysis and Temperature Flattening for Soc Design,'' In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 1074-1077, January 2005.
[8]  T. Sato, M. Hashimoto, and H. Onodera, ``An Ir-Drop Minimization by Optimizing Number and Location of Power Supply Pads,'' In Proceedings of Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI), pp. 66-72, October 2004.
[9]  A. Kosaka, S. Yamaguchi, H. Okuhata, T. Onoye, and I. Shirakawa, ``SoC Design of Ogg Vorbis Decoder Using Embedded Processor,'' In in Proc. 2004 Computing Frontier Conference, pp. 481--487, April 2004.
[10]  S. Yamaguchi, A. Kosaka, H. Okuhata, T. Onoye, and I. Shirakawa, ``Low Power Ogg Vorbis Decoder by Embedded Processor,'' In in Proc. The 2003 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC2003), Kang-Woo Do, Korea, vol. 1, pp. 565--568, July 2003.
[11]  A. Kosaka, S. Yamaguchi, H. Okuhata, T. Onoye, and I. Shirakawa, ``VLSI Implementation of Ogg Vorbis Decoder for Embedded Applications,'' In in Proc. 15th Annual IEEE International ASIC/SoC Conference(ASIC/SoC2002), Rochester, N.Y., pp. 20--24, September 2002.
[12]  A. Kosaka, S. Yamaguchi, H. Okuhata, T. Onoye, and I. Shirakawa, ``A Hardware Implementation of Ogg Vorbis Audio Decoder with Embedded Processor,'' In in Proc. 17th Annual International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC2002), Phuket, Thailand, pp. 94--97, July 2002.
[13]  K. Nakagawa, M. Kawakita, K. Sato, M. Minakuchi, O. Tsumori, K. Hanada, T. Chiba, and I. Shirakawa, ``OCEAN: Object Communication Environment for Arbitrary Network,'' In in Proc. IEEE International Conference on Distributed Computing Systems Workshops, pp. 162--166, July 2002.
研究会等発表論文
[1]  榎並 孝司, 橋本 昌宜, 佐藤 高史, ``電源ノイズ考慮統計的タイミング解析を用いたデカップリング容量割当手法,'' 信学技報, VLD2008-161, vol. 108, no. 478, pp. 207-212, March 2009.
[2]  小笠原 泰弘, 榎並 孝司, 橋本 昌宜, 佐藤 高史, 尾上 孝雄, ``電源ノイズによる遅延変動の測定と電源ノイズを再現するフルチップシミュレーション手法,'' 信学技報, CPM2006-132, ICD2006-174, pp. 19--23, January 2007.
[3]  小坂篤史, 山口悟史, 奥畑宏之, 尾上孝雄, 白川功, ``組み込みCPUと専用回路によるOgg Vorbis音楽デコーダのVLSI化設計,'' 信学技報, SDM2002-159, ICD2002-70, pp. 37--42, August 2002.
[4]  中川 克哉, 川北 将, 佐藤 康二, 花田 恵太郎, 千葉 徹, 白川 功, ``異機種間適応型オブジェクト共有環境,'' 電子情報通信学会 第15回 回路とシステム(軽井沢)ワークショップ, pp. 161--166, April 2002.
[5]  中川克哉, 佐藤康二, 津森靖, 花田恵太郎, 白川功, ``任意ネットワーク対応オブジェクトコミュニケーション環境 (OCEAN),'' 情報処理学会 第 104 回 マルチメディアと分散処理(石切)研究会, pp. 19--24, September 2001.
[6]  中川 克哉, 川北 将, 佐藤 康二, 水口 充, 白川 功, ``異機種間オブジェクトコミュニケーション環境,'' マルチメディア, 分散, 協調とモバイル(DICOMO 2002) シンポジウム, pp. 197--200, July 2000.
[7]  佐藤洋, 森本康夫, 正城敏博, 尾上孝雄, 白川功, ``1チップ MPEG2 デコーダの設計と動き補償器の VLSI 実装,'' 情報処理学会DAシンポジウム'96, pp. 47-52, August 1996.
解説
[1]  清川 清, 畠中 理英, 細田 一史, 岡田 雅司, 繁田 浩功, 石原 靖哲, 大下 福仁, 角川 裕次, 栗原 聡, 森山 甲一, ``オーエンス・ルイス:アンビエント環境制御を用いた知的オフィスチェアの提案,'' システム制御情報学会誌, vol. 56, no. 1, pp. 14-20, January 2012.
大会等発表論文
[1]  清川 清, 畠中 理英, 細田 一史, 岡田 雅司, 繁田 浩功, 石原 靖哲, 大下 福仁, 角川 裕次, 栗原 聡, 森山 甲一, ``オーエンス・ルイス −アンビエント環境制御を用いた知的オフィスチェアの開発−,'' ヒューマンインターフェースシンポジウム, September 2011.
[2]  中瀬 絢哉, 栗原 聡, 森山 甲一, 石原 靖哲, 大下 福仁, 角川 裕次, 清川 清, 畠中 理英, 細田 一史., ``カフェ・ド・ナイーダ:アンビエント環境における最適インタラクション推定機構の提案,'' ヒューマンインターフェースシンポジウム, September 2011.
[3]  前田真一, 山口悟史, 小坂篤史, 奥畑宏之, 山田晃久, 尾上孝雄, 白川功, ``Bach C言語によるOgg VorbisデコーダのVLSI化設計,'' 信学会 総合大会, A-3-8, March 2003.
[4]  山口 悟史, 小坂 篤史, 奥畑 宏之, 白川 功, ``組み込み CPU 向け Ogg Vorbis デコーダの VLSI 実装,'' 信学会 総合大会, A-3-8, March 2001.

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