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分類 国際会議
著者名 (author) H. Mizuno, H. Kobayashi, T. Onoye, I. Shirakawa
英文著者名 (author) H. Mizuno, H. Kobayashi, T. Onoye, I. Shirakawa
編者名 (editor)
編者名 (英文)
キー (key) Hiroshi Mizuno, Hiroyuki Kobayashi, Takao Onoye, Isao Shirakawa
表題 (title) An Architecture Level Power Estimation Method for Embedded Systems
表題 (英文) An Architecture Level Power Estimation Method for Embedded Systems
書籍・会議録表題 (booktitle) in Proc. Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI 2001), Nara, Japan
書籍・会議録表題(英文) in Proc. Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI 2001), Nara, Japan
巻数 (volume)
号数 (number)
ページ範囲 (pages) 78--85
組織名 (organization)
出版元 (publisher)
出版元 (英文)
出版社住所 (address)
刊行月 (month) October
出版年 (year) 2001
付加情報 (note)
注釈 (annote)
内容梗概 (abstract)
論文電子ファイル Not available.


[1-95]  H. Mizuno, H. Kobayashi, T. Onoye, and I. Shirakawa, ``An Architecture Level Power Estimation Method for Embedded Systems,'' In in Proc. Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI 2001), Nara, Japan, pp. 78--85, October 2001.

@inproceedings{1_95,
    author = {H. Mizuno and  H. Kobayashi and  T. Onoye and  I. Shirakawa},
    author_e = {H. Mizuno, H. Kobayashi, T. Onoye, I. Shirakawa},
    editor = {},
    editor_e = {},
    title = {An Architecture Level Power Estimation Method for Embedded Systems},
    
    title_e = {An Architecture Level Power Estimation Method for Embedded
    Systems},
    booktitle = {in Proc. Workshop on Synthesis and System Integration of Mixed
    Technologies (SASIMI 2001), Nara, Japan},
    booktitle_e = {in Proc. Workshop on Synthesis and System Integration of
    Mixed Technologies (SASIMI 2001), Nara, Japan},
    volume = {},
    number = {},
    pages = {78--85},
    organization = {},
    publisher = {},
    publisher_e = {},
    address = {},
    month = {October},
    year = {2001},
    note = {},
    annote = {}
}

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