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分類 国際会議
著者名 (author) A. Tsuchiya,M. Hashimoto,H. Onodera
英文著者名 (author)
編者名 (editor)
編者名 (英文)
キー (key)
表題 (title) Design Guideline for Resistive Termination of On-Chip High-Speed Interconnects
表題 (英文)
書籍・会議録表題 (booktitle) Proceedings of IEEE Custom Integrated Circuits Conference (CICC)
書籍・会議録表題(英文)
巻数 (volume)
号数 (number)
ページ範囲 (pages) 613-616
組織名 (organization)
出版元 (publisher)
出版元 (英文)
出版社住所 (address)
刊行月 (month) September
出版年 (year) 2005
付加情報 (note)
注釈 (annote)
内容梗概 (abstract)
論文電子ファイル Not available.


[1-269]  A. Tsuchiya, M. Hashimoto, and H. Onodera, ``Design Guideline for Resistive Termination of On-Chip High-Speed Interconnects,'' In Proceedings of IEEE Custom Integrated Circuits Conference (CICC), pp. 613-616, September 2005.

@inproceedings{1_269,
    author = {A. Tsuchiya and M. Hashimoto and H. Onodera},
    author_e = {},
    editor = {},
    editor_e = {},
    title = {Design Guideline for Resistive Termination of On-Chip High-Speed
    Interconnects},
    title_e = {},
    booktitle = {Proceedings of IEEE Custom Integrated Circuits Conference (CICC)},
    
    booktitle_e = {},
    volume = {},
    number = {},
    pages = {613-616},
    organization = {},
    publisher = {},
    publisher_e = {},
    address = {},
    month = {September},
    year = {2005},
    note = {},
    annote = {}
}

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