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分類 国際会議
著者名 (author) D. Alnajjar,Y. Ko,T. Imagawa,M. Hiromoto,Y. Mitsuyama,M. Hashimoto,H. Ochi,T. Onoye
英文著者名 (author)
編者名 (editor)
編者名 (英文)
キー (key)
表題 (title) Soft Error Resilient VLSI Architecture for Signal Processing
表題 (英文)
書籍・会議録表題 (booktitle) Proceedings of IEEE International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS)
書籍・会議録表題(英文)
巻数 (volume)
号数 (number)
ページ範囲 (pages) 183--186
組織名 (organization)
出版元 (publisher)
出版元 (英文)
出版社住所 (address)
刊行月 (month) December
出版年 (year) 2009
付加情報 (note)
注釈 (annote)
内容梗概 (abstract)
論文電子ファイル Not available.


[1-251]  D. Alnajjar, Y. Ko, T. Imagawa, M. Hiromoto, Y. Mitsuyama, M. Hashimoto, H. Ochi, and T. Onoye, ``Soft Error Resilient Vlsi Architecture for Signal Processing,'' In Proceedings of IEEE International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), pp. 183--186, December 2009.

@inproceedings{1_251,
    author = {D. Alnajjar and Y. Ko and T. Imagawa and M. Hiromoto and Y.
    Mitsuyama and M. Hashimoto and H. Ochi and T. Onoye},
    author_e = {},
    editor = {},
    editor_e = {},
    title = {Soft Error Resilient VLSI Architecture for Signal Processing},
    title_e = {},
    booktitle = {Proceedings of IEEE International Symposium on Intelligent
    Signal Processing and Communication Systems (ISPACS)},
    booktitle_e = {},
    volume = {},
    number = {},
    pages = {183--186},
    organization = {},
    publisher = {},
    publisher_e = {},
    address = {},
    month = {December},
    year = {2009},
    note = {},
    annote = {}
}

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