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分類 国際会議
著者名 (author) Y. Uchida, S. Tani, S. Tsukiyama, I. Shirakawa
英文著者名 (author)
編者名 (editor)
編者名 (英文)
キー (key) Yoshihiro Uchida, Sadahiro Tani, , Isao Shirakawa
表題 (title) Parasitic Capacitance Modeling for On-Chip Interconnects
表題 (英文)
書籍・会議録表題 (booktitle) in Proc. The 2003 International Technical Conference on Circuits/Systems, Computers and ommunications (ITC-CSCC2003) , Kang-Woo Do, Korea
書籍・会議録表題(英文)
巻数 (volume) 3
号数 (number)
ページ範囲 (pages) 1638--1641
組織名 (organization)
出版元 (publisher)
出版元 (英文)
出版社住所 (address)
刊行月 (month) July
出版年 (year) 2003
付加情報 (note)
注釈 (annote)
内容梗概 (abstract)
論文電子ファイル Not available.


[1-128]  Y. Uchida, S. Tani, S. Tsukiyama, and I. Shirakawa, ``Parasitic Capacitance Modeling for On-Chip Interconnects,'' In in Proc. The 2003 International Technical Conference on Circuits/Systems, Computers and ommunications (ITC-CSCC2003) , Kang-Woo Do, Korea, vol. 3, pp. 1638--1641, July 2003.

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    title = {Parasitic Capacitance Modeling for On-Chip Interconnects},
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    booktitle = {in Proc. The 2003 International Technical Conference on
    Circuits/Systems, Computers and ommunications (ITC-CSCC2003) , Kang-Woo Do,
    Korea},
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    volume = {3},
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    pages = {1638--1641},
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    month = {July},
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