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分類 国際会議
著者名 (author) Y. Mitsuyama, Z. Andales, T. Onoye, I. Shirakawa, I. Arungsrisangchai
英文著者名 (author) Y. Mitsuyama, Z. Andales, T. Onoye, I. Shirakawa, I. Arungsrisangchai
編者名 (editor)
編者名 (英文)
キー (key) Yukio Mitsuyama, , Takao Onoye, Isao Shirakawa, Itthichai Arungsrisangchai
表題 (title) {VLSI} Architecture of Burst Mode Acceleration for 128-bit Block Ciphers
表題 (英文) {VLSI} Architecture of Burst Mode Acceleration for 128-bit Block Ciphers
書籍・会議録表題 (booktitle) ibid
書籍・会議録表題(英文) ibid., Phoenix, Arizona
巻数 (volume) II
号数 (number)
ページ範囲 (pages) 344--347
組織名 (organization)
出版元 (publisher)
出版元 (英文)
出版社住所 (address)
刊行月 (month) May
出版年 (year) 2002
付加情報 (note)
注釈 (annote)
内容梗概 (abstract)
論文電子ファイル Not available.


[1-104]  Y. Mitsuyama, Z. Andales, T. Onoye, I. Shirakawa, and I. Arungsrisangchai, ``VLSI Architecture of Burst Mode Acceleration for 128-Bit Block Ciphers,'' In ibid, vol. II, pp. 344--347, May 2002.

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    author = {Y. Mitsuyama and  Z. Andales and  T. Onoye and  I. Shirakawa and
    I. Arungsrisangchai},
    author_e = {Y. Mitsuyama, Z. Andales, T. Onoye, I. Shirakawa, I.
    Arungsrisangchai},
    editor = {},
    editor_e = {},
    title = {{VLSI} Architecture of Burst Mode Acceleration for 128-bit Block
    Ciphers},
    title_e = {{VLSI} Architecture of Burst Mode Acceleration for 128-bit Block
    Ciphers},
    booktitle = {ibid},
    booktitle_e = {ibid., Phoenix, Arizona},
    volume = {II},
    number = {},
    pages = {344--347},
    organization = {},
    publisher = {},
    publisher_e = {},
    address = {},
    month = {May},
    year = {2002},
    note = {},
    annote = {}
}

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