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分類 論文誌
著者名 (author) T. Watanabe, N. Ishiura
英文著者名 (author) T. Watanabe, N. Ishiura
キー (key) Tatsuo Watanabe,
表題 (title) Resister Constraint Analysis to Minimize Spill Code for Application Specific {DSPs}
表題 (英文) Resister Constraint Analysis to Minimize Spill Code for Application Specific {DSPs}
定期刊行物名 (journal) IEICE Trans. Fundamentals of Electronics Communications and Computer Sciences
定期刊行物名 (英文) IEICE Trans. Fundamentals of Electronics Communications and Computer Sciences
巻数 (volume) E84-A
号数 (number) 6
ページ範囲 (pages) 1541--1544
刊行月 (month) June
出版年 (year) 2001
付加情報 (note)
注釈 (annote)
内容梗概 (abstract)
論文電子ファイル Not available.


[0-33]  T. Watanabe and N. Ishiura, ``Resister Constraint Analysis to Minimize Spill Code for Application Specific DSPs,'' IEICE Trans. Fundamentals of Electronics Communications and Computer Sciences, vol. E84-A, no. 6, pp. 1541--1544, June 2001.

@article{0_33,
    author = {T. Watanabe and  N. Ishiura},
    author_e = {T. Watanabe, N. Ishiura},
    title = {Resister Constraint Analysis to Minimize Spill Code for Application
    Specific {DSPs}},
    title_e = {Resister Constraint Analysis to Minimize Spill Code for
    Application Specific {DSPs}},
    journal = {IEICE Trans. Fundamentals of Electronics Communications and
    Computer Sciences},
    journal_e = {IEICE Trans. Fundamentals of Electronics Communications and
    Computer Sciences},
    volume = {E84-A},
    number = {6},
    pages = {1541--1544},
    month = {June},
    year = {2001},
    note = {},
    annote = {}
}

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