尾上研究室 研究業績一覧: Y. Shigehiro, I. Shirakawa, I. Arungsrisangchai, and H. Takahashi, A Fast Minimum Cost Flow Algorithm and Its Application to VLSI Layout Compaction, July 1996.
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Y. Shigehiro, I. Shirakawa, I. Arungsrisangchai, and H. Takahashi, "A Fast Minimum Cost Flow Algorithm and Its Application to VLSI Layout Compaction," In in Proc. Int'l Technical Conference on Circuits/Systems, Computers and Communications, pp. 951-954, July 1996.
ID 67
分類 国際会議
タグ
表題 (title) A Fast Minimum Cost Flow Algorithm and Its Application to VLSI Layout Compaction
表題 (英文)
著者名 (author) Y. Shigehiro, I. Shirakawa, I. Arungsrisangchai, H. Takahashi
英文著者名 (author)
編者名 (editor)
編者名 (英文)
キー (key) Yuji Shigehiro, Isao Shirakawa, Itthichai Arungsrisangchai,
書籍・会議録表題 (booktitle) in Proc. Int'l Technical Conference on Circuits/Systems, Computers and Communications
書籍・会議録表題(英文)
巻数 (volume)
号数 (number)
ページ範囲 (pages) 951-954
組織名 (organization)
出版元 (publisher)
出版元 (英文)
出版社住所 (address)
刊行月 (month) 7
出版年 (year) 1996
採択率 (acceptance)
URL
付加情報 (note)
注釈 (annote)
内容梗概 (abstract)
論文電子ファイル 利用できません.
BiBTeXエントリ
@inproceedings{id67,
         title = {A Fast Minimum Cost Flow Algorithm and Its Application to {VLSI} Layout Compaction},
        author = {Y. Shigehiro and  I. Shirakawa and  I. Arungsrisangchai and  H. Takahashi},
     booktitle = {in Proc. Int'l Technical Conference on Circuits/Systems, Computers and Communications},
         pages = {951-954},
         month = {7},
          year = {1996},
}
  

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