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Y. Mitsuyama, Z. Andales, T. Onoye, I. Shirakawa, and I. Arungsrisangchai, "VLSI Architecture of Burst Mode Acceleration for 128-Bit Block Ciphers," In ibid, II, pp. 344--347, May 2002. | |
ID | 163 |
分類 | 国際会議 |
タグ | |
表題 (title) |
VLSI Architecture of Burst Mode Acceleration for 128-Bit Block Ciphers |
表題 (英文) |
VLSI Architecture of Burst Mode Acceleration for 128-Bit Block Ciphers |
著者名 (author) |
Y. Mitsuyama, Z. Andales, T. Onoye, I. Shirakawa, I. Arungsrisangchai |
英文著者名 (author) |
Y. Mitsuyama, Z. Andales, T. Onoye, I. Shirakawa, I. Arungsrisangchai |
編者名 (editor) |
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編者名 (英文) |
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キー (key) |
Yukio Mitsuyama, , Takao Onoye, Isao Shirakawa, Itthichai Arungsrisangchai |
書籍・会議録表題 (booktitle) |
ibid |
書籍・会議録表題(英文) |
ibid., Phoenix, Arizona |
巻数 (volume) |
II |
号数 (number) |
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ページ範囲 (pages) |
344--347 |
組織名 (organization) |
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出版元 (publisher) |
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出版元 (英文) |
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出版社住所 (address) |
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刊行月 (month) |
5 |
出版年 (year) |
2002 |
採択率 (acceptance) |
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URL |
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付加情報 (note) |
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注釈 (annote) |
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内容梗概 (abstract) |
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論文電子ファイル | 利用できません. |
BiBTeXエントリ |
@inproceedings{id163, title = {{VLSI} Architecture of Burst Mode Acceleration for 128-bit Block Ciphers}, author = {Y. Mitsuyama and Z. Andales and T. Onoye and I. Shirakawa and I. Arungsrisangchai}, booktitle = {ibid}, volume = {II}, pages = {344--347}, month = {5}, year = {2002}, } |