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| Y. Mitsuyama, Z. Andales, T. Onoye, and I. Shirakawa, "VLSI Implementation of High Performance Burst Mode for 128-Bit Block Ciphers," In in Proc. 14th Annual IEEE International ASIC/SoC Conference (ASIC/SoC2001), Washington, D.C., pp. W.1.1.1--W.1.1.5, September 2001. | |
| ID | 153 |
| 分類 | 国際会議 |
| タグ | |
| 表題 (title) |
VLSI Implementation of High Performance Burst Mode for 128-Bit Block Ciphers |
| 表題 (英文) |
VLSI Implementation of High Performance Burst Mode for 128-Bit Block Ciphers |
| 著者名 (author) |
Y. Mitsuyama, Z. Andales, T. Onoye, I. Shirakawa |
| 英文著者名 (author) |
Y. Mitsuyama, Z. Andales, T. Onoye, I. Shirakawa |
| 編者名 (editor) |
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| 編者名 (英文) |
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| キー (key) |
Yukio Mitsuyama, , Takao Onoye, Isao Shirakawa |
| 書籍・会議録表題 (booktitle) |
in Proc. 14th Annual IEEE International ASIC/SoC Conference (ASIC/SoC2001), Washington, D.C., pp. W.1.1.1--W.1.1.5 |
| 書籍・会議録表題(英文) |
in Proc. 14th Annual IEEE International ASIC/SoC Conference (ASIC/SoC2001), Washington, D.C., pp. W.1.1.1--W.1.1.5 |
| 巻数 (volume) |
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| 号数 (number) |
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| ページ範囲 (pages) |
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| 組織名 (organization) |
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| 出版元 (publisher) |
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| 出版元 (英文) |
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| 出版社住所 (address) |
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| 刊行月 (month) |
9 |
| 出版年 (year) |
2001 |
| 採択率 (acceptance) |
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| 付加情報 (note) |
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| 注釈 (annote) |
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| 内容梗概 (abstract) |
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| 論文電子ファイル | 利用できません． |
| BiBTeXエントリ |
@inproceedings{id153,
title = {{VLSI} implementation of high performance burst mode for 128-bit block ciphers},
author = {Y. Mitsuyama and Z. Andales and T. Onoye and I. Shirakawa},
booktitle = {in Proc. 14th Annual IEEE International ASIC/SoC Conference (ASIC/SoC2001), Washington, D.C., pp. W.1.1.1--W.1.1.5},
month = {9},
year = {2001},
}
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