| Tweet | |
| M. H. Miki, M. Sakamoto, S. Miyamoto, Y. Takeuchi, T. Yoshida, and I. Shirakawa, "Evaluation of Processor Code Efficiency for Embedded Systems," In in Proc. ACM 15th International Conference on Supercomputing, Sorrento, Italy, pp. 229--235, June 2001. | |
| ID | 144 |
| 分類 | 国際会議 |
| タグ | |
| 表題 (title) |
Evaluation of Processor Code Efficiency for Embedded Systems |
| 表題 (英文) |
Evaluation of Processor Code Efficiency for Embedded Systems |
| 著者名 (author) |
M. H. Miki, M. Sakamoto, S. Miyamoto, Y. Takeuchi, T. Yoshida, I. Shirakawa |
| 英文著者名 (author) |
M. H. Miki, M. Sakamoto, S. Miyamoto, Y. Takeuchi, T. Yoshida, I. Shirakawa |
| 編者名 (editor) |
|
| 編者名 (英文) |
|
| キー (key) |
Morgan Hirosuke Miki, , , Yoshinori Takeuchi, Toyohiko Yoshida, Isao Shirakawa |
| 書籍・会議録表題 (booktitle) |
in Proc. ACM 15th International Conference on Supercomputing, Sorrento, Italy |
| 書籍・会議録表題(英文) |
in Proc. ACM 15th International Conference on Supercomputing, Sorrento, Italy |
| 巻数 (volume) |
|
| 号数 (number) |
|
| ページ範囲 (pages) |
229--235 |
| 組織名 (organization) |
|
| 出版元 (publisher) |
|
| 出版元 (英文) |
|
| 出版社住所 (address) |
|
| 刊行月 (month) |
6 |
| 出版年 (year) |
2001 |
| 採択率 (acceptance) |
|
| URL |
|
| 付加情報 (note) |
|
| 注釈 (annote) |
|
| 内容梗概 (abstract) |
|
| 論文電子ファイル | 利用できません． |
| BiBTeXエントリ |
@inproceedings{id144,
title = {Evaluation of Processor Code Efficiency for Embedded Systems},
author = {M. H. Miki and M. Sakamoto and S. Miyamoto and Y. Takeuchi and T. Yoshida and I. Shirakawa},
booktitle = {in Proc. ACM 15th International Conference on Supercomputing, Sorrento, Italy},
pages = {229--235},
month = {6},
year = {2001},
}
|