尾上研究室 研究業績一覧: D. Taki, G. Fujita, T. Onoye, I. Shirakawa, T. Fujiwara, and T. Kasami, VLSI Implementation of a Recursive Maximum Likelihood Decoder for High-Speed Satellite Communication, July 1998.
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D. Taki, G. Fujita, T. Onoye, I. Shirakawa, T. Fujiwara, and T. Kasami, "VLSI Implementation of a Recursive Maximum Likelihood Decoder for High-Speed Satellite Communication," In in Proc. International Technical Conference on Circuits/Systems, Computers and Communications, pp. 1383--1386, July 1998.
ID 103
分類 国際会議
タグ
表題 (title) VLSI Implementation of a Recursive Maximum Likelihood Decoder for High-Speed Satellite Communication
表題 (英文)
著者名 (author) D. Taki, G. Fujita, T. Onoye, I. Shirakawa, T. Fujiwara, T. Kasami
英文著者名 (author)
編者名 (editor)
編者名 (英文)
キー (key) Daisuke Taki, Gen Fujita, Takao Onoye, Isao Shirakawa, Toru Fujiwara,
書籍・会議録表題 (booktitle) in Proc. International Technical Conference on Circuits/Systems, Computers and Communications
書籍・会議録表題(英文)
巻数 (volume)
号数 (number)
ページ範囲 (pages) 1383--1386
組織名 (organization)
出版元 (publisher)
出版元 (英文)
出版社住所 (address)
刊行月 (month) 7
出版年 (year) 1998
採択率 (acceptance)
URL
付加情報 (note)
注釈 (annote)
内容梗概 (abstract)
論文電子ファイル 利用できません.
BiBTeXエントリ
@inproceedings{id103,
         title = {{VLSI} Implementation of a Recursive Maximum Likelihood Decoder for High-Speed Satellite Communication},
        author = {D. Taki and  G. Fujita and  T. Onoye and  I. Shirakawa and  T. Fujiwara and  T. Kasami},
     booktitle = {in Proc. International Technical Conference on Circuits/Systems, Computers and Communications},
         pages = {1383--1386},
         month = {7},
          year = {1998},
}
  

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