- 論文誌
- [1] S. Tani, Y. Uchida, M. Furuie, S. Tsukiyama, B. Lee, S. Nishi, Y. Kubota, I. Shirakawa, and S. Imai, "Parasitic Capacitance Modeling for Non-Planar Interconnects in Liquid Crystal Displays," IEICE Trans. on Fundamentals, volume E86-A, number 12, pages 2923--2932, December 2003.
- 国際会議
- [1] Y. Uchida, S. Tani, M. Hashimoto, S. Tsukiyama, and I. Shirakawa, "Interconnect Capacitance Extraction for System LCD Circuits," In in Proc. IEEE/ACM Great Lake Symposium on Very Large Scale Integrated circuits (GLSVLSI 2005), pages 160--163, April 2005.
- [2] Y. Uchida, S. Tani, S. Tsukiyama, and I. Shirakawa, "Parasitic Capacitance Modeling for TFT Liquid Crystal Displays," In in Proc. The European Solid-State Device Research Conference (ESSDERC2003) , Estoril, Portugul, pages 453--456, September 2003.
- [3] Y. Uchida, S. Tani, S. Tsukiyama, and I. Shirakawa, "Parasitic Capacitance Modeling for On-Chip Interconnects," In in Proc. The 2003 International Technical Conference on Circuits/Systems, Computers and ommunications (ITC-CSCC2003) , Kang-Woo Do, Korea, volume 3, pages 1638--1641, July 2003.
- [4] S. Tani, Y. Uchida, M. Furuie, S. Tsukiyama, B. Lee, S. Nishi, Y. Kubota, I. Shirakawa, and S. Imai, "A Parasitic Capacitance Modeling Method for Non-Planar Interconnects," In in Proc. the Workshop on Synthesis and System Integration of Mixed Information Technologies (SASIMI 2003), pages 294--299, April 2003.
- [5] S. Tani, Y. Uchida, M. Furuie, S. Tsukiyama, B. Lee, S. Nishi, Y. Kubota, I. Shirakawa, and S. Imai, "Parasitic Capacitance Modeling for Multilevel Interconnects," In in Proc. IEEE Proceedings of Asia-Pacific Conference on Circuits and Systems 2002, volume 1, pages 59--64, December 2002.
- [6] Y. Uchida, M. Ise, T. Onoye, I. Shirakawa, and I. Arungsrisangchai, "VLSI Architecture of Digital Matched Filter and Prime Interleaver for W-CDMA," In Proc. IEEE International Symposium on Circuits and Systems (ISCAS2002), Phoenix, Arizona, volume III, pages 269--272, May 2002.
- [7] M. Ise, Y. Uchida, T. Onoye, and I. Shirakawa, "System-On-A-Chip Architecture for W-CDMA Baseband Modem LSI," In in Proc. The 4th International Conference on ASIC (ASICON 2001), Shanghai, pages 364--369, October 2001.