論文誌

[1] H. Konoura, D. Alnajjar, Y. Mitsuyama, H. Shimada, K. Kobayashi, H. Kanbara, H. Ochi, T. Imagawa, K. Wakabayashi, M. Hashimoto, T. Onoye, and H. Onodera, "Reliability-Configurable Mixed-Grained Reconfigurable Array Supporting C-Based Design and Its Irradiation Testing," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, volume E97-A, number 12, pages 2518--2529, December 2014.

[2] D. Alnajjar, H. Konoura, Y. Ko, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Implementing Flexible Reliability in a Coarse Grained Reconfigurable Architecture," IEEE Transactions on VLSI Systems, volume 21, number 12, 2165 -- 2178, December 2013.

[3] T.Kameda, H. Konoura, D. Alnajjar, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Field Slack Assessment for Predictive Fault Avoidance on Coarse-Grained Reconfigurable Devices," IEICE Trans. on Information and Systems , volume E96-D, number 8, pages 1624--1631, August 2013.

[4] D. Alnajjar, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Pvt-Induced Timing Error Detection Through Replica Circuits and Time Redundancy in Reconfigurable Devices," IEICE Electronics Express (ELEX), volume 10, number 5, April 2013.

国際会議

[1] M. Hashimoto, D. Alnajjar, H. Konoura, Y. Mitsuyama, H. Shimada, K. Kobayashi, H. Kanbara, H. Ochi, T. Imagawa, K. Wakabayashi, T. Onoye, and H. Onodera, "Reliability-Configurable Mixed-Grained Reconfigurable Array Compatible with High-Level Synthesis," Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), pages 14--15, January 2015.

[2] D. Alnajjar, H. Konoura, Y. Mitsuyama, H. Shimada, K. Kobayashi, H. Kanbara, H. Ochi, T. Imagawa, S. Noda, K. Wakabayashi, M. Hashimoto, T. Onoye, and H. Onodera, "Reliability-Configurable Mixed-Grained Reconfigurable Array Supporting C-To-Array Mapping and Its Radiation Testing," In Proceedings of IEEE Asian Solid-State Circuits Conference (A-SSCC), pages 313-316, November 2013.

[3] D. Alnajjar, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Static Voltage Over-Scaling and Dynamic Voltage Variation Tolerance with Replica Circuits and Time Redundancy in Reconfigurable Devices," Proceedings of International Conference on ReConFigurable Computing and FPGAs (ReConFig), December 2012.

[4] T. Kameda, H. Konoura, D. Alnajjar, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "A Predictive Delay Fault Avoidance Scheme for Coarse-Grained Reconfigurable Architecture," Proceedings of International Conference on Field Programmable Logic and Applications (FPL) , August 2012.

[5] D. Alnajjar, H. Kounoura, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Mttf Measurement under Alpha Particle Radiation in a Coarse-Grained Reconfigurable Architecture with Flexible Reliability," In IEEE Workshop on Silicon Errors in Logic - System Effects, March 2011.

[6] D. Alnajjar, Y. Ko, T. Imagawa, M. Hiromoto, Y. Mitsuyama, M. Hashimoto, H. Ochi, and T. Onoye, "Soft Error Resilient Vlsi Architecture for Signal Processing," In Proceedings of IEEE International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), pages 183--186, December 2009.

[7] D. Alnajjar, Y. Ko, T. Imagawa, H. Konoura, M. Hiromoto, Y. Mitsuyama, M. Hashimoto, H. Ochi, and T. Onoye, "Coarse-Grained Dynamically Reconfigurable Architecture with Flexible Reliability," In Proceedings of International Conference on Field Programmable Logic and Applications (FPL), pages 186--192, August 2009.

[8] Y. Ko, D. Alnajjar, Y. Mitsuyama, M. Hashimoto, and T. Onoye, "Coarse-Grained Dynamically Reconfigurable Architecture with Flexible Reliability," In Proceedings of Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI), pages 236--241, March 2009.

[9] D. Alnajjar, Y. Ko, T. Imagawa, M. Hiromoto, Y. Mitsuyama, M. Hashimoto, H. Ochi, and T. Onoye, "A Coarse-Grained Dynamically Reconfigurable Architecture Enabling Flexible Reliability," In Proceedings of IEEE Workshop on System Effects of Logic Soft Errors (SELSE), March 2009.