論文誌

[1] B.Y. Song, M. Furuie, Y. Yoshida, T. Onoye, and I. Shirakawa, "Low-Power VLSI Implementation by NMOS 4-Phase Dynamic Logic," Trans. of IPSJ, volume 41, number 4, pages 899--907, April 2000.

[2] B.Y. Song, M. Furuie, Y. Yoshida, T. Onoye, and I. Shirakawa, "Low-Power Scheme of NMOS 4-Phase Dynamic Logic," IEICE Trans. Electron., volume E82--C, number 9, pages 1772--1776, September 1999.

国際会議

[1] B.Y. Song, Y. Yoshida, T. Onoye, and I. Shirakawa, "Low-Power Implementation by a New Logic Scheme of NMOS 4-Phase Dynamic Logic," In in Proc. Workshop on Synthesis and System Integration of Mixed Technologies, pages 235--240, October 1998.

[2] B.Y. Song, Y. Yoshida, T. Onoye, and I. Shirakawa, "Delay and Power Simulation for a New Logic Scheme of NMOS 4-Phase Dynamic Logic," In in Proc. European Simulation Symposium, pages 339--343, October 1998.